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Arai, Kawasaki
Kazuya Arai, Kawasaki JP
| Patent application number | Description | Published |
|---|---|---|
| 20120067635 | Package substrate unit and method for manufacturing package substrate unit - A semiconductor chip mounting layer of a package substrate unit includes an insulation layer, a conductive seed metal layer formed on the top surface of the insulation layer, conductive pads formed on the top surface of the conductive seed metal layer, metal posts formed substantially in the central portion on the top surface of the conductive pads, and a solder resist layer that is formed to surround the conductive pads and the metal posts. | 03-22-2012 |
Massahiro Arai, Kawasaki JP
| Patent application number | Description | Published |
|---|---|---|
| 20080288678 | STORAGE SYSTEM - Data transfer is performed to and from a host computer using a first block as the minimum unit. Data transfer is performed to and from a storage area using a second block as the minimum unit. A second block set of the storage area stores data obtained from performing data conversion processes that change the size of the data itself, with a first block set as the unit. Here a correspondence relationship is generated between the first block set and the second block set. In response to a read request from the host computer, a second block set, which corresponds to the first block set that includes the first block that is requested, is read, a reverse-conversion process is performed, and the data is sent to the host computer. | 11-20-2008 |
Natsuko Arai, Kawasaki JP
| Patent application number | Description | Published |
|---|---|---|
| 20100306822 | Communication System, Line Providing Apparatus And Communication Method - A line providing apparatus has an acceptance processor accepting a line use request from the terminal apparatus, a contract determiner determines a state of conclusion of a first contract, a second contract or a combined contract obtained by substantially combining the first contract and the second contract at the terminal apparatus which is a source of the line use request accepted by the acceptance processor, and an assistance processor performing an assisting process for conclusion of a contract found not to be concluded according to a result of determination on the state of conclusion of the first contract, the second contract or the combined contract by the contract determiner, whereby the user of the terminal apparatus which does not yet conclude can sign the contract for the communication service or the information providing service through the terminal apparatus. | 12-02-2010 |
Tomoyuki Arai, Kawasaki JP
| Patent application number | Description | Published |
|---|---|---|
| 20090153233 | BIAS CIRCUIT - A gm compensation current source controls current that runs through a current source transistor, source-grounded transistors that determine a gain so that mutual conductance gm of the source-grounded transistors is compensated and the gain is compensated. A 1/r current source runs current inversely proportional to variation of load resistors of an amplifier so that gate bias points of gate-grounded transistors that are connected to the source-grounded transistors remain constant, and deterioration of linearity at a drain terminal of a gate-grounded transistor is suppressed. | 06-18-2009 |
| 20090167435 | POWER CONTROL CIRCUIT AND POWER CONTROL METHOD - A power control circuit includes: a fine adjustment variable amplifying unit configured to amplify the input signal in accordance with a first gain set value; a coarse adjustment variable amplifying unit configured to amplify the input signal in accordance with a second gain set value; a branching unit configured to branch an output signal into a feedback signal; a comparing unit configured to compare a gain value between the input signal and the output signal with the required gain set value; a control unit configured to determine the first gain set value and the second gain set value based on the required gain set value; and an adjusting unit configured to adjust the first gain set value and the second gain set value so that the power value of the feedback signal becomes a power value corresponding to the required gain set value. | 07-02-2009 |
| 20100039178 | AMPLIFIER CIRCUIT - An amplifier circuit includes an amplifier unit and a current control circuit as means for achieving the aforementioned object. The amplifier unit includes a gain compensation MOS transistor compensating for gain of an output characteristic and a linearity compensation MOS transistor compensating for linearity of an output characteristic. A source of the gain compensation MOS transistor is connected to a drain of the linearity compensation MOS transistor. An input signal is applied to a gate of the linearity compensation MOS transistor. A drain of the gain compensation MOS transistor is set as an output. The current control circuit performs control so as to pass predetermined current between the drain and the source of the gain compensation MOS transistor and pass predetermined current between the drain and the source of the linearity compensation MOS transistor. | 02-18-2010 |
| 20100109777 | Amplifying Circuit - An amplifying circuit includes amplifying unit comprising a first transistor unit having a gate width that is controllable and is controlled based on a first control signal. | 05-06-2010 |
| 20100207692 | BIAS CIRCUIT AND CONTROL METHOD FOR BIAS CIRCUIT - A bias circuit for applying a bias voltage to a nonlinear amplification circuit, including a constant-current source; and a first, second, third, and fourth transistors, wherein a current mirror circuit is configured by the first transistor and the second transistor, and the bias voltage is outputted from the drain of the second transistor, gate lengths and gate widths of the first and second transistor are the same, gate lengths of the first to fourth transistor are the same, and gate lengths and gate widths of the first, second, third, and fourth transistor are configured so that k | 08-19-2010 |
Toshimasa Arai, Kawasaki JP
| Patent application number | Description | Published |
|---|---|---|
| 20100177658 | Network Monitoring System and Path Extracting Method - A network monitoring system that monitors a communication network including plural communication apparatuses and includes an obtaining part for obtaining a transmission traffic amount and a reception traffic amount of each port of the plural communication apparatuses, a determining part for determining whether the transmission traffic amount is no less than a first threshold and whether the reception traffic amount is less than a second threshold for each port of the plural communication apparatuses, a storage part for storing connecting path data of the communication network therein, an extracting part for extracting a loop affected path, and an outputting part for outputting data of the loop affected path. | 07-15-2010 |
| 20120023378 | INFORMATION PROCESSING APPARATUS AND INFORMATION PROCESSING METHOD - An information processing apparatus receives a request transmitted from a client to a server and a response transmitted from the server to the client. The information processing apparatus includes a processor. The processor counts a first number of first requests having no corresponding response within a first time period, counts a second number of second requests having a corresponding response, and detects a failure in the server on the basis of the first number and the second number. | 01-26-2012 |