| Patent application number | Description | Published |
|---|
| 20080217782 | METHOD FOR PREPARING 2-DIMENSIONAL SEMICONDUCTOR DEVICES FOR INTEGRATION IN A THIRD DIMENSION - A method which is intended to facilitate and/or simplify the process of fabricating interlayer vias by selective modification of the FEOL film stack on a transfer wafer is provided. Specifically, the present invention provides a method in which two dimensional devices are prepared for subsequent integration in a third dimension at the transition between normal FEOL processes by using an existing interlayer contact mask to define regions in which layers of undesirable dielectrics and metal are selectively removed and refilled with a middle-of-the-line (MOL) compatible dielectric film. As presented, the inventive method is compatible with standard FEOL/MOL integration schemes, and it guarantees a homogeneous dielectric film stack specifically in areas where interlayer contacts are to be formed, thus allowing the option of a straightforward integration path, if desired. | 09-11-2008 |
| 20080268574 | HERMETIC SEAL AND RELIABLE BONDING STRUCTURES FOR 3D APPLICATIONS - A sealed microelectronic structure which provides mechanical stress endurance and includes at least two chips being electrically connected to a semiconductor structure at a plurality of locations. Each chip includes a continuous bonding material along it's perimeter and at least one support column connected to each of the chips positioned within the perimeter of each chip. Each support column extends outwardly such that when the at least two chips are positioned over one another the support columns are in mating relation to each other. A seal between the at least two chips results from the overlapping relation of the chip to one another such that the bonding material and support columns are in mating relation to each other. Thus, the seal is formed when the at least two chips are mated together, and results in a bonded chip structure. | 10-30-2008 |
| 20090026623 | BURIED METAL-SEMICONDUCTOR ALLOY LAYERS AND STRUCTURES AND METHODS FOR FABRICATION THEREOF - A method for forming a metal-semiconductor alloy layer uses particular thermal annealing conditions to provide a stress free metal-semiconductor alloy layer through interdiffusion of a buried semiconductor material layer and a metal-semiconductor alloy forming metal layer that contacts the buried semiconductor material layer within an aperture through a capping layer beneath which is buried the semiconductor material layer. A resulting semiconductor structure includes the metal-semiconductor alloy layer that further includes an interconnect portion beneath the capping layer and a contiguous via portion that penetrates at least partially through the capping layer. Such a metal-semiconductor alloy layer may be located interposed between a substrate and a semiconductor device having an active doped region. | 01-29-2009 |
| 20090042338 | Capping Coating for 3D Integration Applications - A structure for a semiconductor component is provided having a bi-layer capping coating integrated and built on supporting layer to be transferred. The bi-layer capping protects the layer to be transferred from possible degradation resulting from the attachment and removal processes of the carrier assembly used for layer transfer. A wafer-level layer transfer process using this structure is enabled to create three-dimensional integrated circuits. | 02-12-2009 |
| 20090140404 | HERMETIC SEAL AND RELIABLE BONDING STRUCTURES FOR 3D APPLICATIONS - A sealed microelectronic structure which provides mechanical stress endurance and includes at least two chips being electrically connected to a semiconductor structure at a plurality of locations. Each chip includes a continuous bonding material along it's perimeter and at least one support column connected to each of the chips positioned within the perimeter of each chip. Each support column extends outwardly such that when the at least two chips are positioned over one another the support columns are in mating relation to each other. A seal between the at least two chips results from the overlapping relation of the chip to one another such that the bonding material and support columns are in mating relation to each other. Thus, the seal is formed when the at least two chips are mated together, and results in a bonded chip structure. | 06-04-2009 |
| 20100146019 | AUTOMATED FILE RELOCATION - A computer-implemented method, system and computer program product for managing computer file storage is presented. In one embodiment the method includes receiving a file for storage. In response to determining that the file exceeds a pre-determined size, the file is stored in a pre-designated folder that is reserved for oversized files. | 06-10-2010 |
| 20100211950 | Automated Termination of Selected Software Applications in Response to System Events - The illustrative embodiments disclose a computer implemented method, apparatus, and computer program product for managing a set of applications. In one embodiment, the process registers a system management event in an application configuration database. Responsive to detecting the registered system management event during execution of one application of the set of applications, the process identifies applications of the set of applications associated with the registered system management event that are executing. The process then terminates the applications of the set of applications associated with the registered system management event that are executing. Responsive to terminating the applications of the set of applications associated with the registered system managing event that are executing, the process then executes a handler that processes the registered system management event. | 08-19-2010 |
| 20110076670 | DETECTION OF ANALYTES VIA NANOPARTICLE-LABELED SUBSTANCES WITH ELECTROMAGNETIC READ-WRITE HEADS - A first set of antibodies are bonded to a substrate, and are exposed to and bonded with target antigens. A second set of antibodies are bonded to nanoparticles, and the nanoparticle labeled antibodies are exposed to the targeted antigens. An electromagnetic write-head magnetizes the nanoparticles, and then a read-sensor detects the freshly magnetized nanoparticles. The substrate comprises a flexible film or a Peltier material to allow selective heating and cooling of the antigens and antibodies. Nanoparticles of different magnetic properties may be selectively paired with antibodies associated with different antigens to allow different antigens to be detected upon a single scan by the read-sensor. | 03-31-2011 |
| 20110076782 | READ-AFTER-WRITE DETECTION OF ANALYTES VIA NANOPARTICLE-LABELED SUBSTANCES - Embodiments of the invention relate to magnetizing and detecting nanoparticle-labeled antigens on biosample tracks deposited on a tape media. An aspect of the invention comprises apparatus and methods for labeling antigens with demagnetized nanoparticles, magnetizing the nanoparticles with an electromagnetic write head, and detecting the antigens via the magnetized nanoparticles by reading the tape media with a read sensor in a read-after-write operation. The write head and read sensor are part of a head-module of magnetic tape drive. Target antigens are attached to the biosample tracks by antibodies. Nanoparticles of differing magnetic properties may be selectively paired with antibodies associated with different antigens to allow multiple antigens to be detected upon a single scan by the read sensor. | 03-31-2011 |
| 20110077869 | CIRCUIT FOR DETECTING ANALYTES VIA NANOPARTICLE-LABELED SUBSTANCES WITH ELECTROMAGNETIC READ-WRITE HEADS - A circuit for detecting antigens on biosample tracks comprising a processor, an electromagnetic write head for magnetizing nanoparticles attached to the antigens via antibodies in response to a write signal from the processor, and a first amplifier for supplying power to the write head. The circuit further comprises a magneto-resistive read sensor for detecting the magnetized nanoparticles upon receiving a read signal from the processor, and a second amplifier for supplying power to the read sensor. The write head and read sensor may be part of a head module in a magnetic tape drive. Nanoparticles of differing magnetic properties may be selectively paired with antibodies associated with different antigens to allow different antigens to be detected upon a single scan by the read-sensor. | 03-31-2011 |
| 20110077902 | SERVO CONTROL CIRCUIT FOR DETECTING ANALYTES VIA NANOPARTICLE-LABELED SUBSTANCES WITH ELECTROMAGNETIC READ-WRITE HEADS - A circuit for controlling an electromagnetic head module to detect antigens on a biosample track comprising a processor for receiving position-error-servo signal from the PES read sensor, a write head for magnetizing nanoparticles attached to antigens, and a read sensor for detecting the nanoparticle-labeled antigens. The circuit may further comprise an X-axis actuator for controlling the head module in the direction perpendicular to the track and an Y-axis actuator coupled to the head module and the X-axis actuator for controlling the head module in the direction of the track. Target antigens are attached to the biosample track and nanoparticles via antibodies. | 03-31-2011 |
