Inventors list

Assignees list

Classification tree browser

Top 100 Inventors

Top 100 Assignees


Andrew C. Walton, Rocklin US

Andrew C. Walton, Rocklin, CA US

Patent application numberDescriptionPublished
20080229035SYSTEMS AND METHODS FOR IMPLEMENTING A STRIDE VALUE FOR ACCESSING MEMORY - Systems and methods for implementing a stride valise for memory are provided. One embodiment includes a system comprising a plurality of memory modules configured to store interleaved data in a plurality of memory storage units according to a predetermined interleave. The plurality of memory storage units can be defined by a memory range of consecutive addresses. The system also comprises a memory test device configured to access a portion of the plurality of memory storage units in a sequence that repeats according to a programmable stride value.09-18-2008
20100131810SYSTEM AND METHOD FOR IMPLEMENTING A STRIDE VALUE FOR MEMORY TESTING - Systems and methods for implementing a stride value for memory are provided. One embodiment relates to a system that includes a plurality of memory modules configured to store interleaved data in a plurality of memory storage units according to a predetermined interleave. A memory test device is configured to perform a memory test that accesses a portion of the plurality of memory storage units in a sequence according to a programmable stride value. The memory test device performs the memory test by writing test data to each of the memory storage units in the portion of the plurality of memory storage units and reading the test data from each of the memory storage units in the portion of the plurality of memory storage units.05-27-2010
20110138219HANDLING ERRORS IN A DATA PROCESSING SYSTEM - A method of managing errors in a data processing system may involve at least one computer system. Each computer system may include a processor that executes an operating system, firmware, and system memory storing instructions for the operating system. A firmware error handler resident in the firmware may identify an error occurring in the computer system. The firmware error handler may determine whether the operating system is required to take an action in response to the error. If the operating system is not required to take an action in response to the error, the firmware error handler may create an error log accessible to the operating system appropriate to cause the operating system to take no action.06-09-2011
20110154091ERROR LOG CONSOLIDATION - A system for error log consolidation is disclosed herein. A server computer includes a plurality of system processors and error log consolidation logic. The system processors are configurable to form isolated execution partitions. The error log consolidation logic is configured to, based on detection of a fault in the server, retrieve error logs from the system processors, and to consolidate the retrieved logs with server computer information not available to the system processors to generate a consolidated error log. The consolidated error log includes a comprehensive set of server information relevant to identifying a cause of the detected fault.06-23-2011
20110154097FIELD REPLACEABLE UNIT FAILURE DETERMINATION - A system and method for fault management in a computer-based system are disclosed herein. A system includes a plurality of field replaceable units (“FRUs”) and fault management logic. The fault management logic is configured to collect error information from a plurality of components of the system. The logic stores, for each component identified as a possible cause of a detected fault, a record assigning one of two different component failure probability indications. The logic identifies a single of the plurality of FRUs that has failed based on the stored probability indications.06-23-2011
20110154115ANALYSIS RESULT STORED ON A FIELD REPLACEABLE UNIT - A system and method for recording fault information in an electronic system are disclosed herein. A system includes fault analysis logic and a plurality of field replaceable units (“FRUs”). The fault analysis is configured to analyze system error information, and identify at least one of the FRUs in the system to be a possible cause of a detected fault based on the analysis. Each FRU includes writeable non-volatile storage including storage locations reserved to store information including a result of the analysis. The result of the analysis indicates a reason that the FRU storing the information was determined, by the fault analysis logic, to be a possible cause of the fault.06-23-2011
20110154128SYNCHRONIZE ERROR HANDLING FOR A PLURALITY OF PARTITIONS - In accordance with at least some embodiments, a system comprises a plurality of partitions, each partition having its own error handler. The system further comprises a plurality of resources assignable to the plurality of partitions. The system further comprises management logic coupled to the plurality of partitions and the plurality of resources. The management logic comprises an error management tool that synchronizes operation of the error handlers in response to an error.06-23-2011
20110154349RESOURCE FAULT MANAGEMENT FOR PARTITIONS - In accordance with at least some embodiments, a system includes a plurality of partitions, each partition having its own operating system (OS) and workload. The system also includes a plurality of resources assignable to the plurality of partitions. The system also includes management logic coupled to the plurality of partitions and the plurality of resources. The management logic is configured to set priority rules for each of the plurality of partitions based on user input. The management logic performs automated resource fault management for the resources assigned to the plurality of partitions based on the priority rules.06-23-2011

Patent applications by Andrew C. Walton, Rocklin, CA US