Patent application number | Description | Published |
20080312329 | Nonpeptide Inhibitors of Matrix Metalloproteinases - Disclosed are selective inhibitors of matrix metalloproteinases represented by the following formula (I). | 12-18-2008 |
20090239892 | PYRIDOMORPHINANS, PYRIDAZINOMORPHINANS AND USE THEREOF - Compounds represented by the formula: | 09-24-2009 |
20100120745 | ANTI-ANGIOGENIC AGENTS AND METHODS OF USE - The present disclosure relates generally to treating or preventing diseases associated with angiogenesis by administering to a patient certain compounds found to inhibit or substantially reduce angiogenesis. Compounds employed according to the present disclosure exhibit good anti-angiogenic activity as well as demonstrate a prophylactic effect for preventing and substantially reducing angiogenesis. Examples of such compounds include Ritanserin, Amiodarone, Terfenadine, Perphenazine, Bithionol, and Clomipramine. | 05-13-2010 |
20100204338 | ANTI-ANGIOGENIC AGENTS AND METHODS OF USE - The present disclosure relates generally to treating or preventing diseases associated with angiogenesis by administering to a patient certain compounds found to inhibit or substantially reduce angiogenesis. Compounds employed according to the present disclosure exhibit good anti-angiogenic activity as well as demonstrate a prophylactic effect for preventing and substantially reducing angiogenesis. Examples of such compounds include Ritanserin, Amiodarone, Terfenadinc, Perphenazine, Bithionol, and Clomipramine. | 08-12-2010 |
20110060000 | ACRIDINE ANALOGS IN THE TREATMENT OF GLIOMAS - Disclosed are methods and compositions for treating gliomas that involve quinacrine and other acridine analogs. This abstract is intended as a scanning tool for purposes of searching in the particular art and is not intended to be limiting of the present invention. | 03-10-2011 |
20110286964 | AZO-SUBSTITUTED PYRIDINE AND PYRIMIDINE DERIVATIVES AND THEIR USE IN TREATING VIRAL INFECTIONS - The present invention provides compounds of Formula (I): (Chemical formula should be inserted here as it appears on abstract in paper form) (I) and tautomers, isomers, and esters of said compounds, and pharmaceutically acceptable salts, solvates, and prodrugs of said compounds, wherein each of R, R | 11-24-2011 |
20110286965 | ETHENYL-SUBSTITUTED PYRIDINE AND PYRIMIDINE DERIVATIVES AND THEIR USE IN TREATING VIRAL INFECTIONS - The present invention provides compounds of Formula (A): (Chemical formula should be inserted here as it appears on abstract in paper form) (A) and tautomers, isomers, and esters of said compounds, and pharmaceutically acceptable salts, solvates, and prodrugs of said compounds, wherein wherein each of R, R | 11-24-2011 |
20110318305 | SUBSTITUTED PYRIDINE AND PYRIMIDINE DERIVATIVES AND THEIR USE IN TREATING VIRAL INFECTIONS - The present invention provides compounds of Formula (I): and tautomers, isomers, and esters of said compounds, and pharmaceutically acceptable salts, solvates, and prodrugs of said compounds, wherein each of R, R | 12-29-2011 |
20120107271 | ETHYNYL-SUBSTITUTED PYRIDINE AND PYRIMIDINE DERIVATIVES AND THEIR USE IN TREATING VIRAL INFECTIONS - The present invention provides compounds of Formula (I): (Chemical formula should be inserted here as it appears on abstract in paper form) (I) and tautomers, isomers, and esters of said compounds, and pharmaceutically acceptable salts, solvates, and pro-drugs of said compounds, wherein each of R, R | 05-03-2012 |
20120245166 | TREATMENT OF NEURODEGENERATIVE DISEASES, CAUSATION OF MEMORY ENHANCEMENT, AND ASSAY FOR SCREENING COMPOUNDS FOR SUCH - Methods for enhancing memory and/or learning and prevent neurodegeneration by administration of certain heterocyclic and aromatic compounds are described. The methods are particularly useful for treating patients suffering from a neurodegenerative disease such as (without limitation) Alzheimer's, Parkinsons's, Lou Gehrig's (ALS) disease or memory or learning impairment. A neuronal human cell-based assay that assess NF-kB gene up-regulation using a luciferase reporter is also provided that screens for compounds useful in methods for enhancing memory or learning. | 09-27-2012 |
20130085133 | ANTI-VIRAL TREATMENT AND ASSAY TO SCREENFOR ANTI-VIRAL AGENT - The present disclosure relates to novel compounds of formulas (1) through (19) and to a method for treating humans infected with a virus including various respiratory viruses such as members of the Paramyxoviridae family (respiratory syncytial virus (RSV), human metapneumovirus (HMPV), human parainfluenza virus (HPIV), measles virus, and mumps virus) with a compound of formulas (1) through (19). The present disclosure also relates to a cytopathic effect (CPE)-based assay that will assess virus-induced CPE for screening of compounds for treating viral diseases or inhibiting a virus. | 04-04-2013 |
20130123240 | METHOD OF USING BIOTHIONOL AND BIOTHIONOL-LIKE COMPOUNDS AS ANTI-ANGIOGENIC AGENTS - The present disclosure relates generally to treating or preventing diseases associated with angiogenesis by administering to a patient certain compounds found to inhibit or substantially reduce angiogenesis. Compounds employed according to the present disclosure exhibit good anti-angiogenic activity as well as demonstrate a prophylactic effect for preventing and substantially reducing angiogenesis. Examples of such compounds include Ritanserin, Amiodarone, Terfenadinc, Perphenazine, Bithionol, and Clomipramine. | 05-16-2013 |
20130296298 | TRIAZOLOPYRIDAZINE COMPOUNDS, USE AS INHIBITORS OF THE KINASE LRRK2, AND METHODS FOR PREPARATION THEREOF - The present invention provides novel LRRK2 kinase inhibitors and methods of treating disease states using these inhibitors. | 11-07-2013 |
20140242027 | SUBSTITUTED PYRIDINE AND PYRIMIDINE DERIVATIVES AND THEIR USE IN TREATING VIRAL INFECTIONS - The present invention provides compounds of Formula (I): and tautomers, isomers, and esters of said compounds, and pharmaceutically acceptable salts, solvates, and prodrugs of said compounds, wherein each of R, R | 08-28-2014 |
Patent application number | Description | Published |
20130093049 | High Productivity Combinatorial Dual Shadow Mask Design - Dual shadow mask design can overcome the size and resolution limitations of shadow masks to provide capacitor structures with small effective areas. The capacitor structures have bottom and top electrode layers patterned using shadow masks, sandwiching a dielectric layer. The effective areas of the capacitors are the overlapping areas of the top and bottom electrodes, thus allowing small area sizes without subjected to the size limitation of the electrodes. The dual shadow mask design can be used in conjunction with high productivity combinatorial processes for screening and optimizing dielectric materials and fabrication processes. | 04-18-2013 |
20140080233 | COMBINATORIAL OPTIMIZATION OF INTERLAYER PARAMETERS - The embodiments describe methods and apparatuses for combinatorial optimization of interlayer parameters for capacitor stacks. The capacitor stacks may include a substrate, an insulating layer disposed on the substrate, a ruthenium disposed electrode on the insulating layer, and an interlayer disposed on the ruthenium electrode, where the interlayer is configured to prevent etching of the electrode when growing a high-k dielectric using an ozone-based precursor. The parameters for forming the interlayer may include interlayer thickness, precursor chemistry, oxidant strength, precursor purge times, oxidant purge times, and other suitable parameters. Each of these parameters may be evaluated through deposition of the capacitor stacks through a combinatorial optimization process. Thus, a plurality of different parameters may be evaluated with a single substrate to ascertain associated properties of Ruthenium electrode etching in a combinatorial manner. | 03-20-2014 |
20140141534 | dielectric doping using high productivity combinatorial methods - A combination of deposition processes can be used to evaluate layer properties using a combinatorial workflow. The processes can include a base ALD process and another process, such as a PVD process. The high productivity combinatorial technique can provide an evaluation of the material properties for given ALD base layer and PVD additional elements. An ALD process can then be developed to provide the desired layers, replacing the ALD and PVD combination. | 05-22-2014 |
20140175603 | Method of Forming an Asymmetric MIMCAP or a Schottky Device as a Selector Element for a Cross-Bar Memory Array - MIMCAP devices are provided that can be suitable for memory device applications, such as current selector devices for cross point memory array. The MIMCAP devices can have lower thermal budget as compared to Schottky diodes and controllable lower barrier height and lower series resistance as compared to MIMCAP tunneling diodes. The MIMCAP diode can include a low defect dielectric layer, a high defect dielectric layer, sandwiched between two electrodes having different work function values. | 06-26-2014 |
20140183439 | CURRENT SELECTOR FOR NON-VOLATILE MEMORY IN A CROSS BAR ARRAY BASED ON DEFECT AND BAND ENGINEERING METAL-DIELECTRIC-METAL STACKS - Selector devices that can be suitable for memory device applications can have low leakage currents at low voltages to reduce sneak current paths for non selected devices, and high leakage currents at high voltages to minimize voltage drops during device switching. In some embodiments, the selector device can include a first electrode, a tri-layer dielectric layer, and a second electrode. The tri-layer dielectric layer can include a high leakage dielectric layer sandwiched between two lower leakage dielectric layers. The low leakage layers can function to restrict the current flow across the selector device at low voltages. The high leakage dielectric layer can function to enhance the current flow across the selector device at high voltages. | 07-03-2014 |
20140264239 | Using multi-layer MIMCAPs in the tunneling regime as selector element for a cross-bar memory array - Selector devices that can be suitable for memory device applications can have low leakage currents at low voltages to reduce sneak current paths for non selected devices, and high leakage currents at high voltages to minimize voltage drops during device switching. The selector device can include a first electrode, a tri-layer dielectric layer, and a second electrode. The tri-layer dielectric layer can include a low band gap dielectric layer disposed between two higher band gap dielectric layers. The high band gap dielectric layers can be doped with doping materials to form traps at energy levels higher than the operating voltage of the memory device. | 09-18-2014 |
20140264241 | ZnTe on TiN or Pt Electrodes as a Resistive Switching Element for ReRAM Applications - Resistive random access memory (ReRAM) cells can include a ZnTe switching layer and TiN or Pt electrodes. The combination of the switching layer of ZnTe and the electrodes of TiN or Pt is designed to achieve desirable performance characteristics, such as low current leakage as well as low and consistent switching currents. High temperature anneal of the ZnTe switching layer can further improve the performance of the ReRAM cells. The switching layer may be deposited using various techniques, such as sputtering or atomic layer deposition (ALD). | 09-18-2014 |
20140264252 | Current Selector for Non-Volatile Memory in a Cross Bar Array Based on Defect and Band Engineering Metal-Dielectric-Metal Stacks - Selector devices that can be suitable for memory device applications can have low leakage currents at low voltages to reduce sneak current paths for non selected devices, and high leakage currents at high voltages to minimize voltage drops during device switching. In some embodiments, the selector device can include a first electrode, a tri-layer dielectric layer, and a second electrode. The tri-layer dielectric layer can include a high leakage dielectric layer sandwiched between two lower leakage dielectric layers. The low leakage layers can function to restrict the current flow across the selector device at low voltages. The high leakage dielectric layer can function to enhance the current flow across the selector device at high voltages. | 09-18-2014 |
Patent application number | Description | Published |
20090026522 | SEMICONDUCTOR DEVICE COMPRISING TRANSISTOR STRUCTURES AND METHODS FOR FORMING SAME - A method for forming an opening within a semiconductor material comprises forming a neck portion, a rounded portion below the neck portion and, in some embodiments, a protruding portion below the rounded portion. This opening may be filled with a conductor, a dielectric, or both. Embodiments to form a transistor gate, shallow trench isolation, and an isolation material separating a transistor source and drain are disclosed. Device structures formed by the method are also described. | 01-29-2009 |
20090206418 | Semiconductor Constructions - The invention includes methods of forming PMOS transistors and NMOS transistors. The NMOS transistors can be formed to have a thin silicon-containing material between a pair of metal nitride materials, while the PMOS transistors are formed to have the metal nitride materials directly against one another. The invention also includes constructions which contain an NMOS transistor gate stack having a thin silicon-containing material between a pair of metal nitride materials. The silicon-containing material can, for example, consist of silicon, conductively-doped silicon, or silicon oxide; and can have a thickness of less than or equal to about 30 angstroms. | 08-20-2009 |
20110006365 | Semiconductor Device Comprising Transistor Structures and Methods for Forming Same - A method for forming an opening within a semiconductor material comprises forming a neck portion, a rounded portion below the neck portion and, in some embodiments, a protruding portion below the rounded portion. This opening may be filled with a conductor, a dielectric, or both. Embodiments to form a transistor gate, shallow trench isolation, and an isolation material separating a transistor source and drain are disclosed. Device structures formed by the method are also described. | 01-13-2011 |
20110042754 | Gate Stacks and Semiconductor Constructions - The invention includes methods of forming PMOS transistors and NMOS transistors. The NMOS transistors can be formed to have a thin silicon-containing material between a pair of metal nitride materials, while the PMOS transistors are formed to have the metal nitride materials directly against one another. The invention also includes constructions which contain an NMOS transistor gate stack having a thin silicon-containing material between a pair of metal nitride materials. The silicon-containing material can, for example, consist of silicon, conductively-doped silicon, or silicon oxide; and can have a thickness of less than or equal to about 30 angstroms. | 02-24-2011 |
20120032257 | Dual Work Function Recessed Access Device and Methods of Forming - A recessed access device having a gate electrode formed of two or more gate materials having different work functions may reduce the gate-induced drain leakage current losses from the recessed access device. The gate electrode may include a first gate material having a high work function disposed in a bottom portion of the recessed access device and a second gate material having a lower work function disposed over the first gate material and in an upper portion of the recessed access device. | 02-09-2012 |
20120112272 | Semiconductor Device Comprising Transistor Structures and Methods for Forming Same - A method for forming an opening within a semiconductor material comprises forming a neck portion, a rounded portion below the neck portion and, in some embodiments, a protruding portion below the rounded portion. This opening may be filled with a conductor, a dielectric, or both. Embodiments to form a transistor gate, shallow trench isolation, and an isolation material separating a transistor source and drain are disclosed. Device structures formed by the method are also described. | 05-10-2012 |