Patent application number | Description | Published |
20110268225 | ORTHOGONAL DIFFERENTIAL VECTOR SIGNALING - Using a transformation based at least in part on a non-simple orthogonal or unitary matrix, data may be transmitted over a data bus in a manner that is resilient to one or more types of signal noise, that does not require a common reference at the transmission and acquisition points, and/or that has a pin-efficiency that is greater than 50% and may approach that of single-ended signaling. Such transformations may be implemented in hardware in an efficient manner. Hybrid transformers that apply such transformations to selected subsets of signals to be transmitted may be used to adapt to various signal set sizes and/or transmission environment properties including noise and physical space requirements of given transmission environments. | 11-03-2011 |
20110299555 | ERROR CONTROL CODING FOR ORTHOGONAL DIFFERENTIAL VECTOR SIGNALING - Using a transformation based, at least in part, on a non-simple orthogonal matrix, data may be transmitted over a data bus in a manner that is resilient to one or more types of signal noise, that does not require a common reference at the transmission and acquisition points, and/or that has a pin-efficiency that is greater than 50% and may approach that of single-ended signaling. Such transformations may be implemented in hardware in an efficient manner. The transformation may be combined with methods from forward error correction to lower the required transmission power. | 12-08-2011 |
20110302478 | POWER AND PIN EFFICIENT CHIP-TO-CHIP COMMUNICATIONS WITH COMMON-MODE REJECTION AND SSO RESILIENCE - In bus communications methods and apparatus, a first set of physical signals representing the information to be conveyed over the bus is provided, and mapped to a codeword of a spherical code, wherein a codeword is representable as a vector of a plurality of components and the bus uses at least as many signal lines as components of the vector that are used, mapping the codeword to a second set of physical signals, wherein components of the second set of physical signals can have values from a set of component values having at least three distinct values for at least one component, and providing the second set of physical signals for transmission over the data bus in a physical form. | 12-08-2011 |
20120213299 | METHODS AND SYSTEMS FOR NOISE RESILIENT, PIN-EFFICIENT AND LOW POWER COMMUNICATIONS WITH SPARSE SIGNALING CODES - In bus communications methods and apparatus, a first set of physical signals representing the information to be conveyed over the bus is provided, and mapped to a codeword of a sparse signaling code, wherein a codeword is representable as a vector of a plurality of components, some of which are quiescent components and some of which are non-quiescent components, wherein the number of quiescent components and non-quiescent components meet a sparseness requirement. | 08-23-2012 |
20130010892 | Methods and Systems for Low-power and Pin-efficient Communications with Superposition Signaling Codes - A communication system uses a bus to transmit information, by receiving signals and mapping them to a second set of signals representing codewords of a superposition signaling code, and transmitting the second set of signals. The superposition signaling code can comprise more than one layer. The pin-efficiency can be larger than 1. The system may encode bits into a codeword of a superposition signaling code that is defined by two basis vectors of predetermined size and then have two encoders for permutation modulation codes defined by the basis vectors. The bits of information are divided into a first part representing a predetermined number of bits and a second part representing a predetermined number of bits, with the parts provided to the respective encoding circuits and their outputs combined by a superposition. | 01-10-2013 |
20130013870 | DIFFERENTIAL VECTOR STORAGE FOR NON-VOLATILE MEMORY - A method is disclosed for storing information on non-volatile memory which can rewrite memory cells multiple times before a block needs to be erased. The information to be stored is transformed into a suitable form which has better robustness properties with respect to common sources of error, such as leakage of charge, or imperfect read/write units. | 01-10-2013 |
20140016724 | Power and Pin Efficient Chip-to-Chip Communications with Common-Mode Rejection and SSO Resilience - In bus communications methods and apparatus, a first set of physical signals representing the information to be conveyed over the bus is provided, and mapped to a codeword of a spherical code, wherein a codeword is representable as a vector of a plurality of components and the bus uses at least as many signal lines as components of the vector that are used, mapping the codeword to a second set of physical signals, wherein components of the second set of physical signals can have values from a set of component values having at least three distinct values for at least one component, and providing the second set of physical signals for transmission over the data bus in a physical form. | 01-16-2014 |
20140063915 | DIFFERENTIAL VECTOR STORAGE FOR DYNAMIC RANDOM ACCESS MEMORY - A storage device stores data in groups of memory cells using vectors corresponding to voltage code codewords, each codeword having k entries. Entries have values selected from a set of at least three entry values and 2 | 03-06-2014 |
20140177645 | Methods and Systems for Noise Resilient, Pin-Efficient and Low Power Communications with Sparse Signaling Codes - In bus communications methods and apparatus, a first set of physical signals representing the information to be conveyed over the bus is provided, and mapped to a codeword of a sparse signaling code, wherein a codeword is representable as a vector of a plurality of components, some of which are quiescent components and some of which are non-quiescent components, wherein the number of quiescent components and non-quiescent components meet a sparseness requirement. | 06-26-2014 |
20140198837 | Methods and Systems for Chip-to-Chip Communication with Reduced Simultaneous Switching Noise - Systems and methods are described for transmitting data over physical channels to provide a high speed, low latency interface such as between a memory controller and memory devices with significantly reduced or eliminated Simultaneous Switching Output noise. Controller-side and memory-side embodiments of such channel interfaces are disclosed which do not require additional pin count or data transfer cycles, have low power utilization, and introduce minimal additional latency. In some embodiments of the invention, three or more voltage levels are used for signaling. | 07-17-2014 |
20140254642 | Methods and Systems for High Bandwidth Chip-to-Chip Communications Interface - Systems and methods are described for transmitting data over physical channels to provide a high bandwidth, low latency interface between integrated circuit chips with low power utilization. Communication is performed using group signaling over multiple wires using a vector signaling code, where each wire carries a low-swing signal that may take on more than two signal values. | 09-11-2014 |
20140286387 | Rank-Order Equalization - For digital data transmitted using a vector signaling encoding, a rank-order equalizer cancels various channel noise such as inter-symbol interference. Further, rank-order units may be cascaded to achieve improved equalization over successive sample vector signals in a rank-order equalizer. Multiple rank-order equalizers further operate in parallel in a feed forward mode or in series in a feedback mode to provide a continuous vector signaling stream equalization. | 09-25-2014 |
20140376668 | Vector Signaling with Reduced Receiver Complexity - Methods and apparatuses are described to determine subsets of vector signaling codes capable of detection by smaller sets of comparators than required to detect the full code. The resulting lower receiver complexity allows systems utilizing such subset codes to be less complex and require less power. | 12-25-2014 |
20150063494 | Methods and Systems for Energy-Efficient Communications Interface - In a high-impedance communications interface, driver energy consumption is proportional to the number of signal transitions. For signals having three or more distinct levels, it is possible for a signal driver to salvage energy from some downward signal transitions and reuse it on some subsequent upward signal transitions. To facilitate this energy-conserving behavior, communication is performed using group signaling over sets of wires using a vector signaling code, with the design and use of the vector signaling code insuring that energy availability is balanced with energy demand. | 03-05-2015 |