Patent application number | Description | Published |
20080320241 | Data storage device performance optimization methods and apparatuses - Methods and apparatuses for identifying types of data streams and communicating stream information to improve performance of data storage devices are disclosed. Method embodiments generally comprise identifying one or more isochronous requests among a plurality of requests which may be issued to a data storage device, assigning a completion deadline an isochronous request, and communicating the isochronous request and completion deadline information to the data storage device. Apparatus embodiments generally comprise a request identifier to identify an isochronous request, a logic module to assign a completion deadline to the isochronous request, and a communication module to communicate the isochronous request and the completion deadline to a data storage device. Alternative apparatus embodiments may include a monitor module to monitor a system process operating in the system and determine if the system process issues isochronous requests. Various embodiments may process asynchronous requests, including prioritized asynchronous requests, with the isochronous requests. | 12-25-2008 |
20090164719 | Storage performance improvement using data replication on a disk - In some embodiments, disk accesses made during normal operation of a disk drive are monitored. One or more data blocks on the disk drive are identified as candidates for replication on the disk drive in response to the monitoring. Each of the identified data blocks are replicated in at least one other place on the disk drive. Other embodiments are described and claimed. | 06-25-2009 |
20090327773 | SERIAL ATA (SATA) POWER OPTIMIZATION THROUGH AUTOMATIC DEEPER POWER STATE TRANSITION - A host device and a storage device with a Serial ATA (SATA) architecture to independently transition to a deeper low power state after first entering an initial low power state without first transitioning to the Active state. The transition from the Partial state to the Slumber state is direct and the transition may be enabled, but not negotiated through a handshaking process. | 12-31-2009 |
20100250834 | METHOD AND SYSTEM TO PERFORM CACHING BASED ON FILE-LEVEL HEURISTICS - A method and system to perform caching based at least on one or more file-level heuristics. The caching of a storage medium in a caching device is performed by a cache policy engine. The cache policy engine receives file-level information of input/output access of data of the storage medium and caches or evicts the data of the storage medium in the caching device based on the received file-level information. By utilizing information about the files and file operations associated with the disk sectors or logical block addresses of the storage medium, the cache policy engine can make a better decision on the data selection of the storage medium to be cached in or evicted from the caching device in one embodiment of the invention. Higher cache hit rates can be achieved and the performance of the system utilizing the cache policy engine is improved. | 09-30-2010 |
20110153914 | REPURPOSING NAND READY/BUSY PIN AS COMPLETION INTERRUPT - A system and method of controlling a flash memory device such as a NAND memory device may involve receiving a command to execute an operation. A Ready/Busy contact of the memory device may be pulsed low in response to determining that execution of the operation has completed. | 06-23-2011 |
20120173794 | DRIVE ASSISTED SYSTEM CHECKPOINTING - Systems and methods of managing computing system restore points may include an apparatus having logic to receive a command to start a restore point for a solid state drive (SSD). The logic may also conduct a context drop of an indirection table from a volatile memory of the SSD to a non-volatile memory of the SSD in response to the command to start the restore point. | 07-05-2012 |
20120173903 | SERIAL ATA (SATA) POWER OPTIMIZATION THROUGH AUTOMATIC DEEPER POWER STATE TRANSITION - A host device and a storage device with a Serial ATA (SATA) architecture to independently transition to a deeper low power state after first entering an initial low power state without first transitioning to the Active state. The transition from the Partial state to the Slumber state is direct and the transition may be enabled, but not negotiated through a handshaking process. | 07-05-2012 |
20140019676 | REPURPOSING NAND READY/BUSY PIN AS COMPLETION INTERRUPT - A system and method of controlling a flash memory device such as a NAND memory device may involve receiving a command to execute an operation. A Ready/Busy contact of the memory device may be pulsed low in response to determining that execution of the operation has completed. | 01-16-2014 |
20140173242 | METHOD AND APPARATUS FOR CONTROLLING A STORAGE DEVICE - A mass storage device such as a disk drive or SSD (solid state drive) employs optimization logic for reduced power consumption in a host personal electronic device that identifies and prioritizes performance and power trade-offs by considering user expectations, user presence and application responsiveness. The storage device receives commands and information from the host device indicative of user expectations about application invocation, data freshness, and usage patterns, and determines a operational state indicative of behavior settings for reducing power consumption while maintaining the performance constraints required by the user expectations. The granularity of performance considerations communicated from the host device to the mass storage device is expanded to permit the storage device to determine, based on performance constraints from user expectations, appropriate and specific power reduction measures for maintaining the user experience. | 06-19-2014 |