Inventors list |
Assignees list |
Classification tree browser |
Top 100 Inventors |
Top 100 Assignees |
Alverson, US
Buddy Alverson, San Diego, CA US
| Patent application number | Description | Published |
|---|---|---|
| 20090295793 | Method and system for 3D surface deformation fitting - A method is provided for animating a three-dimensional object using an animation rig. An exemplary method according to the invention is a method that defines a positional relationship between the location of one or more known points on first surface and an equal number of corresponding points on a virtual surface, and a time interval. The time interval is incremented, and the positional offsets of one or more known points on the first surface are determined. The corresponding point or points on the virtual surface are then transformed by the positional offset, and the change in animation rig control values for the transformed points on the virtual surface are calculated. The animation rig control values are then updated based on said calculations. | 12-03-2009 |
David Herman Alverson, Richmond, KY US
| Patent application number | Description | Published |
|---|---|---|
| 20090122350 | Radio Frequency Identification Printing Device - This disclosure relates to a system, apparatus and method for incorporating radio frequency identification (RFID) technology into a printing device that may provide an assortment of functional performance capabilities. This may include the ability to scan media information such as text and/or images along with RFID identifier information and process, copy and/or forward such text media and/or identifier information to a remote location. | 05-14-2009 |
Kenneth L. Alverson, Redmond, WA US
| Patent application number | Description | Published |
|---|---|---|
| 20110302573 | METADATA DRIVEN AUTOMATIC DEPLOYMENT OF DISTRIBUTED SERVER SYSTEMS - Automatic and reliable deployment of system topology to computing devices within an enhanced communication system is provided. Specific roles and features associated with individual devices such as servers are defined in a centrally managed topology document, which is replicated to devices to be configured along with one or more modules for performing local configuration. Upon deployment, the module(s) determine a local device configuration, a desired configuration for the device, and update the device's configuration installing and activating roles and features assigned to the device by the topology document. Feedback regarding the results of the configuration is provided to a central management store such that administration can monitor status of devices within the system. Modifications to the assigned roles and prerequisites for supporting those roles are made dynamically through the same mechanism as system topology changes. | 12-08-2011 |
Kenneth Lloyd Alverson, Redmond, WA US
| Patent application number | Description | Published |
|---|---|---|
| 20090007095 | EXTENSIBLE DATA DRIVEN DEPLOYMENT SYSTEM - Systems and methods that facilitate deployment of server applications via employing a deployment system that declaratively defines deployment actions. Such system is extensible to enable user customization, and includes a deployment document that declaratively defines deployment terms. The deployment document can further describe what the tasks accomplish, and also what tasks are to be forwarded to the task handler at execution time. | 01-01-2009 |
Robert Alverson, Seattle, WA US
| Patent application number | Description | Published |
|---|---|---|
| 20080304479 | ONE-WAY MESSAGE NOTIFICATOIN WITH OUT-OF-ORDER PACKET DELIVERY - A multiprocessor computer system comprises a sending processor node and a receiving processor node. The sending processor node is operable to send packets comprising part of a message to a receiver, and to send a message complete packet after all packets in the message are sent. The message complete packet includes an indicator of the number of packets in the message, and the message is recognized as complete in the receiver once the number of packets indicated in the message complete packet have been received for the message. The sender tracks acknowledgment from the receiver of receipt of the sent packets; and notifies the receiver when it has received all packets comprising a part of the message. | 12-11-2008 |
| 20080304491 | RELIABLE MESSAGE TRANSPORT NETWORK - A multiprocessor computer system comprises a sending processor node and a receiving processor node. The sending processor node is operable to send packets comprising part of a message to a receiver, to maintain a message buffer entry in the sender comprising the sent packets, to track acknowledgment from the receiver that sent packets have been received; to maintain a timer indicating the time since message data has been sent, and to resend packets not acknowledged upon the timer reaching a timeout state. The receiving processor node is operable to send acknowledgement to the sender that received packets have been received, to track packets using a received message table to track which packets comprising part of the message have been received and whether all packets in the message have been received, and to process packets once all packets in a message are received to reassemble the received message. | 12-11-2008 |
| 20100115228 | Unified address space architecture - A multiprocessor computer system has a plurality of first processors having a first addressable memory space, and a plurality of second processors having a second addressable memory space. The second addressable memory space is of a different size than the first addressable memory space, and the first addressable memory space and second addressable memory space comprise a part of the same common address space. | 05-06-2010 |
| 20100115234 | CONFIGURABLE VECTOR LENGTH COMPUTER PROCESSOR - A processor core, comprises one or more vector units operable to change between a fine-grained vector mode having a shorter maximum vector length and a coarse-grained vector mode having a longer maximum vector length. Changing vector modes comprises halting all instruction stream execution in the core, flushing one or more registers in a register space, reconfiguring one or more vector registers in the register space, and restarting instruction execution in the core. | 05-06-2010 |
| 20100318626 | EXTENDED FAST MEMORY ACCESS IN A MULTIPROCESSOR COMPUTER SYSTEM - A multiprocessor computer system comprises a first node operable to access memory local to a remote node by receiving a virtual memory address from a requesting entity in node logic in the first node. The first node creates a network address from the virtual address received in the node logic, where the network address is in a larger address space than the virtual memory address, and sends a fast memory access request from the first node to a network node identified in the network address. | 12-16-2010 |
Robert W. Alverson, Soddy-Daisy, TN US
| Patent application number | Description | Published |
|---|---|---|
| 20100004150 | ALUMINUM CHELATES - Provided are aluminum chelates having the formula (I). Also provided are compositions having these chelates, methods of producing these chelates, and methods of modifying the viscosity of a liquid or a semisolid using these chelates. | 01-07-2010 |
Steven P. Alverson, Cicero, IN US
| Patent application number | Description | Published |
|---|---|---|
| 20080297171 | TRANSCEIVER SYSTEM THAT ESTIMATES A VOLTAGE STANDING WAVE RATIO - A transceiver system and method determining a voltage standing wave ratio (VSWR) is provided. The system includes at least one amplifier, a filter bank, a plurality of detectors, and at least one processor. The at least one amplifier receives an input signal. The filter bank is in electrical communication with the at least one amplifier. The plurality of detectors are in electrical communication with the filter bank, where a first detector of the plurality of detectors is in electrical communication with a first portion of the filter bank, and a second detector of the plurality of detectors is in electrical communication with a second portion of the filter bank. The at least one processor is in electrical communication with the plurality of detectors, and estimates a VSWR based upon voltages detected by the first and second detectors. | 12-04-2008 |