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Alkire

Brian Alkire, Phoenix, AZ US

Patent application numberDescriptionPublished
20100036275EEG NET WITH TRANSMISSION CAPABILITIES - An improved apparatus and method of using an EEG net to obtain electroencephalographic measurements from a patient in an emergent or urgent care setting. The net is comprised of a headpiece with a plurality of straps and recording ports formed therein. A recording head of an electrode is associated with each recording port and is pre-incorporated into the net. Transmitting wires are associated with each electrode head and have common terminating points. The terminus of each wire is hard wired into a connecting device that can be directly mated to a receiving console or remotely transmit wirelessly the electrode signals.02-11-2010

Michael Alkire, Costa Mesa, CA US

Patent application numberDescriptionPublished
20120083647METHOD FOR CHANGING AN INDIVIDUAL'S STATE OF CONSCIOUSNESS - This invention concerns a method for altering an individual's level of consciousness by directing stimulation or inhibition to a CNS locus target region in the individual's brain that is responsible for consciousness.04-05-2012

Randy Alkire, Romeoville, IL US

Patent application numberDescriptionPublished
20090027057Ethernet Electrometer - An electrometer includes an input terminal adapted to receive an input signal an ethernet terminal, a web server, and a microcontroller. The ethernet terminal is adapted to receive an ethernet cable such that electrical power is provided to the ethernet terminal. The web server is in electrical communication with the ethernet terminal, and is adapted to receive a command. The microcontroller is in electrical communication with at least one of the ethernet terminal and the web server, and is adapted to execute the received command.01-29-2009

Robert Dale Alkire, San Jose, CA US

Patent application numberDescriptionPublished
20090136091DATA PROCESSING SYSTEM AND METHOD - A powerful, scaleable, and reconfigurable image processing system and method of processing data therein is described. This general purpose, reconfigurable engine with toroidal topology, distributed memory, and wide bandwidth I/O are capable of solving real applications at real-time speeds. The reconfigurable image processing system can be optimized to efficiently perform specialized computations, such as real-time video and audio processing. This reconfigurable image processing system provides high performance via high computational density, high memory bandwidth, and high I/O bandwidth. Generally, the reconfigurable image processing system and its control structure include a homogeneous array of 16 field programmable gate arrays (FPGA) and 16 static random access memories (SRAM) arranged in a partial torus configuration. The reconfigurable image processing system also includes a PCI bus interface chip, a clock control chip, and a datapath chip. It can be implemented in a single board. It receives data from its external environment, computes correspondence, and uses the results of the correspondence computations for various post-processing industrial applications. The reconfigurable image processing system determines correspondence by using non-parametric local transforms followed by correlation. These non-parametric local transforms include the census and rank transforms. Other embodiments involve a combination of correspondence, rectification, a left-right consistency check, and the application of an interest operator.05-28-2009
20110210851Generation of a disparity result with low latency - A powerful, scaleable, and reconfigurable image processing system and method of processing data therein is described. This general purpose, reconfigurable engine with toroidal topology, distributed memory, and wide bandwidth I/O are capable of solving real applications at real-time speeds. The reconfigurable image processing system can be optimized to efficiently perform specialized computations, such as real-time video and audio processing. This reconfigurable image processing system provides high performance via high computational density, high memory bandwidth, and high I/O bandwidth. Generally, the reconfigurable image processing system and its control structure include a homogeneous array of 09-01-2011

Patent applications by Robert Dale Alkire, San Jose, CA US