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Alfred T.
Alfred T. Degbotse, Colchester, VT US
| Patent application number | Description | Published |
|---|---|---|
| 20090222312 | SUPPLY CONSUMPTION OPTIMIZATION AND MULTIPLE COMPONENT UTILITZATION - The invention disclosed here is a method for achieving simultaneous consideration of multiple independent dates associated with a single demand. The method iterates through the demands to match the demands with the supply quantities respecting demand priorities which vary over time and demand quantities which may perish over time. One embodiment of the invention allocates demand to supply through an iterative process beginning with earlier demand requirement dates and concluding with later demands which may preempt supply from earlier demands depending upon their relative priorities. An additional embodiment transforms the demands to create multiple demand records, each having an associated priority, such that a single original demand record is transformed into a plurality of related demand records, each having an associated priority. The component supply quantities are accumulated into period ending inventories. The method matches the multiple demand records (in priority sequence) to the period ending inventories. | 09-03-2009 |
Alfred T. Rundle, Jr., Endwell, NY US
| Patent application number | Description | Published |
|---|---|---|
| 20110213491 | SYSTEMS AND METHODS FOR MAIL FORWARDING AND SPECIAL HANDLING SERVICES - Methods and systems for mail forwarding and special handling services are disclosed. The methods and systems can include processing mail in a single pass or in multiple passes (i.e., online or offline). The methods and systems can include one or more of a scannable symbol, an extra appended post code digit, a dedicated database field, separate table indexed by a control number, a logically separate database, or a database hosted on a separate server for use in identifying mail pieces needing special handling and retrieving special handling information, for example forwarding address text for such mail pieces. | 09-01-2011 |
Alfred T. Schremer, Freeville, NY US
| Patent application number | Description | Published |
|---|---|---|
| 20100015743 | ETCHED-FACET RIDGE LASERS WITH ETCH-STOP - A photonic device incorporates an epitaxial structure having an active region, and which includes a wet etch stop layer above, but close to, the active region. An etched-facet ridge laser is fabricated on the epitaxial structure by dry etching followed by wet etching. The dry etch is designed to stop before reading the depth needed to form the ridge. The wet etch completes the formation of the ridge and stops at the wet etch stop layer. | 01-21-2010 |
| 20100091810 | MULTI-LEVEL INTEGRATED PHOTONIC DEVICES - A laser and electroabsorption modulator (EAM) are monolithically integrated through an etched facet process. Epitaxial layers on a wafer include a first layer for a laser structure and a second layer for an EAM structure. Strong optical coupling between the laser and the EAM is realized by using two 45-degree turning mirrors to route light vertically from the laser waveguide to the EAM waveguide. A directional angled etch process is used to form the two angled facets. | 04-15-2010 |
| 20100099209 | MULTI-LEVEL INTEGRATED PHOTONIC DEVICES - A laser and electroabsorption modulator (EAM) are monolithically integrated through an etched facet process. Epitaxial layers on a wafer include a first layer for a laser structure and a second layer for an EAM structure. Strong optical coupling between the laser and the EAM is realized by using two 45-degree turning mirrors to route light vertically from the laser waveguide to the EAM waveguide. A directional angled etch process is used to form the two angled facets. | 04-22-2010 |
| 20110032967 | SINGLE LONGITUDINAL MODE LASER DIODE - A single-mode, etched facet distributed Bragg reflector laser includes an AlGaInAs/InP laser cavity, a front mirror stack with multiple Fabry-Perot elements, a rear DBR reflector, and a rear detector. The front mirror stack elements and the rear reflector elements include input and output etched facets, and the laser cavity is an etched ridge cavity, all formed from an epitaxial wafer by a two-step lithography and CAIBE process. | 02-10-2011 |
Alfred T. Schremer, Jr., Freeville, NY US
| Patent application number | Description | Published |
|---|---|---|
| 20110019708 | HIGH SMSR UNIDIRECTIONAL ETCHED LASERS AND LOW BACK-REFLECTION PHOTONIC DEVICE - Unidirectionality of lasers is enhanced by forming one or more etched gaps ( | 01-27-2011 |
Alfred T. Watson, Iii, Rochester, MN US
| Patent application number | Description | Published |
|---|---|---|
| 20090157976 | Network on Chip That Maintains Cache Coherency With Invalidate Commands - A network on chip (‘NOC’) that maintains cache coherency with invalidate commands, the NOC comprising integrated processor (‘IP’) blocks, routers, memory communications controllers, and network interface controller, each IP block adapted to a router through a memory communications controller and a network interface controller, the NOC also including a port on a router of the network through which is received an invalidate command, the invalidate command including an identification of a cache line, the invalidate command representing an instruction to invalidate the cache line, the router configured to send the invalidate command to an IP block served by the router; the router further configured to send the invalidate command horizontally and vertically to neighboring routers if the port is a vertical port; and the router further configured to send the invalidate command only horizontally to neighboring routers if the port is a horizontal port. | 06-18-2009 |
| 20110167296 | REGISTER FILE SOFT ERROR RECOVERY - Register file soft error recovery including a system that includes a first register file and a second register file that mirrors the first register file. The system also includes an arithmetic pipeline for receiving data read from the first register file, and error detection circuitry to detect whether the data read from the first register file includes corrupted data. The system further includes error recovery circuitry to insert an error recovery instruction into the arithmetic pipeline in response to detecting the corrupted data. The inserted error recovery instruction replaces the corrupted data in the first register file with a copy of the data from the second register file. | 07-07-2011 |