| Patent application number | Description | Published |
|---|
| 20080258042 | IMAGE SENSOR CIRCUITS AND METHODS WITH MULTIPLE READOUT LINES PER COLUMN OF PIXEL CIRCUITS - An image sensor circuit of various embodiments includes a pixel array with a plurality of pixel circuits arranged in a plurality of rows and a plurality of columns. Each column of the pixel array includes a corresponding first set of pixel circuits connected to output analog pixel signals to a respective first column readout line, and a corresponding second set of pixel circuits connected to output analog pixel signals to a respective second column readout line. Two or more analog-to-digital conversion circuits may be provided for each column of pixel circuits in the pixel array, and two or more rows of pixel circuits in the pixel array may be activated to output analog pixel signals to corresponding column readout lines at a same time. | 10-23-2008 |
| 20090273500 | IMAGE SENSORS AND DUAL RAMP ANALOG-TO-DIGITAL CONVERTERS AND METHODS - Dual ramp analog-to-digital converters and methods allow for performing analog-to-digital conversion of an analog signal. Various dual ramp analog-to-digital converters and methods allow for applying the analog signal and a coarse ramp to a same input of a comparator, and applying a fine ramp to another input of the comparator. Some dual ramp analog-to-digital converters and methods allow for applying the analog signal, a coarse ramp, and a fine ramp to a same input of a comparator. Various dual ramp analog-to-digital converters and methods allow for applying the analog signal to an input of a first comparator, applying a coarse ramp to the input of the first comparator through a coarse ramp switch, applying the analog signal to an input of a second comparator, and applying a fine ramp to another input of the second comparator. | 11-05-2009 |
| 20090273694 | IMAGE SENSORS AND METHODS WITH COLUMN READOUT CIRCUITS - An image sensor includes a pixel array, a plurality of column readout lines, and a plurality of column readout circuits. The pixel array includes a plurality of pixels arranged in a plurality of rows and a plurality of columns. Each of the plurality of column readout lines is connected to a corresponding at least two pixels of the plurality of pixels. Each of the plurality of column readout circuits is connected to a corresponding column readout line of the plurality of column readout lines and includes an amplifier, a first capacitor connected between the corresponding column readout line and an input of the amplifier, and a second capacitor connected between the corresponding column readout line and the input of the amplifier. | 11-05-2009 |
| 20090273696 | IMAGE SENSORS AND METHODS WITH ANTIBLOOMING CHANNELS AND TWO SIDE DRIVING OF CONTROL SIGNALS - An image sensor of various embodiments includes a pixel array. The pixel array includes a pixel having a photodiode and a transfer gate. The pixel array in various embodiments further includes an antiblooming channel extending from the photodiode to either (i) a pixel output area, or (ii) a drain of a source follower transistor. A method of some embodiments includes (i) driving from a first row driver one or more control signals over one or more control lines to one or more pixels, and (ii) driving from a second row driver the one or more control signals over the one or more control lines to the one or more pixels. | 11-05-2009 |
| 20100097507 | HIGH SPEED CMOS IMAGE SENSOR CIRCUITS WITH BLOCK MEMORY READOUT - An image sensor circuit includes a pixel array, a plurality of column analog-to-digital conversion (ADC) circuits, and at least two memory blocks. Each column ADC circuit is connected to receive analog pixel signals provided from corresponding pixel circuits of the pixel array, and is configured to convert the received analog pixel signals into digital pixel signals. Each memory block is connected to receive digital pixel signals provided from corresponding column ADC circuits of the plurality of column ADC circuits. At least two of the at least two memory blocks are connected to receive digital pixel signals that are provided from corresponding column ADC circuits that are located to a same side of the pixel array. Each memory block of the at least two memory blocks includes a plurality of memory cells, one or more sense amplifiers connected to the memory cells by a readout bus, and a memory controller. | 04-22-2010 |
| 20110139963 | IMAGE SENSORS, METHODS, AND PIXELS WITH STORAGE AND TRANSFER GATES - An image sensor includes a pixel array with a plurality of pixels. A pixel includes a photodiode, a first transfer gate, a storage gate, and a second transfer gate. The first transfer gate is controllable to transfer charge from the photodiode to under the storage gate. The storage gate is connected to a readout circuit to allow the readout circuit to read out a voltage level of a potential at the storage gate. The second transfer gate is controllable to transfer charge from under the storage gate. A method includes controlling the first transfer gate to transfer charge from the photodiode to under the storage gate, reading out a voltage level of a potential at the storage gate using the readout circuit that is connected to the storage gate, and controlling the second transfer gate to drain charge from under the storage gate. | 06-16-2011 |
