Patent application number | Description | Published |
20080204055 | CROSSTALK SUPPRESSION IN WIRELESS TESTING OF SEMICONDUCTOR DEVICES - An integrated circuit integrated on a semiconductor material die and adapted to be at least partly tested wirelessly, wherein circuitry for setting a selected radio communication frequencies to be used for the wireless test of the integrated circuit are integrated on the semiconductor material die. | 08-28-2008 |
20100164526 | MEMS PROBE FOR PROBE CARDS FOR INTEGRATED CIRCUITS - A MEMS probe adapted to contact a corresponding terminal of an integrated circuit, integrated on at least one chip of a semiconductor material wafer during a test phase of the wafer is provided. The probe includes a support structure comprising a first access terminal and a second access terminal; the support structure defines a conductive path between said first access terminal and said second access terminal. The probes further-includes a probe region connected to the support structure adapted to contact the corresponding terminal of the integrated circuit during the test phase for providing at least one test signal received from the first access terminal and the second access terminal to the integrated circuit through at least one portion of the conductive path, and/or providing at least one test signal generated by the integrated circuit to at least one between the first access terminal and the second access terminal trough at least one portion of the conductive path. The probe region is arranged on the conductive path of the support structure between said first access terminal and said second access terminal. | 07-01-2010 |
20110109342 | CROSSTALK SUPPRESSION IN WIRELESS TESTING OF SEMICONDUCTOR DEVICES - An integrated circuit integrated on a semiconductor material die and adapted to be at least partly tested wirelessly, wherein circuitry for setting a selected radio communication frequencies to be used for the wireless test of the integrated circuit are integrated on the semiconductor material die. | 05-12-2011 |
20110278568 | MANUFACTURING PROCESS OF INTEGRATED ELECTRONIC CIRCUITS AND CIRCUITS THEREBY OBTAINED - An embodiment of a manufacturing process of an integrated electronic circuit is proposed; the process comprises forming a substrate comprising a plurality of functional components of the electronic circuit, creating a plurality of conductive layers on such substrate to form an electric contact region with high hardness equal to or greater than a first hardness value of about 300 HV, contacting the electric contact region with a probe and running an electric test of the electronic circuit. In an embodiment, the process further comprises, after the test run, creating a covering conductive layer on at least one part of the electric contact region contacted by the probe. | 11-17-2011 |
20110291679 | TESTING INTEGRATED CIRCUITS - A method of testing integrated circuits is provided. The method includes establishing at least one first physical communication channel between a test equipment and a respective group of integrated circuits under test by having probes of the test equipment contacting at least one corresponding physical contact terminal of each integrated circuit of the respective group. The method further includes having the test equipment exchanging, over the at least one first physical communication channel, the same test stimuli with each integrated circuit of the group. The method still further includes having each integrated circuit of the group establishing a corresponding second physical communication channel with the test equipment by having at least one physical contact terminal of the integrated circuit contacted by a corresponding probe of the test equipment. The method further includes having each integrated circuit of the group exchanging, over the second physical communication channel, a corresponding test response signal based on the received test stimuli with the test equipment. The test stimuli are exchanged by modulating at least one first carrier wave based on the test stimuli; the at least one first carrier wave has at least one first frequency. The test response signals of each integrated circuit of the group are exchanged by modulating at least one respective second carrier wave based on the test response signals; each second carrier wave have at least one respective second frequency. | 12-01-2011 |
20120068725 | SENSING STRUCTURE OF ALIGNMENT OF A PROBE FOR TESTING INTEGRATED CIRCUITS - A sensing structure for use in testing integrated circuits on a substrate. The sensing structure includes at least two sensing regions connectable to a probe and at least one first sensing element. Each of the at least one first sensing elements is directly connected to two sensing regions such that for each sensing region a different value of an electrical parameter is measurable between the sensing region and a first reference potential so as to reliably determine a drift direction of a probe. | 03-22-2012 |
20130027073 | INTEGRATED CIRCUIT COMPRISING AT LEAST AN INTEGRATED ANTENNA - An integrated circuit on a substrate including at least one peripheral portion that surrounds an active area and is realized close to at least one scribe line providing separation with other integrated circuits realized on a same wafer. The integrated circuit includes at least one conductive structure that extends in its peripheral portion on different planes starting from the substrate and realizes an integrated antenna for the circuit. | 01-31-2013 |
20130120012 | TESTING INTEGRATED CIRCUITS USING FEW TEST PROBES - A method of testing integrated circuits, including establishing at least a first physical communication channel between a test equipment and an integrated circuit under test by having at least a first probe of the test equipment contacting a corresponding physical contact terminal of the integrated circuit under test; having the test equipment and the integrated circuit under test exchange, over said first physical communication channel, at least two signals selected from the group including at least two test stimuli and at least two test response signals, wherein said at least two signals are exchanged by means of at least one modulated carrier wave modulated by the at least two signals. | 05-16-2013 |
20130282119 | RETINAL PROSTHESIS - A retinal prosthesis including an electronic stimulation unit housed inside an eye and including: a plurality of electrodes that contact a portion of a retina of the eye; an electronic control circuit, which is electrically connected to the electrodes and supplies to the electrodes electrical stimulation signals designed to stimulate the portion of retina; and a local antenna connected to the electronic control circuit. The retinal prosthesis further includes an electromagnetic expansion housed inside the eye and formed by a first expansion antenna and a second expansion antenna electrically connected together, the first expansion antenna being magnetically or electromagnetically coupled to an external antenna, the second expansion antenna being magnetically or electromagnetically couple to the local antenna, the electromagnetic expansion moreover receiving an electromagnetic supply signal transmitted by the external antenna and generating a corresponding replica signal. | 10-24-2013 |