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Akiyoshi Seko

Akiyoshi Seko, Chuo-Ku JP

Patent application number	Description	Published
20100246241	SEMICONDUCTOR DEVICE WITH SOURCE LINES EXTENDING IN A DIFFERENT DIRECTION - A semiconductor device includes a plurality of word lines extending in a first direction, a plurality of bit lines extending in a second direction, a plurality of source lines formed along a third direction which is different from the first and the second directions, and a source line control circuit serving as a driving arrangement selectively driving the plurality of source lines.	09-30-2010
20100246302	SEMICONDUCTOR MEMORY DEVICE - In a semiconductor memory device storing a resistance difference as information, a long time is taken so as to charge and/or discharge a selected cell by an equalizer circuit, which results in a difficulty of a high speed operation. A selection circuit puts, in a selected state, at least three bit lines which includes a selected bit line connected to a selected memory cell together with unselected bit lines adjacent to the selected bit line on both sides of the selected bit line. The selected and the unselected bit lines are coupled to sense amplifiers through an equalizer circuit. The equalizer circuit puts both the selected and the unselected bit lines into charging states and thereafter puts only the selected bit line into a discharging state to perform a sensing operation. On the other hand, the unselected bit lines are continuously kept at the charging states during the sensing operation. This makes it possible to perform the sensing operation at a high speed with a rare malfunction.	09-30-2010

Akiyoshi Seko, Tokyo JP

Patent application number	Description	Published
20090101885	Method of producing phase change memory device - An area where a lower electrode is in contact with a variable resistance material needs to be reduced in order to lower the power consumption of a variable resistance memory device. The present invention provides a method of producing a variable resistance memory element whereby the lower electrode can be more finely formed. The method of producing a semiconductor device according to the present invention includes forming a small opening by utilizing cubical expansion due to the oxidation of silicon. Thereby forming the lower electrode smaller than that can be formed by lithography techniques.	04-23-2009
20090104779	Method of producing phase change memory device - An area where a lower electrode is in contact with a variable resistance material needs to be reduced to lower the power consumption of a variable resistance memory device. The present invention is to provide a method of producing a variable resistance memory element whereby the lower electrode can be formed smaller. Combining an anisotropic etching process with an isotropic etching process enables the lower electrode to be formed smaller.	04-23-2009
20090221146	Nonvolatile memory device and manufacturing method for the same - The object of the present invention is to provide a manufacturing method for a nonvolatile memory device including a variable resistance having a constricted shape. The nonvolatile memory device of the present invention has a storage section composed of two electrodes and a variable resistance sandwiched between the electrodes. The variable resistance is formed to a constricted shape between the electrodes.	09-03-2009
20100078616	NONVOLATILE MEMORY DEVICE AND MANUFACTURING PROCESS THEREOF - A nonvolatile memory device has a first insulating layer, a variable resistance layer provided on the first insulating layer and having a variable resistance material, and a first electrode and second electrode electrically connected with the variable resistance layer. The variable resistance layer has a variable resistance region as a data storing region and a thickness-changing region continuously extending from the variable resistance region and gradually becoming thicker from the variable resistance region.	04-01-2010
20100123114	NONVOLATILE MEMORY DEVICE - A nonvolatile memory device (	05-20-2010
20100195415	Semiconductor memory device and reading method therefor - A memory device is configured such that, in a read access: a first switch and a second switch are turned on in a pre-charge period before a memory cell is accessed so that charges of a bit line charge voltage generating circuit are distributed to a bit line and a reference bit line, to thereby charge the bit line and the reference bit line to an initial voltage. After the charge, a selected memory cell is connected to the bit line, the reference bit line is connected to a reference voltage generating circuit, and a voltage differential type sense amplifier amplifies a difference voltage between a voltage of the bit line decreased by discharge of the selected memory cell and a voltage of the reference bit line generated by the reference voltage generating circuit, to thereby read out memory cell data.	08-05-2010