Patent application number | Description | Published |
20080315288 | MEMORY CELL OF NONVOLATILE SEMICONDUCTOR MEMORY - A memory cell of a nonvolatile semiconductor memory includes a semiconductor region, source/drain areas arranged separately from each other in the semiconductor region, a tunnel insulating film arranged on a channel region between the diffusion areas, a floating gate electrode arranged on the tunnel insulating film, an inter-electrode insulator arranged on the floating gate electrode, and a control gate electrode arranged on the inter-electrode insulator. The inter-electrode insulator includes lanthanoid-based metal Ln, aluminum Al, and oxygen O, and a composition ratio Ln/(Al+Ln) between the lanthanoid-based metal and the aluminum takes a value within the range of 0.33 to 0.39. | 12-25-2008 |
20090057750 | NONVOLATILE SEMICONDUCTOR MEMORY ELEMENT AND MANUFACTURING METHOD THEREOF - A nonvolatile semiconductor memory element includes a semiconductor substrate, a source region and a drain region which are provided separately in the semiconductor substrate, a tunnel insulating layer which is provided between the source region and the drain region on the semiconductor substrate, a charge storage layer which is provided on the tunnel insulating layer, a block insulating layer which is provided on the charge storage layer and includes a crystallized lanthanum aluminate layer, and a control gate electrode which is provided on the block insulating layer. | 03-05-2009 |
20090057751 | NONVOLATILE SEMICONDUCTOR MEMORY DEVICE - A nonvolatile semiconductor memory device according to an example of the present invention includes a semiconductor region, source/drain areas arranged separately in the semiconductor region, a tunnel insulating film arranged on a channel region between the source/drain areas, a floating gate electrode arranged on the tunnel insulating film, an inter-electrode insulating film arranged on the floating gate electrode, and a control gate electrode arranged on the inter-electrode insulating film. The inter-electrode insulating film includes La, Al and Si. | 03-05-2009 |
20090114995 | COMPLEMENTARY SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME - A complementary semiconductor device includes a semiconductor substrate, a first semiconductor region formed on a surface of the semiconductor substrate, a second semiconductor region formed on the surface of the semiconductor substrate apart from the first semiconductor region, an n-MIS transistor having a first gate insulating film including La and Al, formed on the first semiconductor region, and a first gate electrode formed on the gate insulating film, and a p-MIS transistor having a second gate insulating film including La and Al, formed on the second semiconductor region, and a second gate electrode formed on the gate insulating film, an atomic density ratio Al/La in the second gate insulating film being larger than an atomic density ratio Al/La in the first gate insulating film. | 05-07-2009 |
20090206393 | NONVOLATILE MEMORY ELEMENT AND METHOD OF MANUFACTURING THE SAME - A nonvolatile memory element includes a semiconductor region, a source region and a drain region provided in the semiconductor region, a tunnel insulating layer provided on the semiconductor region between the source region and the drain region, a charge storage layer provided on the tunnel insulating layer, a block insulating layer provided on the charge storage layer, and a control gate electrode provided on the block insulating layer. The charge storage layer includes one of an oxide, a nitride and an oxynitride, which contains at least one material selected from the group consisting of Hf, Al, Zr, Ti and a rare-earth metal, and is entirely or partially crystallized. The block insulating layer includes one of an oxide, an oxynitride, a silicate and an aluminate, which contains at least one rare-earth metal. | 08-20-2009 |
20100072535 | NONVOLATILE SEMICONDUCTOR MEMORY DEVICE - A nonvolatile semiconductor memory device includes a source region and a drain region provided apart from each other in a semiconductor substrate, a first insulating film provided on a channel region between the source region and the drain region, a charge storage layer provided on the first insulating film, a second insulating film provided on the charge storage layer and including a stacked structure of a lanthanum aluminum silicate film and a dielectric film made of silicon oxide or silicon oxynitride, and a control gate electrode provided on the second insulating film. | 03-25-2010 |
20120025297 | NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR MANUFACTURING THE SAME - According to one embodiment, a nonvolatile semiconductor memory device includes a source region and a drain region provided on a surface area of a semiconductor region, a tunnel insulating film provided on a channel between the source region and the drain region, a charge storage layer provided on the tunnel insulating film, a first dielectric film provided on the charge storage layer and containing lanthanum aluminum silicon oxide or oxynitride, a second dielectric film provided on the first dielectric film and containing oxide or oxynitride containing at least one of hafnium (Hf), zirconium (Zr), titanium (Ti), and a rare earth metal, and a control gate electrode provided on the second dielectric film. | 02-02-2012 |
20120068250 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF - According to one embodiment, a semiconductor device includes a semiconductor region, a tunnel insulating film provided on the semiconductor region, a charge storage insulating film provided on the tunnel insulating film and having a hafnium oxide including a cubic region, a block insulating film provided on the charge storage insulating film, and a control gate electrode provided on the block insulating film. | 03-22-2012 |
20120243292 | MEMORY DEVICE - According to one embodiment, a memory device includes a first electrode including a crystallized Si | 09-27-2012 |
20120243293 | NONVOLATILE SEMICONDUCTOR MEMORY DEVICE - According to one embodiment, a nonvolatile semiconductor memory device includes a memory cell includes a variable resistance element and a capacitor connected in series between first and second conductive lines, and a control circuit applying one of first and second voltage pulses to the memory cell. The capacitor is charged by a leading edge of one of the first and second voltage pulses, and discharged a trailing edge of one of the first and second voltage pulses. The control circuit makes waveforms of the trailing edges of the first and second voltage pulses be different, changes a resistance value of the variable resistance element from a first resistance value to a second resistance value by using the first voltage pulse, and changes the resistance value of the variable resistance element from the second resistance value to the first resistance value by using the second voltage pulse. | 09-27-2012 |
20120250394 | RESISTANCE CHANGE MEMORY - According to one embodiment, a resistance change memory includes a memory cell including a resistance change element and a stacked layer structure which are connected in series, a control circuit configured to control a first operation of changing the resistance change element from a first resistance value to a second resistance value lower than the first resistance value, and a voltage pulse generating circuit configured to generate a first voltage pulse to be applied to the memory cell in the first operation. The stacked layer structure includes two conductive layers and an insulating layer formed between the two conductive layers. Amplitude of the first voltage pulse is in a first voltage area in which the stacked layer structure functions as a capacitor. The first voltage pulse satisfies Ron×C10-04-2012 | |
20130056819 | NONVOLATILE SEMICONDUCTOR MEMORY - According to one embodiment, a nonvolatile semiconductor memory includes a semiconductor layer, a first insulating layer on the semiconductor layer, a charge storage layer on the first insulating layer, a second insulating layer on the charge storage layer, and a control gate electrode on the second insulating layer. The second insulating layer comprises a stacked structure provided in order of a first lanthanum aluminate layer, a lanthanum aluminum silicate layer and a second lanthanum aluminate layer from the charge storage layer side to the control gate electrode side. | 03-07-2013 |
20130328008 | NONVOLATILE RESISTANCE CHANGE ELEMENT - According to one embodiment, a nonvolatile resistance change element includes a first electrode, a second electrode and a first layer. The first electrode includes a metal element. The second electrode includes an n-type semiconductor. The first layer is formed between the first electrode and the second electrode and includes a semiconductor element. The first layer includes a conductor portion made of the metal element. The conductor portion and the second electrode are spaced apart. | 12-12-2013 |
20130328009 | NONVOLATILE VARIABLE RESISTANCE ELEMENT - According to one embodiment, a nonvolatile variable resistance element includes a first electrode, a second electrode, a variable resistance layer, and a dielectric layer. The second electrode includes a metal element. The variable resistance layer is arranged between the first electrode and the second electrode. A resistance change is reversibly possible in the variable resistance layer according to move the metal element in and out. The dielectric layer is inserted between the second electrode and the variable resistance layer and has a diffusion coefficient of the metal element smaller than that of the variable resistance layer. | 12-12-2013 |
20130329485 | NONVOLATILE SEMICONDUCTOR MEMORY DEVICE INCLUDING VARIABLE RESISTANCE ELEMENT - According to one embodiment, a nonvolatile semiconductor memory device includes a memory cell array and a control circuit. The memory cell array include the memory cells each including a variable resistance element in which a reset current flowing in a reset operation is smaller than a set current flowing in a set operation by not less than one order of magnitude. The control circuit performs the reset operation and the set operation for the memory cells. The control circuit performs the reset operation for all memory cells being in the low resistance state and connected to selected first interconnections and selected second interconnections. | 12-12-2013 |
20140021528 | SEMICONDUCTOR DEVICE, AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE - A semiconductor device includes: a semiconductor region; a plurality of stacked structures each of which is disposed on the semiconductor region and has a tunnel insulating film, a charge storage layer, an upper insulating layer, and a control electrode stacked sequentially; an element isolation insulating layer disposed on side faces of the plurality of stacked structures; and a source-drain region disposed on the semiconductor region and among the plurality of stacked structures. The element isolation insulating layer includes at least one of SiO | 01-23-2014 |
20140061764 | NONVOLATILE SEMICONDUCTOR MEMORY DEVICE - According to one embodiment, a nonvolatile semiconductor memory device includes a semiconductor substrate, a first gate insulating film, a charge storage layer, a second gate insulating film, and a control gate electrode. The first gate insulating film is arranged on the semiconductor substrate. The charge storage layer is arranged on the first gate insulating film, and includes aluminum and silicon. The second gate insulating film is arranged on the charge storage layer, and includes aluminum, silicon, and lanthanum. The control gate electrode is arranged on the second gate insulating film. | 03-06-2014 |
20140346434 | NONVOLATILE VARIABLE RESISTANCE ELEMENT - According to one embodiment, a nonvolatile variable resistance element includes a first electrode, a second electrode, a variable resistance layer, and a dielectric layer. The second electrode includes a metal element. The variable resistance layer is arranged between the first electrode and the second electrode. A resistance change is reversibly possible in the variable resistance layer according to move the metal element in and out. The dielectric layer is inserted between the second electrode and the variable resistance layer and has a diffusion coefficient of the metal element smaller than that of the variable resistance layer. | 11-27-2014 |
20140376303 | NONVOLATILE SEMICONDUCTOR MEMORY DEVICE INCLUDING VARIABLE RESISTANCE ELEMENT - According to one embodiment, a nonvolatile semiconductor memory device includes a memory cell array and a control circuit. The memory cell array include the memory cells each including a variable resistance element in which a reset current flowing in a reset operation is smaller than a set current flowing in a set operation by not less than one order of magnitude. The control circuit performs the reset operation and the set operation for the memory cells. The control circuit performs the reset operation for all memory cells being in the low resistance state and connected to selected first interconnections and selected second interconnections. | 12-25-2014 |
20150131363 | NONVOLATILE SEMICONDUCTOR MEMORY DEVICE INCLUDING VARIABLE RESISTANCE ELEMENT - According to one embodiment, a nonvolatile semiconductor memory device includes a memory cell array and a control circuit. The memory cell array include the memory cells each including a variable resistance element in which a reset current flowing in a reset operation is smaller than a set current flowing in a set operation by not less than one order of magnitude. The control circuit performs the reset operation and the set operation for the memory cells. The control circuit performs the reset operation for all memory cells being in the low resistance state and connected to selected first interconnections and selected second interconnections. | 05-14-2015 |