| Patent application number | Description | Published |
|---|
| 20080315288 | MEMORY CELL OF NONVOLATILE SEMICONDUCTOR MEMORY - A memory cell of a nonvolatile semiconductor memory includes a semiconductor region, source/drain areas arranged separately from each other in the semiconductor region, a tunnel insulating film arranged on a channel region between the diffusion areas, a floating gate electrode arranged on the tunnel insulating film, an inter-electrode insulator arranged on the floating gate electrode, and a control gate electrode arranged on the inter-electrode insulator. The inter-electrode insulator includes lanthanoid-based metal Ln, aluminum Al, and oxygen O, and a composition ratio Ln/(Al+Ln) between the lanthanoid-based metal and the aluminum takes a value within the range of 0.33 to 0.39. | 12-25-2008 |
| 20090057750 | NONVOLATILE SEMICONDUCTOR MEMORY ELEMENT AND MANUFACTURING METHOD THEREOF - A nonvolatile semiconductor memory element includes a semiconductor substrate, a source region and a drain region which are provided separately in the semiconductor substrate, a tunnel insulating layer which is provided between the source region and the drain region on the semiconductor substrate, a charge storage layer which is provided on the tunnel insulating layer, a block insulating layer which is provided on the charge storage layer and includes a crystallized lanthanum aluminate layer, and a control gate electrode which is provided on the block insulating layer. | 03-05-2009 |
| 20090057751 | NONVOLATILE SEMICONDUCTOR MEMORY DEVICE - A nonvolatile semiconductor memory device according to an example of the present invention includes a semiconductor region, source/drain areas arranged separately in the semiconductor region, a tunnel insulating film arranged on a channel region between the source/drain areas, a floating gate electrode arranged on the tunnel insulating film, an inter-electrode insulating film arranged on the floating gate electrode, and a control gate electrode arranged on the inter-electrode insulating film. The inter-electrode insulating film includes La, Al and Si. | 03-05-2009 |
| 20090114995 | COMPLEMENTARY SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME - A complementary semiconductor device includes a semiconductor substrate, a first semiconductor region formed on a surface of the semiconductor substrate, a second semiconductor region formed on the surface of the semiconductor substrate apart from the first semiconductor region, an n-MIS transistor having a first gate insulating film including La and Al, formed on the first semiconductor region, and a first gate electrode formed on the gate insulating film, and a p-MIS transistor having a second gate insulating film including La and Al, formed on the second semiconductor region, and a second gate electrode formed on the gate insulating film, an atomic density ratio Al/La in the second gate insulating film being larger than an atomic density ratio Al/La in the first gate insulating film. | 05-07-2009 |
| 20090206393 | NONVOLATILE MEMORY ELEMENT AND METHOD OF MANUFACTURING THE SAME - A nonvolatile memory element includes a semiconductor region, a source region and a drain region provided in the semiconductor region, a tunnel insulating layer provided on the semiconductor region between the source region and the drain region, a charge storage layer provided on the tunnel insulating layer, a block insulating layer provided on the charge storage layer, and a control gate electrode provided on the block insulating layer. The charge storage layer includes one of an oxide, a nitride and an oxynitride, which contains at least one material selected from the group consisting of Hf, Al, Zr, Ti and a rare-earth metal, and is entirely or partially crystallized. The block insulating layer includes one of an oxide, an oxynitride, a silicate and an aluminate, which contains at least one rare-earth metal. | 08-20-2009 |
| 20100072535 | NONVOLATILE SEMICONDUCTOR MEMORY DEVICE - A nonvolatile semiconductor memory device includes a source region and a drain region provided apart from each other in a semiconductor substrate, a first insulating film provided on a channel region between the source region and the drain region, a charge storage layer provided on the first insulating film, a second insulating film provided on the charge storage layer and including a stacked structure of a lanthanum aluminum silicate film and a dielectric film made of silicon oxide or silicon oxynitride, and a control gate electrode provided on the second insulating film. | 03-25-2010 |
| 20120025297 | NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR MANUFACTURING THE SAME - According to one embodiment, a nonvolatile semiconductor memory device includes a source region and a drain region provided on a surface area of a semiconductor region, a tunnel insulating film provided on a channel between the source region and the drain region, a charge storage layer provided on the tunnel insulating film, a first dielectric film provided on the charge storage layer and containing lanthanum aluminum silicon oxide or oxynitride, a second dielectric film provided on the first dielectric film and containing oxide or oxynitride containing at least one of hafnium (Hf), zirconium (Zr), titanium (Ti), and a rare earth metal, and a control gate electrode provided on the second dielectric film. | 02-02-2012 |
| 20120068250 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF - According to one embodiment, a semiconductor device includes a semiconductor region, a tunnel insulating film provided on the semiconductor region, a charge storage insulating film provided on the tunnel insulating film and having a hafnium oxide including a cubic region, a block insulating film provided on the charge storage insulating film, and a control gate electrode provided on the block insulating film. | 03-22-2012 |
