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Akira Muto
Akira Muto, Kanagawa JP
| Patent application number | Description | Published |
|---|---|---|
| 20100308421 | SEMICONDUCTOR DEVICE - The size of a semiconductor device is reduced. A semiconductor chip in which a power MOSFET is placed above a semiconductor chip in which another power MOSFET is formed and they are sealed with an encapsulation resin portion. The semiconductor chips are so arranged that the upper semiconductor chip does not overlap with the area positioned directly above a gate pad electrode of the lower semiconductor chip. The semiconductor chips are identical in size and the respective source pad electrodes and gate pad electrodes of the lower semiconductor chip and the upper semiconductor chip are identical in shape and arrangement. The lower semiconductor chip and the upper semiconductor chip are arranged with their respective centers displaced from each other. | 12-09-2010 |
| 20110089558 | SEMICONDUCTOR DEVICE AND A MANUFACTURING METHOD THEREOF - There is provided a technology capable of reducing the mounting burden on the part of a customer which is a recipient of a package. Over a metal board, a single package and another single package are mounted together via an insulation adhesion sheet, thereby to form one composite package. As a result, as compared with the case where six single packages are mounted, the number of packages to be mounted is smaller in the case where three sets of the composite packages are mounted. This can reduce the mounting burden on the part of a customer. | 04-21-2011 |
Akira Muto, Tokyo JP
| Patent application number | Description | Published |
|---|---|---|
| 20080197963 | BALUN TRANSFORMER, MOUNTING STRUCTURE OF BALUN TRANSFORMER, AND ELECTRONIC APPARATUS HAVING BUILT-IN MOUNTING STRUCTURE - There is provided a balun transformer, in which first to fourth layer coils are stacked and coupled magnetically; one end of each coil of the first to fourth layer coils is grounded; the second and third layer coils are connected in parallel, an unbalanced signal is input/output to/from a common terminal of the second and third layer coils; a first balanced signal is input/output to/from the other end of the first layer coil; and a second balanced signal is input/output to/from the other end of the fourth layer coil. | 08-21-2008 |
| 20090215230 | MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE - The radiation performance of a resin sealed semiconductor package is enhanced and further the fabrication yield thereof is enhanced. A drain terminal coupled to the back surface drain electrode of a semiconductor chip is exposed at the back surface of an encapsulation resin section. Part of the following portion and terminal is exposed at the top surface of the encapsulation resin section: the first portion of a source terminal coupled to the source pad electrode of the semiconductor chip and a gate terminal coupled to the gate pad electrode of the semiconductor chip. The remaining part of the second portion of the source terminal and the gate terminal is exposed at the back surface of the encapsulation resin section. When this semiconductor device is manufactured, bonding material and a film member are placed between the drain terminal and the semiconductor chip. At the same time, paste-like bonding material and a film member are placed between the source terminal | 08-27-2009 |
| 20100175251 | FLEXIBLE PRINTED CIRCUIT BOARD - A flexible printed circuit board has an insulation layer, a first signal wiring layer including a microstrip line, a second signal wiring layer including a signal connection terminal for allowing the microstrip line to connect the exterior connector electrically, and a ground conductive section having a ground connection terminal for connecting the exterior connector. The microstrip line and the signal connection terminal are connected to each other by a wiring via hole. The wiring via hole passes through the insulation layer, the first signal wiring layer, and the second signal wiring layer. The microstrip line has a taper section which gradually enlarges a width of the microstrip line toward the wiring via hole in the vicinity of the wiring via hole. The ground conductive section that corresponds to the microstrip line has a taper section with a shape matching the taper section of the microstrip line. | 07-15-2010 |
| 20100258922 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF - To prevent, in a resin-sealed type semiconductor package, generation of cracks in a die bonding material used for mounting of a semiconductor chip. A semiconductor chip is mounted over the upper surface of a die pad via a die bonding material, followed by sealing with an insulating resin. The top surface of the die pad to be brought into contact with the insulating resin is surface-roughened, while the bottom surface of the die pad and an outer lead portion are not surface-roughened. | 10-14-2010 |
Akira Muto, Haruna JP
| Patent application number | Description | Published |
|---|---|---|
| 20080220568 | MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE - A semiconductor device in the form of a resin sealed semiconductor package is disclosed, wherein a gate terminal connected to a gate pad electrode formed on a surface of a semiconductor chip and a source terminal connected to a source pad electrode formed on the chip surface exposed to a back surface of a sealing resin portion, a first portion of a drain terminal connected to a back-surface drain electrode of the semiconductor chip is exposed to an upper surface of the sealing resin portion, and a second portion of the drain terminal formed integrally with the first portion of the drain terminal is exposed to the back surface of the sealing resin portion. When forming the sealing resin portion in such a semiconductor device, first the sealing resin portion is formed so as to also cover an upper surface of the first portion of the drain terminal and thereafter the upper surface side of the sealing resin portion is polished by liquid honing, thereby allowing the upper surface of the first portion of the drain terminal to be exposed on the upper surface of the sealing resin portion. Both heat dissipating property and production yield of the semiconductor device are improved. | 09-11-2008 |
| 20080268577 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME - A semiconductor chip is sealed by resin without covering an outer terminal of a semiconductor device having a power transistor. A semiconductor chip having a power transistor is housed within a recess of a metal cap while a drain electrode on a first surface of the semiconductor chip is bonded to a bottom of the recess via a connection material. A gate electrode and a source electrode are formed on a second surface opposite to the first surface of the semiconductor chip, and the gate electrode and the source electrode are bonded with metal plate terminals | 10-30-2008 |
Akira Muto, Osaka JP
| Patent application number | Description | Published |
|---|---|---|
| 20080253251 | Position Detection Device, Position Detection Method, Position Detection Control Device, Position Detection Control Method, Position Detection Control Program, Access Authentication Device, Access Authentication Method, Access Authentication Control Device, Access Authentication Control Method, Access Authentication Control Program, Information Storage Device, and Optical Disk - A position detection device, a position detection method, a position detection control device, a position detection control method, a position detection control program, an access authentication device, an access authentication method, an access authentication control device, an access authentication control method, an access authentication control program, an information storage device, and an optical disk are provided, all of which make it possible to prevent illegal copying of the information recorded in a recording medium. | 10-16-2008 |
Akira Muto, Takasaki JP
| Patent application number | Description | Published |
|---|---|---|
| 20080224282 | Semiconductor device and method of manufacturing the same - A technique for preventing cracks and residual resin on a semiconductor chip in a molding process in the assembly of semiconductor devices is provided. A distance from a bottom surface of a cavity of a lower mold die to a ceiling surface of a cavity of an upper mold die of a resin molding die is made same as or smaller than a distance from a lower surface of a die pad to an upper surface of a plate terminal, and an U-shape elastic body is arranged on semiconductor elements between the plate terminal and the die pad, thereby mitigating a load due to a clamp pressure of mold dies in the molding process by an elastic deformation of the elastic body. Consequently, a load applied on the semiconductor devices is reduced, thereby preventing formation of cracks on the semiconductor elements. | 09-18-2008 |