| Patent application number | Description | Published |
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| 20090166685 | SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME - A semiconductor device according to one embodiment includes: a semiconductor substrate; a first impurity diffusion suppression layer formed on the semiconductor substrate for suppressing diffusion of a channel impurity; an impurity channel layer formed on the first impurity diffusion suppression layer and containing the channel impurity; a second impurity diffusion suppression layer formed on the impurity channel layer for suppressing diffusion of the channel impurity; a channel layer formed on the second impurity diffusion suppression layer; a gate insulating film formed on the channel layer; and a gate electrode formed on the gate insulating film. | 07-02-2009 |
| 20090243002 | SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME - A semiconductor device according to one embodiment includes: a semiconductor substrate; a gate electrode formed on the semiconductor substrate via a gate insulating film; a first silicide layer formed on the gate electrode; a channel region formed in the semiconductor substrate below the gate electrode; source/drain regions formed in regions in the semiconductor substrate, the regions sandwiching the channel region; and second silicide layers formed on the source/drain regions and having an average grain size smaller than that of the first silicide layer or an average number of compositional boundaries in a crystal grain larger than that of the first silicide layer. | 10-01-2009 |
| 20090283842 | SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME - A semiconductor device according to one embodiment includes: a semiconductor substrate comprising first and second transistor regions that are isolated by an element isolation region; a first impurity diffusion suppression layer formed on the semiconductor substrate in the first transistor region; a second impurity diffusion suppression layer formed on the semiconductor substrate in the second transistor region, and having a thickness larger than that of the first impurity diffusion suppression layer; a first crystal layer formed on the first impurity diffusion suppression layer; a second crystal layer formed on the second impurity diffusion suppression layer; a first gate electrode formed on the first crystal layer via a first gate insulating film; a second gate electrode formed on the second crystal layer via a second gate insulating film; a first channel region formed in a region in the semiconductor substrate, the first impurity diffusion suppression layer and the first crystal layer below the first gate electrode in the first transistor region, and containing a first p-type impurity; a second channel region formed in a region in the semiconductor substrate, the second impurity diffusion suppression layer and the second crystal layer below the second gate electrode in the second transistor region, and containing a second p-type impurity; first source/drain regions formed on both sides of the first channel region; and second source/drain regions formed on both sides of the second channel region; wherein a concentration of the first p-type impurity in a region of the first channel region in the first crystal layer is lower than that in a region of the first channel region in the semiconductor substrate; and a concentration of the second p-type impurity in a region of the second channel region in the second crystal layer is lower than that in a region of the second channel region in the semiconductor substrate. | 11-19-2009 |
| 20100181625 | SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME - A semiconductor device according to one embodiment includes: a semiconductor layer formed on a semiconductor substrate; a gate electrode formed on the semiconductor layer via a gate insulating film; an impurity diffusion suppression layer formed between the semiconductor substrate and the semiconductor layer and including a C-containing Si-based crystal containing a first impurity, the C-containing Si-based crystal being configured to suppress diffusion of a second impurity having a p-type conductivity type, and the C-containing Si-based crystal with the first impurity having a function of suppressing generation of fixed charge in the C-containing Si-based crystal; and p-type source/drain regions formed in the semiconductor substrate, the impurity diffusion suppression layer and the semiconductor layer in sides of the gate electrode, the p-type source/drain region having an extension region in the semiconductor layer and containing the second impurity. | 07-22-2010 |
| 20100252869 | SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME - A semiconductor device according to one embodiment includes: a gate electrode formed on a semiconductor substrate via a gate insulating film; Si:C layers formed on the semiconductor substrate in sides of the gate electrode; p-type source/drain regions formed in sides of the gate electrode in the semiconductor substrate, and a part of the p-type source/drain regions being formed in the Si:C layers; and silicide layers formed on the Si:C layers. | 10-07-2010 |
| Patent application number | Description | Published |
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| 20080230805 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE - In one aspect of the present invention, a semiconductor device may include a Si substrate, a gate electrode provided on the semiconductor via a gate dielectric layer, a first epitaxially grown layer provided on the Si substrate, a channel region provided in the Si substrate below the gate electrode, a source/drain region provided in the first epitaxially grown layer sandwiching the channel region, and having a first conductivity type impurity, a second epitaxially grown layer provided between the channel region and the first epitaxially grown layer, and provided below the gate electrode, and having a second conductivity type impurity opposite to the first conductivity type. | 09-25-2008 |
| 20080277742 | SEMICONDUCTOR DEVICE - In one aspect of the present invention, a semiconductor device may include a plurality of fins disposed substantially parallel to each other at predetermined intervals on a semiconductor substrate, a gate electrode formed to partially sandwich therein the both side surfaces, in the longitudinal direction, of each of the plurality of fins with an insulating film interposed between the gate electrode and each of the side surfaces of each fin, and a semiconductor layer formed on each of at least some of side surfaces of the plurality of fins, wherein the semiconductor layer in a region located on an outer side surface, in the longitudinal direction, of each of two fins which are located at both ends of the line of the plurality of fins is thinner than the semiconductor layer in a region located on each of side surfaces, in the longitudinal direction and other than the outer surfaces of the two fins, of the plurality of fins. | 11-13-2008 |
| 20090039440 | SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME - A semiconductor device comprising: a semiconductor substrate; an n-type MIS transistor which is formed on the semiconductor substrate and has a first metal gate electrode and a first polycrystalline silicon layer formed on the first metal gate electrode; a p-type MIS transistor which is formed on the semiconductor substrate and has a second metal gate electrode and a second polycrystalline silicon layer, the second metal gate electrode containing at least one metallic element different from that of the first metal gate electrode, and the second polycrystalline silicon layer being formed on the second metal gate electrode and having the same conductivity type as that of the first polycrystalline silicon layer. | 02-12-2009 |
