Patent application number | Description | Published |
20080315933 | PULSE SYNTHESIS CIRCUIT - A high-level period of each of n first pulse signals partially or wholly overlaps a period during which all of n second pulse signals are at the low level. A high-level period of each of the n second pulse signals partially or wholly overlaps a period during which all of the n first pulse signals are at the low level. Each of n first drive transistors includes a source connected to a ground node, a drain connected to a first node, and a gate receiving a corresponding one of the first pulse signals. Each of n second drive transistors includes a source connected to the ground node, a drain connected to a second node, and a gate receiving a corresponding one of the second pulse signals. A current mirror circuit allows a current corresponding to a current flowing through the second node to flow through the first node. | 12-25-2008 |
20090115502 | REFERENCE CURRENT CIRCUIT, REFERENCE VOLTAGE CIRCUIT, AND STARTUP CIRCUIT - A current mirror circuit | 05-07-2009 |
20090134931 | MULTIPHASE LEVEL SHIFT SYSTEM - Each of n level shifters (LS | 05-28-2009 |
20090167400 | DEVICE AND METHOD FOR GENERATING CLOCK SIGNAL - In a device for generating a clock signal having a desired phase from input multi-phase clock signals, an intermediate clock generator generates, by using one of the input multi-phase clock signals as a reference clock signal, multi-phase intermediate clock signals in which one cycle is equal to a plurality of cycles of the reference clock signal. A first phase selector selects one of the multi-phase intermediate clock signals. A second phase selector selects one of the multi-phase clock signals. A latch circuit latches the intermediate clock signal selected by the first phase selector with the clock signal selected by the second phase selector. | 07-02-2009 |
20090284282 | LEVEL SHIFTER - Input transistors have sources which are connected to a first input reference node and gates to which a pair of input signals are input. Input-side voltage relaxing transistors have sources connected to drains of the pair of input transistors and gates connected to a second input reference node. Output-side voltage relaxing transistors have sources connected to output nodes, gates connected to a first output reference node, and drains connected to drains of the input-side voltage relaxing transistors. First and second inverter circuits are in correspondence with the output nodes, and are connected between second and third output reference nodes. Each of the first and second inverter circuits also supplies a voltage at one of the second and third output reference nodes to its corresponding one of the output nodes, depending on a voltage at its non-corresponding one of the output nodes. | 11-19-2009 |
20110080821 | COUPLED RING OSCILLATOR AND METHOD FOR INITIALIZING THE SAME - In a coupled ring oscillator including q ring oscillators each including p inverter circuits connected together to form a ring shape, and a phase coupling ring including (p×q) phase coupling circuits each of which is configured to couple an output of one of the p inverter circuits of one of the q ring oscillators to an output of one of the p inverter circuits of another one of the q ring oscillators in a predetermined phase relationship, and which are connected together to form a ring shape, for at least one group made up of one of the p inverter circuits in each of the q ring oscillators, outputs of the q inverter circuits belonging to the at least one group are fixed in phase with one another, the q ring oscillators are caused to oscillate in the in-phase fixed state, and then, the outputs of the q inverter circuits are released from the in-phase fixed state. | 04-07-2011 |
20110140754 | REFERENCE FREQUENCY GENERATION CIRCUIT, SEMICONDUCTOR INTEGRATED CIRCUIT, AND ELECTRONIC DEVICE - An oscillator circuit increases and reduces signal levels of first and second oscillation signals in a complementary manner in response to a transition of a signal level of a reference clock. An oscillation control circuit compares each of the signal levels of the first and second oscillation signals to a comparison voltage, and causes the signal level of the reference clock to transition according to results of the comparison. A reference control circuit increases or reduces the comparison voltage so that a difference between a signal level of an intermediate signal which is proportional to respective swings of the first and second oscillation signals and a reference voltage is reduced. | 06-16-2011 |
20120319880 | SUCCESSIVE APPROXIMATION AD CONVERTER AND MOBILE WIRELESS DEVICE - A controller controls first and second supply switches so that, during a sampling period, a ground voltage is supplied to n first up-capacitors and n second up-capacitors while a power supply voltage is supplied to n first down-capacitors and n second down-capacitors. The controller also controls the first and second supply switches based on the result of comparison by a comparator during each of n bit determination periods so that a first analog voltage at a first sampling node and a second analog voltage at a second sampling node gradually approach each other. | 12-20-2012 |
20130009796 | CLOCK GENERATOR CIRCUIT FOR SUCCESSIVE APPROXIMATIOM ANALOG TO-DIGITAL CONVERTER - A sampling clock generator generates a sampling clock based on a reference clock and an internal clock. An internal clock generator causes, during a period in which the sampling clock is at a second voltage level, the internal clock to transition from a first voltage level to a second voltage level when a first comparison signal and a second comparison signal transition to voltage levels different from each other, and the internal clock to transition from the second voltage level to the first voltage level after a variable delay time has elapsed when the first and second comparison signals transition to a same voltage level. A delay controller controls the variable delay time in the internal clock generator so that the ratio of a period in which the sampling clock is at a first voltage level to a period of the reference clock approaches a predetermined ratio. | 01-10-2013 |
20140249438 | ELECTRONIC DEVICE, INFORMATION PROCESSING APPARATUS, INFORMATION PROCESSING METHOD AND PROGRAM - An exemplary electronic device is in a housing to be gripped by a right hand and a left hand of a user, and has a plurality of manipulable portions. The electronic device includes: electrodes placed at positions which come in contact with the right hand and left hand of the user gripping the housing; an extractor for extracting an electrocardiographic component of the user from a potential difference between the electrodes; a determination section for determining whether the extracted electrocardiographic component is in a positive direction or a negative direction by referring to a prestored criterion; and a change section for, in accordance with a result of determination by the determination section, changing assignment between each of the plurality of manipulable portions and a manipulation signal generated in response to a manipulation. | 09-04-2014 |
20140333332 | ELECTRONIC DEVICE, INFORMATION PROCESSING APPARATUS, INFORMATION PROCESSING METHOD, AND PROGRAM - An exemplary electronic device is in a housing to be gripped by both hands, and measures the potentials of first and second fingers of respectively different hands. The device includes: a first electrode group provided in a position to come in contact with the first finger, including a first main electrode and at least one first auxiliary electrode provided in a position away from the first main electrode; a second electrode group provided in a position to come in contact with the second finger, including a second main electrode and at least one second auxiliary electrode provided in a position away from the second main electrode; a biological signal processor for, from potential values measured at the first and second electrode groups, determining respective contact states concerning the first and second fingers; and a transmission circuit for presenting information concerning a finger contact state based on a result of determination. | 11-13-2014 |