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Akihiko Sato

Akihiko Sato, Kawasaki-Shi JP

Patent application numberDescriptionPublished
20100050940SUBSTRATE PROCESSING SYSTEM, CARRYING DEVICE AND COATING DEVICE - A substrate processing system includes a processing unit, a substrate loading unit, a substrate unloading unit, and a carrying unit. A carrying device has a constitution in which a suction portion suctioning and holding a substrate is rotatable about an arm portion provided in a base portion and the substrate is rotated in the state where the substrate is held by a holding portion. A coating device has a constitution in which a liquid material is ejected from a nozzle to both surfaces of the substrate rotating in an upright state.03-04-2010
20100297352COATING DEVICE AND COATING METHOD - A coating device includes a coating mechanism which includes nozzles for ejecting a liquid material onto front and rear surfaces of a substrate while rotating the substrate; and an adjusting mechanism which adjusts the coating state of the liquid material at the outer periphery of the substrate; wherein the adjusting mechanism includes a dip portion which dips the outer periphery of the substrate in a solution while rotating the substrate and dissolves; and a suction portion which suctions the vicinity of the outer periphery of the substrate after dipping in the solution.11-25-2010
20100297353COATING DEVICE AND COATING METHOD - A coating device includes a coating mechanism which includes nozzles for ejecting a liquid material onto front and rear surfaces of a substrate while rotating the substrate; and an adjusting mechanism which adjusts the coating state of the liquid material at the outer periphery of the substrate; wherein the adjusting mechanism includes a dip portion which dips the outer periphery of the substrate in a solution while rotating the substrate and dissolves and removes a thin film formed on the outer periphery of the substrate; and a suction portion which suctions the vicinity of the outer periphery of the substrate after dipping in the solution.11-25-2010
20100326354SUBSTRATE PROCESSING SYSTEM, CARRYING DEVICE, AND COATING DEVICE - A substrate processing system includes a processing unit, a substrate loading unit, a substrate unloading unit, and a carrying unit. A carrying device has a constitution in which a suction portion suctioning and holding a substrate is rotatable about an arm portion provided in a base portion and the substrate is rotated in the state where the substrate is held by a holding portion. A coating device has a constitution in which a liquid material is ejected from a nozzle to both surfaces of the substrate rotating in an upright state.12-30-2010
20110000428Substrate processing system - A coating device includes a coating mechanism which includes nozzles for ejecting a liquid material onto front and rear surfaces of the substrate while rotating a substrate in an upright state at a predetermined coating position, a carrying mechanism which carries the substrate between a substrate loading position, the coating position, and a substrate unloading position, and a dummy substrate holding mechanism which holds a dummy substrate at a holding position which is a position different from the substrate loading position, the coating position, and the substrate unloading position, and at which the carrying mechanism is allowed to connect with the dummy substrate.01-06-2011
20110008534COATING DEVICE AND NOZZLE MANAGING METHOD - A coating device including a coating mechanism which includes nozzles for ejecting a liquid material onto front and rear surfaces of the substrate while rotating a substrate in an upright state, and a nozzle managing mechanism which manages the state of the nozzles, in which the nozzle managing mechanism includes a soaking portion which dips the front end of the nozzle in a soak solution, and a discharging portion which discharges at least the soak solution, and a nozzle managing method.01-13-2011

Akihiko Sato, Tokyo JP

Patent application numberDescriptionPublished
20090090948SEMICONDUCTOR DEVICE AND A METHOD OF MANUFACTURING THE SAME - In a semiconductor device comprising a capacitive element, an area of the capacitive element is reduced without impairing performance, and further, without addition of an extra step in a manufacturing process. A first capacitor is formed between an active region of a semiconductor substrate provided through a first capacitive insulating film and a lower electrode comprised of a conductor film in the same layer as a select gate electrode of a select, a second capacitor is formed between the lower electrode, and an upper electrode comprised of a conductor film in the same layer as a memory gate electrode of a memory, provided through the second capacitive insulating film in the same layer as the insulating films of a multi-layer structure, including a charge storage layer, and a stacking-type capacitive element is comprised of the first capacitor and the second capacitor, wherein a planar shape of the lower electrode is a grid-like shape having a plurality of lengths of linear conductor films each having a first width, formed along a first direction with a first interval provided therebetween, and a plurality of lengths of linear conductor films each having a second width, formed along a second direction (the direction intersecting the first direction) with a second interval provided therebetween.04-09-2009
20100289120SEMICONDUCTOR DEVICE AND A METHOD OF MANUFACTURING THE SAME - In a semiconductor device comprising a capacitive element, an area of the capacitive element is reduced without impairing performance, and further, without addition of an extra step in a manufacturing process. A first capacitor is formed between an active region of a semiconductor substrate provided through a first capacitive insulating film and a lower electrode comprised of a conductor film in the same layer as a select gate electrode of a select, a second capacitor is formed between the lower electrode, and an upper electrode comprised of a conductor film in the same layer as a memory gate electrode of a memory, provided through the second capacitive insulating film in the same layer as the insulating films of a multi-layer structure, including a charge storage layer, and a stacking-type capacitive element is comprised of the first capacitor and the second capacitor, wherein a planar shape of the lower electrode is a grid-like shape having a plurality of lengths of linear conductor films each having a first width, formed along a first direction with a first interval provided therebetween, and a plurality of lengths of linear conductor films each having a second width, formed along a second direction (the direction intersecting the first direction) with a second interval provided therebetween.11-18-2010

Patent applications by Akihiko Sato, Tokyo JP

Akihiko Sato, Hamura-Shi JP

Patent application numberDescriptionPublished
20090319791ELECTRONIC APPARATUS AND COPYRIGHT-PROTECTED CHIP - According to one embodiment, a copyright-protected chip includes a selector which connects a host controller to a circuit in the copyright-protected chip, a second register in which a encrypted content key, decryption key generation information, and shared classified information stored in a storage device are stored, and a communication circuit which communicates with the host controller and transmits the encrypted content key and the decryption key generation information stored in the register to the host controller when an access module accesses content obtained by decrypting the encrypted content stored in a hard disk.12-24-2009

Akihiko Sato, Hachioji JP

Patent application numberDescriptionPublished
20090273038SEMICONDUCTOR DEVICE AND A METHOD OF MANUFACTURING THE SAME - A technique is provided which permits formation within a single chip both a field effect transistor of high reliability capable of suppressing the occurrence of a crystal defect and a field effect transistor of a high integration degree. In a mask ROM section having an element isolation region with an isolation width of smaller than 0.3 μm, a planar shape of each active region ACT is made polygonal by cutting off the corners of a quadrangle, thereby suppressing the occurrence of a crystal defect in the active region ACT and diminishing a leakage current flowing between the source and drain of a field effect transistor. In a sense amplifier data latch section which is required to have a layout of a small margin in the alignment between a gate G of a field effect transistor and the active region ACT, the field effect transistor is disposed at a narrow pitch by making the active region ACT quadrangular.11-05-2009

Akihiko Sato, Katsushika-Ku JP

Patent application numberDescriptionPublished
20090129803IMAGE FORMING APPARATUS AND METHOD FOR FORMING IMAGES FOR CARRYING OUT DEVELOPMENT USING A LIGHT TONER AND A DARK TONER HAVING SUBSTANTIALLY THE SAME HUE - An image forming apparatus configured to carry out development using a light toner and a dark toner having substantially the same hue, includes a pattern forming unit configured to form a pattern using a dark toner and a light toner, a pattern reading unit configured to read the density of the pattern formed on a sheet of recording paper after the pattern has been fixed, and a gradation correction unit configured to correct the gradation characteristics of image data for the light toner by changing the slope of the gradation characteristics with zero level as a base point. The changing of the slope is based on the density characteristics of the pattern read by the pattern reading unit and the ratio of the amounts of the light toner and the dark toner that have been used.05-21-2009

Patent applications by Akihiko Sato, Katsushika-Ku JP