Patent application number | Description | Published |
20090244878 | Conforming, electro-magnetic interference reducing cover for circuit components - An electronic circuit component is provided with shielding for electro-magnetic interference (“EMI”) by covering at least part of the component with a layer of electrical insulation that conforms to the shape of the surface to which the insulation is applied. At least part of the surface of the insulation is then covered by a layer of EMI shielding that conforms to the shape of the surface of the insulation to which the shielding is applied. | 10-01-2009 |
20090273550 | Display Having A Transistor-Degradation Circuit - Systems, methods, and devices are disclosed, including a device having a liquid-crystal display (LCD) panel that includes a transistor-degradation circuit. In some embodiments, the transistor-degradation circuit is configured to output a signal indicative of a change in a property of a transistor on the LCD panel over time. | 11-05-2009 |
20100043222 | CONFORMING, ELECTRO-MAGNETIC INTERFERENCE REDUCING COVER FOR CIRCUIT COMPONENTS - An electronic circuit component is provided with shielding for electromagnetic interference (“EMI”) by covering at least part of the component with a layer of electrical insulation that conforms to the shape of the surface to which the insulation is applied. At least part of the surface of the insulation is then covered by a layer of EMI shielding that conforms to the shape of the surface of the insulation to which the shielding is applied. | 02-25-2010 |
20100079128 | LOW NOISE EXTERNAL ENABLE SWITCHER CONTROL SIGNAL USING ON-CHIP SWITCHER - A method and system is disclosed for powering device sub-circuitry of an electronic device. The sub-circuitry may be used to provide control signals to a direct current switcher on a main system board, thus eliminating passive circuitry typically associated with the sub-circuitry. Furthermore, by actively generating the control signals for the direct current switcher, explicit timing control circuitry is not required to synchronize the transmitted power to the sub-circuitry. | 04-01-2010 |
20110298785 | GATE SHIELDING FOR LIQUID CRYSTAL DISPLAYS - Systems and methods for preventing parasitic capacitances within liquid crystal displays are provided. A display panel according to an embodiment may include, for example, a pixel with a pixel electrode and a transistor coupled to a gate line. Additionally, the pixel may include a shielding conductor interposed between the pixel electrode and the gate line. The shielding conductor may shield the pixel electrode from a parasitic capacitance with the gate line by causing a parasitic capacitance to form between the gate line and the shielding conductor instead of between the gate line and the pixel electrode. | 12-08-2011 |
20110298811 | FLEXIBLE PRINTED CIRCUIT TO GLASS ASSEMBLY SYSTEM AND METHOD - Systems, methods, and devices relating to directly bonding electrode pads of a flexible printed circuit (FPC) to electrode pads of a glass substrate are provided. In one example, such a system may include a glass substrate with electrode pads and an FPC with corresponding electrode pads. A joining edge of each electrode pad of the FPC may couple directly to a joining edge of a corresponding electrode pad of the glass substrate, without an intervening conductive adhesive layer or an anisotropic conductive film (ACF) layer, or a combination thereof. | 12-08-2011 |
20120162121 | SLEW RATE AND SHUNTING CONTROL SEPARATION - Setting a slew rate, e.g., a rising time or a falling time, of a scanning signal can be performed with a first operation, and a shunting resistance of the scanning line can be set with a second operation. A scanning system that scans a display screen, a touch screen, etc., can set a desired slew rate during a first period of time and can set a desired shunting resistance during a second period of time. A gate line system can sequentially scan gate lines to display an image during a display phase of a touch screen. The gate line system can, for example, increase the falling times of gate line signals. After the falling gate line signal has stabilized, for example, the gate line system can decrease the shunting resistance of the gate line. | 06-28-2012 |
20120319666 | LOW NOISE EXTERNAL ENABLE SWITCHER CONTROL SIGNAL USING ON-CHIP SWITCHER - A method and system is disclosed for powering device sub-circuitry of an electronic device. The sub-circuitry may be used to provide control signals to a direct current switcher on a main system board, thus eliminating passive circuitry typically associated with the sub-circuitry. Furthermore, by actively generating the control signals for the direct current switcher, explicit timing control circuitry is not required to synchronize the transmitted power to the sub-circuitry. | 12-20-2012 |
20130076720 | PIXEL GUARD LINES AND MULTI-GATE LINE CONFIGURATION - Data can be written to a sub-pixel by applying a voltage to the sub-pixel's data line. A large change in voltage on a data line can affect the voltages on adjacent data lines due to capacitive coupling between data lines. The resulting change in voltage on these adjacent data lines can give rise to visual artifacts in the data lines' corresponding sub-pixels. Various embodiments of the present disclosure serve to prevent or reduce the appearance of these visual artifacts by inserting guard lines between data lines to reduce the mutual capacitance between data lines. In other embodiments, a pixel having multiple gate lines can be used to selectively turn on and turn off different sub-pixels which, in turn, can reduce or eliminate the appearance of visual artifacts. | 03-28-2013 |
20130076721 | DEVICES AND METHODS FOR ZERO-BIAS DISPLAY TURN-OFF USING VCOM SWITCH - Methods and devices employing zero-bias display turn-off circuitry, including turn-off logic and switching devices, are provided. In one example, a method may include supplying a common voltage output of ground to a common electrode of a pixel of an electronic display, supplying an activation signal to the pixel to activate the pixel, supplying a data signal of ground to a pixel electrode of the pixel, and removing the activation signal from the pixel while the data signal is being supplied to the pixel to store the data signal in the pixel. When the activation signal is removed, the method may include causing the common voltage output being supplied to the common electrode of the pixel to change to a floating value to prevent a kickback voltage from affecting the data signal stored in the pixel. | 03-28-2013 |
20130076799 | SYSTEMS AND METHOD FOR DISPLAY TERMPREATURE DETECTION - Disclosed embodiments relate to a display temperature detection system that can detect temperature variations in different regions of a display panel. The temperature measuring display system includes a display panel that provides graphical images. Further, the temperature measuring display system includes temperature measurement circuitry. The temperature measurement circuitry includes one or more thermal diodes, transistors, or a mesh layer useful to determine at least one temperature measurement of the display panel. | 03-28-2013 |
20130082973 | DISPLAY DEFORMATION DETECTION - Disclosed embodiments relate to a display deformation detection system that detects display deformations based upon changes in resistance and/or capacitance. In one embodiment, a method includes measuring a baseline comprising a baseline resistance or a baseline capacitance or both of a conductive mesh disposed within or overlaid on the display panel. The method further includes detecting a change in the baseline resistance or the baseline capacitance or both and calculating a change location where the change in the baseline resistance or the baseline capacitance or both occurred. The method also includes calculating a magnitude of the change in the baseline resistance or the baseline capacitance or both. | 04-04-2013 |
20130082994 | DEVICES AND METHODS FOR KICKBACK-OFFSET DISPLAY TURN-OFF - Methods and devices employing circuitry for display turn-off that offsets the effect of kickback voltage are provided. In one example, a method may include determining an amount of kickback voltage that is expected to occur in pixels of the electronic display during shutdown of the display, supplying a common voltage output to a common electrode of a pixel of the electronic display, and supplying an activation signal to the pixel to activate the pixel. The method may also include supplying a data signal to a pixel electrode of the pixel. The data signal may be substantially equal to the sum of the common voltage output and the determined kickback voltage. The method may include removing the activation signal from the pixel to store the data signal in the pixel to reduce the effect of kickback voltage on the pixel electrode of the pixel during shutdown of the electronic display. | 04-04-2013 |
20130241909 | DEVICES AND METHODS FOR REDUCING A VOLTAGE DIFFERENCE BETWEEN VCOMS OF A DISPLAY - Methods and devices for reducing a voltage difference between common voltage layers (VCOMs) of a display are provided. In one example, a method may include supplying an activation signal to a row of pixels of the display to activate the row of pixels. The method may also partially removing the activation signal from the row of pixels at a predetermined rate. The method may include detecting a voltage difference between a first VCOM of a first set of pixels of the display and a second VCOM of a second set of pixels of the display after the activation signal has been partially removed. The method may also include controlling removal of the activation signal from the row of pixels based at least partially on the detected voltage difference. | 09-19-2013 |
20130278581 | DEVICES AND METHODS FOR PIXEL DISCHARGE BEFORE DISPLAY TURN-OFF - Methods and devices employing circuitry for quickly discharging pixels of a display before the display is turned off are provided. In one example, a method may include receiving at the electronic display a signal indicating the electronic display will be powered off within a period of time. The method may also include, in response to the signal, causing a frame of pixel data originating from the electronic display to be stored in pixels of the electronic display before the electronic display is powered off. Storing the frame of pixel data in the pixels may inhibit image artifacts from occurring on the electronic display when the electronic display is powered back on in the future. | 10-24-2013 |
20130328755 | Systems and Methods for Reducing or Eliminating Mura Artifact Using Contrast Enhanced Imagery - Systems, methods, and devices are provided to calibrate an electronic display to reduce or eliminate mura artifacts. Such mura artifacts may be due to differential behavior of multiple common voltage layers (VCOMs) of the display. One method for reducing or eliminating such muras may involve setting pixels of an electronic display to a gray level and setting an operating parameter of the liquid crystal display to a starting value. An image of the pixels may be captured. Using the image, an average luminance of the pixels may be determined and the image may be amplified around the average luminance to enhance contrast of the image. When the amplified image substantially does not indicates the presence of a mura, the value of the operating parameter may be stored in the electronic display. | 12-12-2013 |
20130328759 | Systems and Methods for Mura Calibration Preparation - Systems and methods for calibrating an electronic display to reduce or eliminate artifacts are provided. One method for reducing or eliminating artifacts may involve baking the operational—but not yet fully calibrated—electronic display to reduce stray charge on the electronic display. After baking the display, the electronic display may be calibrated to reduce or eliminate flicker and/or mura artifacts | 12-12-2013 |
20130328795 | DEVICES AND METHODS FOR IMPROVING IMAGE QUALITY IN A DISPLAY HAVING MULTIPLE VCOMS - Methods and devices for improving image quality in a display having multiple common voltage layers (VCOMs) are provided. In one example, a method may include maintaining a deactivation signal on pixels of the display after programming a frame of data onto the pixels of the display, but before a touch sequence. The method may also include supplying a first data signal to each pixel of a first set of pixels coupled to a first VCOM while maintaining the deactivation signal. The method may include supplying a second data signal to each pixel of a second set of pixels coupled to a second VCOM while supplying the first data signal. The first data signal is supplied to each pixel of the first set of pixels and the second data signal is supplied to each pixel of the second set of pixels to inhibit image distortion during the touch sequence. | 12-12-2013 |
20130328796 | DEVICES AND METHODS FOR REDUCING POWER USAGE OF A TOUCH-SENSITIVE DISPLAY - Methods and devices employing circuitry for reducing power usage of a touch-sensitive display are provided. In one example, a method includes receiving power for a display of an electronic device. The method also includes powering a touch subsystem and a display subsystem of the display. The method includes, in a standard display mode, storing a frame of data in pixels of the display subsystem during a first period of time. The method also includes, in a low power display mode, storing a frame of data in pixels of the display subsystem during a second period of time. The second period of time is not equal to the first period of time. The method includes detecting a touch of the display via the touch subsystem between each synchronization signal of a plurality of synchronization signals received by the display. | 12-12-2013 |
20130328797 | DEVICES AND METHODS FOR REDUCING POWER USAGE OF A TOUCH-SENSITIVE DISPLAY - Methods and devices employing circuitry for reducing power usage of a touch-sensitive display are provided. In one example, a method for reducing power usage of a touch-sensitive display may include receiving power for the display of an electronic device. The method may also include powering a touch subsystem and a display subsystem of the display. The method may include, in a standard display mode, receiving synchronization signals at a first rate. A frame of data is stored on pixels of the display subsystem between each synchronization signal. The method may also include, in a low power display mode, receiving synchronization signals at a second rate. The second rate is less than the first rate. The method may include detecting a touch of the display via the touch subsystem between each synchronization signal. | 12-12-2013 |
20130328843 | Systems and Methods for Reducing or Eliminating Mura Artifact Using Image Feedback - Systems, methods, and devices for calibrating an electronic display to reduce or eliminate a mura artifact are provided. The mura artifact may be due to differential behavior of common voltage layers (VCOMs) in the electronic display. One method for reducing or eliminating the mura artifact may involve setting pixels of the electronic display to a first gray level and measuring a luminance difference between light and dark areas of a mura artifact on the electronic display. A value of an operating parameter of the electronic display may be adjusted while monitoring the luminance difference measurement. A value of the operating parameter that causes the luminance difference measurement to be within a specified range of acceptable luminance difference measurement values may be stored in the electronic display. | 12-12-2013 |
20130328844 | Using Clock Detect Circuitry to Reduce Panel Turn-on Time - Systems, devices, and methods for using clock detector circuitry to reduce turn-on time of an electronic display, improve image quality, and reduce operations of a host are provided. In one example, a system may include a host configured to transmit a number of signals and a display driver coupled to the host. The number of signals may include a clock signal and data signals. The display driver is configured to drive a display based at least in part on the data signals. The display driver is also configured to be reset upon detection of the clock signal without waiting for a host-issued reset signal. A clock detect circuit configured to detect the clock signal may be configured to transmit an internal reset signal to reset the display driver without a dedicated host-issued reset signal. | 12-12-2013 |
20130328847 | DEVICES AND METHODS FOR COMMON ELECTRODE MURA PREVENTION - Methods and devices employing mura prevention circuitry, are provided. In one example, a method may include supplying a first voltage pathway between a common electrode driver and a common electrode of an electronic display device and supplying a second voltage pathway between the common electrode driver and ground. Mura prevention circuitry may be supplied that activates the first voltage pathway when the electronic display device is turned on and an activation gate signal is provided from a gate corresponding to the common electrode driver. Further, the mura prevention circuitry may activate the second voltage pathway when the electronic display device is turned off or no activation gate signal is provided from the gate corresponding to the common electrode driver. | 12-12-2013 |
20130328851 | GROUND NOISE PROPAGATION REDUCTION FOR AN ELECTRONIC DEVICE - A system and device for reducing ground bounce in circuitry. Utilization of a common ground supplied to multiple integrated circuits reduces the complexity and costs of producing circuitry but tends to interfere with signal quality within the circuitry by subjecting each integrated circuit to the ground bounce of every other integrated circuit. By introducing a source follower to selectively decouple and/or couple slave circuits within the circuitry, the ground bounce for the overall system can be reduced, thereby increasing the efficiency of interpreting signals within the circuitry. | 12-12-2013 |
20130329057 | Systems and Methods for Dynamic Dwelling Time for Tuning Display to Reduce or Eliminate Mura Artifact - Systems and methods for calibrating an electronic display to reduce or eliminate a mura artifact are provided. The mura artifact may be due to differential behavior of common voltage layers (VCOMs) in the electronic display. One method for reducing or eliminating the mura artifact may involve turning on an electronic display and programming pixels the electronic display to a uniform gray level. An initial luminance value may be determined and, after waiting a period of time, a subsequent luminance of the pixels may be measured. When a difference between the subsequent luminance and initial luminance is within a threshold, the mura artifact may be understood to have settled and the electronic display may be calibrated. | 12-12-2013 |
20130342431 | Systems and Methods for Calibrating a Display to Reduce or Eliminate Mura Artifacts - Systems, methods, and devices are provided to reduce or eliminate mura artifacts on electronic displays. For example, pixels may be programmed to a uniform gray level before all or a substantial number of gates of the pixels are activated. The voltages on some or all source lines that supply the pixels may be measured. A mura artifact may be seen when voltage differences on the source lines are present. As such, operational parameters of the electronic display may be adjusted to reduce or eliminate the mura artifact by reducing the voltage differences. | 12-26-2013 |
20140062936 | SYSTEMS AND METHODS FOR MONITORING LCD DISPLAY PANEL RESISTANCE - Systems and methods for monitoring internal resistance of a display. The method may include supplying the display via a capacitor with a first voltage configured to enable the display to receive one or more touch inputs. After supplying the display with the first voltage, the method may include discharging the capacitor to a second voltage configured to enable the display to display image data. The method may then monitor a discharge waveform that corresponds to when the capacitor discharges from the first voltage to the second voltage. Based at least in part on the discharge waveform, the method may determine a chip on glass resistance value and a flex on glass resistance value that correspond to an internal resistance of the display. | 03-06-2014 |
20140062940 | SYSTEMS AND METHODS FOR MONITORING LCD DISPLAY PANEL RESISTANCE - Systems and methods for monitoring internal resistance of a display may include supplying the display via a capacitor with a first voltage and a second voltage configured to enable the display to receive touch inputs and display image data, respectively. The method may discharge the capacitor at least three times via a first resistor, a second resistor, and the first resistor and second resistor coupled in parallel with each other. The method may monitor three discharge waveforms that corresponds to when the capacitor discharges from the first voltage to the second voltage via the first resistor, the second resistor, and the first resistor and second resistor coupled in parallel with each other. Based at least in part on the discharge waveforms, the method may determine a chip on glass resistance value and a flex on glass resistance value that correspond to an internal resistance of the display. | 03-06-2014 |
20140159764 | SYSTEMS AND METHODS FOR FRACTURE DETECTION IN AN INTEGRATED CIRCUIT - Systems, methods, and devices are provided to identify the occurrence, location, and/or severity of a fracture within an integrated circuit, even when the integrated circuit is not accessible to external inspection. One such method includes obtaining a measurement of a property of the integrated circuit through at least one contact of the integrated circuit. The measurement may include a resistance of a resistive pattern in the integrated circuit or a measurement of current-voltage behavior of a power supply of the integrated circuit. The measurement of the property may be compared to an expected baseline property. Based at least in part on this comparison, whether a fracture of the integrated circuit has occurred and a location of the fracture in the integrated circuit may be determined. | 06-12-2014 |
20140168292 | DISPLAY ACTIVATION AND DEACTIVATION CONTROL - An electronic display includes a display panel, which includes an array of pixels and a driver configured to activate and deactivate the emission of light from each of the pixels in the array. The electronic display also includes a panel driver configured to generate and transmit an emission interrupt signal to the driver, wherein the emission interrupt signal causes the driver to deactivate the emission of light from all pixels in the array for a set period of time prior to a refresh of a line of pixels in the array. | 06-19-2014 |
20140354586 | REDUCING TOUCH PIXEL COUPLING - A touch screen to reduce touch pixel coupling. In some examples, the touch screen can include a first display pixel and a second display pixel in a row of display pixels, where the first display pixel can be configurable to be decoupled from the second display pixel during at least a touch sensing phase of the touch screen. In some examples, the touch screen can include a display pixel having a first and a second transistor, where the second transistor can be electrically connected to a gate terminal of the first transistor, and can be diode-connected. In some examples, the touch screen can include two display pixels, each display pixel having two transistors, where two of the transistors can be electrically connected to a first gate line, and the remaining two transistors can be individually electrically connected to a second and third gate line, respectively. | 12-04-2014 |
20150084911 | DEVICES AND METHODS FOR REDUCTION OF DISPLAY TO TOUCH CROSSTALK - Devices and methods for reducing display-to-touch crosstalk are provided. In or more examples, an electronic display panel may include a pixel. The pixel may include a pixel electrode, a common electrode, and a first transistor having a first source coupled to a data line, a first gate coupled to a gate line, and a first drain coupled to the pixel electrode. The first transistor may be configured to pass a data signal from the data line to the pixel electrode upon receipt of an activation signal from the gate line. The pixel may also include a second transistor having a second source coupled to the common electrode, a second gate coupled to the gate line, and a second drain coupled to a common voltage source. The second transistor may be configured to cause a parasitic capacitance between the gate line and the second drain of the second transistor instead of between the gate line and the first drain of the first transistor. | 03-26-2015 |