| Patent application number | Description | Published |
|---|
| 20080208827 | Device, System and Method of Modeling Homogeneous Information - Device, system and method of modeling homogeneous information. For example, a method that includes providing to a model-based application an input model including a refinable homogeneous record having a base type, wherein said homogeneous record is defined with a homogeneous constraint to only include data members of a type compatible with the base type. The homogeneous record is defined in a modeling environment that is able to automatically enforce the homogeneous constraint for the homogeneous record and for refinements thereof. | 08-28-2008 |
| 20080255822 | Automatic Generation of Test Suite for Processor Architecture Compliance - A parametrically controlled model-based test generator automatically generates architectural compliance test suites for different implementations of a processor architecture, based on a set of architectural decisions chosen among optional behaviors for each implementation. Thus, different implementations of the same architecture can be easily supported by modifying the parameter values. In addition, ongoing changes to the architecture or comprehensive updates to the test suite can be easily handled by updating the architecture model or the coverage models, forgoing the need to review the whole, potentially huge, set of tests. | 10-16-2008 |
| 20090222694 | Model-Based Hardware Exerciser, Device, System and Method Thereof - Device, system and method for verification of a hardware system-under-test including at least one processor. A method includes building an executable image of a hardware exerciser adapted for execution on a test platform selected from: a simulation accelerator, a hardware emulator, a prototype hardware system, and a hardware production wafer. The exerciser image includes embedded data corresponding to architectural knowledge, testing knowledge, and a test template. The test template is defined in a context-free formal language and includes biasing directives to influence at least one of a desired test structure, one or more resources to be included in the test, and one or more values of the included resources. The architectural knowledge is obtained from an architectural model including a formal description of the specification for the system-under-test, and the testing knowledge is obtained from a testing knowledgebase including heuristics for testing desired aspects of the system-under-test. | 09-03-2009 |
| 20090259454 | AUTOMATIC TEST PROGRAM GENERATION USING EXTENDED CONDITIONAL CONSTRAINT SATISFACTION - Apparatus for automatically generating test programs is provided. The apparatus includes a test generator, which is adapted to receive a description of a system under test, expressed in terms of variables associated with the system and conditional constraints including semantics applied to the variables, to receive a definition of an event to be tested in the system, to generate an ECondCSP over the variables responsively to the definition of the event and to the conditional constraints, such that at least some of the semantics of the conditional constraints are preserved in the ECondCSP when one or more of the variables to which the semantics are applied are inactive, and to solve the ECondCSP to generate a test case for the system. | 10-15-2009 |
| 20100052954 | Converting a Mask Constraint into a Bitset Constraint - Converting a mask constraint into a bitset constraint. For example, a method of converting a mask constraint into a bitset constraint may include determining an intermediate bitset based on a variable-bit component of the mask constraint; and generating the bitset constraint based on the intermediate bitset and on a fixed-bit component of the mask constraint. Other embodiments are described and claimed. | 03-04-2010 |
| 20100082719 | Generating a Number based on a Bitset Constraint - Generating a number based on a bitset constraints. For example, a method of generating a pseudo random number satisfying a bitset constraint may include determining a number of possible solutions satisfying the bitset constraint; selecting an index representing a solution of the possible solutions; and generating the pseudo-random number based on the index. Other embodiments are described and claimed. | 04-01-2010 |
| 20110106482 | GENERATING A COMBINATION EXERCISER FOR EXECUTING TESTS ON A CIRCUIT - A first and second test templates are combined to a combination test template. The combination test template may be configured to execute the first and second test templates in combination, and based upon a definition. The combination test template may execute tests in sequential order, concurrently, a combination thereof or the like. The first test template may be configured to be executed by a single-core machine and may be transformed to a multi-core test template that is configured to be executed on a multi-core machine in parallel to other tests. By utilizing the disclosed subject matter, a reduction in overhead of executing the first and second test templates may be achieved; a predetermined interleaving may be performed and a user may control the manner in which the combination test template is executing the first and second test templates. Additionally, reuse of pre-silicon test templates in post-silicon stage may be achieved. | 05-05-2011 |
