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Adibi, US

Ali Adibi, Suwanee, GA US

Patent application numberDescriptionPublished
20090174882Spatial Separation of Optical Frequency Components Using Photonic Crystals - Disclosed are various devices and methods employing photonic crystals (07-09-2009
20090295505PHONONIC CRYSTAL WAVE STRUCTURES - Phononic crystal wave structures and methods of making same are discussed in this application. According to some embodiments, an acoustic structure can generally comprise a phononic crystal slab configured as a micro/nano-acoustic wave medium. The phononic crystal slab can define an exterior surface that bounds an interior volume, and the phononic crystal slab can be sized and shaped to contain acoustic waves within the interior volume of the phononic crystal slab. The phononic crystal slab can comprise at least one defect portion. The defect portion can affect periodicity characteristics of the phononic crystal slab. The defect portion can be shaped and arranged to enable confinement and manipulation of acoustic waves through the defect portion(s) of phononic crystal slab. Other aspects, features, and embodiments are also claimed and described.12-03-2009
20100110442Tandem Fabry-Perot Etalon Cylindrical Beam Volume Hologram for High Resolution/Large Spectral Range Diffuse Light Spectroscopy - Systems and methods for performing two-dimensional (2D) high resolution spectral-spatial mapping are described. At least one embodiment includes a spectrometer for performing two-dimensional (2D) high resolution spectral-spatial mapping comprising a Fabry-Perot component configured to receive a diffuse input beam and provide a high resolution spectral mapping of the diffuse input beam in a first direction. The spectrometer further comprises a volume hologram for increasing a spectral operating range, the volume hologram configured to perform spectral mapping in a second direction orthogonal to the first direction to increase the spectral operating range. The spectrometer further comprises a charged coupled device (CCD) configured to receive output beams, the output beams used to provide spectral analysis of the input beams.05-06-2010
20100201979Systems and Methods for Utilizing Cylindrical Beam Volume Holograms - Systems and methods for performing spectral-spatial mapping in (one and two dimensions) and coded spectroscopy are described. At least one embodiment includes a system for performing spectral-spatial mapping and coded spectroscopy comprising a cylindrical beam volume hologram (CBVH), the CBVH configured to receive input beams and generate diffracted beams in a first direction to perform spectral-spatial mapping, the CBVH further configured to allow input beams to pass in a second direction orthogonal to the first direction unaffected. The system further comprises a first lens configured to receive the diffracted beams and perform a Fourier transform on the input beams in the first direction, a second lens configured to receive the diffracted beams and focus the beams in the second direction to generate output beams, and a charged coupled device (CCD) configured to receive the outputs beams, the output beams used to provide spectral analysis of the input beams.08-12-2010

Patent applications by Ali Adibi, Suwanee, GA US

Babak Adibi, Los Altos, CA US

Patent application numberDescriptionPublished
20080206962METHOD AND STRUCTURE FOR THICK LAYER TRANSFER USING A LINEAR ACCELERATOR - A method for fabricating free standing thickness of materials using one or more semiconductor substrates, e.g., single crystal silicon, polysilicon, silicon germanium, germanium, group III/IV materials, and others. In a specific embodiment, the present method includes providing a semiconductor substrate having a surface region and a thickness. The method includes subjecting the surface region of the semiconductor substrate to a first plurality of high energy particles generated using a linear accelerator to form a region of a plurality of gettering sites within a cleave region, the cleave region being provided beneath the surface region to defined a thickness of material to be detached, the semiconductor substrate being maintained at a first temperature. In a specific embodiment, the method includes subjecting the surface region of the semiconductor substrate to a second plurality of high energy particles generated using the linear accelerator, the second plurality of high energy particles being provided to increase a stress level of the cleave region from a first stress level to a second stress level. In a preferred embodiment, the semiconductor substrate is maintained at a second temperature, which is higher than the first temperature. The method frees the thickness of detachable material using a cleaving process, e.g., controlled cleaving process.08-28-2008
20090308439SOLAR CELL FABRICATION USING IMPLANTATION - A solar cell device and method of making are provided. The device includes a silicon substrate including a preexisting dopant. A homogeneous lightly doped region is formed on a surface of the silicon substrate to form a junction between the preexisting dopant and the lightly doped region. A heavily doped region is selectively implanted on the surface of the silicon substrate. A seed layer is formed over the heavily doped region. A metal contact is formed over the seed layer. The device can include an anti-reflective coating. In one embodiment, the heavily doped region forms a parabolic shape. The heavily doped regions can each be a width on the silicon substrate a distance in the range 50 to 200 microns. Also, the heavily doped regions can be laterally spaced on the silicon substrate a distance in the range 1 to 3 mm from each other. The seed layer can be a silicide. The silicon substrate can include fiducial markers configured for aligning the placement of the heavily doped regions during an ion implantation process.12-17-2009
20090308440FORMATION OF SOLAR CELL-SELECTIVE EMITTER USING IMPLANT AND ANNEAL METHOD - A method of forming a solar cell, the method comprising: providing a semiconducting wafer having a pre-doped region; performing a first ion implantation of a dopant into the semiconducting wafer to form a first doped region over the pre-doped region, wherein the first ion implantation has a concentration-versus-depth profile; and performing a second ion implantation of a dopant into the semiconducting wafer to form a second doped region over the pre-doped region, wherein the second ion implantation has a concentration-versus-depth profile different from that of the first ion implantation, wherein at least one of the first doped region and the second doped region is configured to generate electron-hole pairs upon receiving light, and wherein the first and second ion implantations are performed independently of one another.12-17-2009
20090308450SOLAR CELL FABRICATION WITH FACETING AND ION IMPLANTATION - Solar cells in accordance with the present invention have reduced ohmic losses. These cells include photo-receptive regions that are doped less densely than adjacent selective emitter regions. The photo-receptive regions contain multiple four-sided pyramids that decrease the amount of light lost to the solar cell by reflection. The smaller doping density in the photo-receptive regions results in less blue light that is lost by electron-hole recombination. The higher doping density in the selective emitter region allows for better contacts with the metallic grid coupled to the multiple emitter regions. Preferably, the selective emitter and photo-receptive regions are both implanted using a narrow ion beam containing the dopants.12-17-2009
20090309039APPLICATION SPECIFIC IMPLANT SYSTEM AND METHOD FOR USE IN SOLAR CELL FABRICATIONS - Solar cells and other semiconductor devices are fabricated more efficiently and for less cost using an implanted doping fabrication system. A system for implanting a semiconductor substrate includes an ion source (such as a single-species delivery module), an accelerator to generate from the ion source an ion beam having an energy of no more than 150 kV, and a beam director to expose the substrate to the beam. In one embodiment, the ion source is single-species delivery module that includes a single-gas delivery element and a single-ion source. Alternatively, the ion source is a plasma source used to generate a plasma beam. The system is used to fabricate solar cells having lightly doped photo-receptive regions and more highly doped grid lines. This structure reduces the formation of “dead layers” and improves the contact resistance, thereby increasing the efficiency of a solar cell.12-17-2009
20100323508PLASMA GRID IMPLANT SYSTEM FOR USE IN SOLAR CELL FABRICATIONS - A method of ion implantation comprising: providing a plasma within a plasma region of a chamber; positively biasing a first grid plate, wherein the first grid plate comprises a plurality of apertures; negatively biasing a second grid plate, wherein the second grid plate comprises a plurality of apertures; flowing ions from the plasma in the plasma region through the apertures in the positively-biased first grid plate; flowing at least a portion of the ions that flowed through the apertures in the positively-biased first grid plate through the apertures in the negatively-biased second grid plate; and implanting a substrate with at least a portion of the ions that flowed through the apertures in the negatively-biased second grid plate.12-23-2010
20110162703ADVANCED HIGH EFFICIENTCY CRYSTALLINE SOLAR CELL FABRICATION METHOD - A method of fabricating a solar cell comprising: providing a semiconducting wafer having a front surface, a back surface, and a background doped region; performing a set of ion implantations of dopant into the semiconducting wafer to form a back alternatingly-doped region extending from the back surface of the semiconducting wafer to a location between the back surface and the front surface, wherein the back doped region comprises laterally alternating first back doped regions and second back doped regions, and wherein the first back doped regions comprise a different charge type than the second back doped regions and the background doped region; and disposing a back metal contact layer onto the back surface of the semiconducting wafer, wherein the back metal contact layer is aligned over the first and second back doped regions and is configured to conduct electrical charge from the first and second back doped regions.07-07-2011

Patent applications by Babak Adibi, Los Altos, CA US