Adar, IL
Eliezer Adar, Sde Varburg IL
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20090107590 | Soft magnetic alloy for microwire casting - An alloy, which can be used in a microwire, contains 26 to 52 weight % Fe; 26 to 52 weight % Co; 3.0 to 38.0 weight % Ni; at least one selected from the group consisting of 1.0 to 8.0 weight % V, 1.0 to 8.0 weight % Cr, 1.0 to 8.0 weight % Zr, 1.0 to 8.0 weight % Dy and 1.0 to 8.0 weight % Nb; at least one selected from the group consisting of 2.0 to 8.3 weight % Si and 2.0 to 8.3 weight % B; and at least one selected from the group consisting of 0.2 to 1.6 weight % Ce, 0.2 to 1.6 weight % La and 0.2 to 1.6 weight % Y. When cast in a microwire, the alloy can be substantially amorphous. | 04-30-2009 |
Eliezer Adar, Herev La Et IL
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20140354386 | THREE-PHASE MAGNETIC CORES FOR MAGNETIC INDUCTION DEVICES AND METHODS FOR MANUFACTURING THEM - Three-phase magnetic cores for magnetic induction devices (e.g., transformers, coils, chokes), and methods for manufacturing them, are disclosed. The magnetic cores are generally constructed from three generally rectangular magnetic core frames having a stair-stepped configuration extending along side portions of the frames. The frames are arranged to form a triangular prism structure such that side portions of locally adjacent frames are uniformly engaged to form three core legs over which coils of a three-phase magnetic induction device may be placed. | 12-04-2014 |
Etai Adar, Yokne'Am IL
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20090217075 | Signal Phase Verification for Systems Incorporating Two Synchronous Clock Domains - The present invention implements a mechanism which enables zero-delay verification tools to detect clock domain crossing violation in device under test designs comprising two different clock domains where the fast clock is an integer multiple of the slow clock by inserting undefined (i.e., invalid) values on slow clock domain signals during the clock periods when the signals are not supposed to be captured. The undefined values are contained in the logic cone and emulate timing uncertainly of the path. Propagation of the undefined values through the capturing latch indicates improper clock domains crossing handling. | 08-27-2009 |
Etai Adar, Haifa IL
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20130232279 | Decode Data for Fast PCI Express Multi-Function Device Address Decode - An apparatus and method of fast PCIe multi-function device address decode utilizing a target function data look up table. One or more decode directives (e.g., targeted functions) are provided within the PCIe request packet, thereby eliminating the need for target function search during the decode process in the endpoint device. This enables single-decoder single-step decode implementation in complex multi-function devices. | 09-05-2013 |
20150074466 | COORDINATION OF SPARE LANE USAGE BETWEEN LINK PARTNERS - Various examples of techniques for identifying a corrupt data lane and using a spare data lane are described herein. Some examples include a method of coordinating spare lane usage between link partners. One such example comprises analyzing data from a link partner to identify a corrupt lane, and communicating the corrupt lane to the link partner, wherein the communication does not require sideband communication channel. In some embodiments, communicating the corrupt lane to the link partner comprises identifying a transmit lane corresponding to the corrupt lane, transmitting a set of data intended for a corresponding transmit lane using a spare data lane, and transmitting bad data to the link partner using the corresponding transmit lane. | 03-12-2015 |
Etai Adar, Yokneam Ilit IL
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20090113082 | Device, System, and Method of Speculative Packet Transmission - Device, system and method of speculative packet transmission. For example, an apparatus for speculative packet transmission includes: a credit-based flow control interconnect device to initiate speculative transmission of a Transaction Layer Packet if a number of available flow control credits is insufficient for completing the transmission. | 04-30-2009 |
20090138641 | Device, System, and Method of Handling Delayed Transactions - Device, system, and method of handling delayed transactions. For example, an apparatus to handle delayed transactions in a computing system includes: a slave unit adapted to pseudo-randomly reject a request received from a master unit. | 05-28-2009 |
20090177822 | Device, System, and Method of Handling Transactions - Some embodiments include, for example, devices, systems, and methods of handling transactions. In some demonstrative embodiments, an apparatus to handle transactions in a computing system may include a master unit to arbitrate between read and write requests to be issued over a request bus according to at least first and second arbitration schemes. A first ratio between read and write requests issued by the master unit according to the first arbitration scheme may be different from a second ratio between read and write requests issued by the master unit according to the second arbitration scheme. | 07-09-2009 |
20090185487 | AUTOMATED ADVANCE LINK ACTIVATION - Embodiments herein provide a transaction level mechanism that ensures that the links are operational right in time for the data flow, so that the data flow will not be impacted by delays associated with link recovery into the operational state. The path has links that have the ability to be in an inactive mode or an active mode. The embodiments herein transmit an “activation transmission” over the path to turn on the links within the path, before sending a data transfer (comprising packetized data) to turn on (wake up) the inactive links within the path, so that the actual data transfer does not experience any such start-up or wake-up delays. | 07-23-2009 |
20090187683 | ADAPTIVE LINK WIDTH CONTROL - A communications apparatus uses at least one logical communications link that comprises a plurality of lanes within a computerized hardware device. A data transfer monitor is connected to the logical communications link and measures the real-time data transfer bandwidth of the logical communications link. In addition, a link management unit or link width control unit (comparator) is connected to the lanes and to the data transfer monitor and continually compares the real-time data transfer bandwidth to a predetermined data transfer bandwidth standard. If the real-time data transfer bandwidth is below the predetermined data transfer bandwidth standard, the link management unit is adapted to perform up-configuring of the logical communications link by activating additional lanes up to a maximum number of lanes making up the logical communications link. Conversely, if the real-time data transfer bandwidth is above the predetermined data transfer bandwidth standard, the link management unit is adapted to perform down-configuring the logical communications link by deactivating lanes within the logical communications link. The lanes consume less power when the lanes are deactivated relative to when the lanes are activated, thus the down-configuring reduces power consumption. | 07-23-2009 |
20100226420 | Detection of Frame Marker Quality - For example, a method of detecting frame marker quality includes: detecting, in a bit-stream sent from a first component to a second component of a common hardware unit, a frame marker having a bit pattern different from an uncorrupted frame marker specified by a communication protocol; and assigning a quality level indicator to the frame marker based on a difference between said bit pattern and a bit pattern of said uncorrupted frame marker. | 09-09-2010 |
20120089979 | Performance Monitor Design for Counting Events Generated by Thread Groups - A number of hypervisor register fields are set to specify which processor cores are allowed to generate a number of performance events for a particular thread group. A plurality of threads for an application running in the computing environment to a plurality of thread groups are configured by a plurality of thread group fields in a plurality of control registers. A number of counter sets are allowed to count a number of thread group events originating from one of a shared resource and a shared cache are specified by a number of additional hypervisor register fields. | 04-12-2012 |
20120089984 | Performance Monitor Design for Instruction Profiling Using Shared Counters - Counter registers are shared among multiple threads executing on multiple processor cores. An event within the processor core is selected. A multiplexer in front of each of a number of counters is configured to route the event to a counter. A number of counters are assigned for the event to each of a plurality of threads running for a plurality of applications on a plurality of processor cores, wherein each of the counters includes a thread identifier in the interrupt thread identification field and a processor identifier in the processor identification field. The number of counters is configured to have a number of interrupt thread identification fields and a number of processor identification fields to identify a thread that will receive a number of interrupts. | 04-12-2012 |
20120089985 | Sharing Sampled Instruction Address Registers for Efficient Instruction Sampling in Massively Multithreaded Processors - Sampled instruction address registers are shared among multiple threads executing on a plurality of processor cores. Each of a plurality of sampled instruction address registers are assigned to a particular thread running for an application on the plurality of processor cores. Each of the sampled instruction address registers are configured by storing in each of the sampled instruction address registers a thread identification of the particular thread in a thread identification field and a processor identification of a particular processor on which the particular thread is running in a processor identification field. | 04-12-2012 |
20130159764 | PCI Express Error Handling and Recovery Action Controls - An apparatus and method of PCIe error handling and recovery actions taken in the event of an error. An error reporting extension defines a set of commonly used actions that are taken by a device in response to the detection of an error. This minimizes the side effects of continued device operation following the occurrence of an error. The device's error handling capabilities are advertised and the system software specifies the desired device action to take upon occurrence of a particular error. The particular error handling action is defined uniquely for each PCIe function and error type, such that different errors trigger a different type of action, thereby affecting only specific device functions or the entire device, depending on the configuration. Error handling actions and control fields are placed in the extension portion of the PCI Express Advanced Error Reporting configuration space. | 06-20-2013 |
Etai Adar, Yokneam Iiit IL
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20120331184 | POLLING OF A TARGET REGISTER WITHIN A PERIPHERAL DEVICE - In a disclosed example of a method, a requested value of a target register may be specified as a precondition to performing a requested read or write operation. The requested read or write operation may be generated by a requesting device, such as a processor, and sent over a bus to a peripheral device containing the target register. The target register may be polled internally to the peripheral device without generating additional bus traffic between the requesting device and the peripheral device. A ring topology may be used to internally poll the target register and to perform the requested read or write operation when the polled value of the target register equals the requested value. | 12-27-2012 |
Eyal Adar, Bnei Brak IL
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20100306852 | Apparatus and Methods for Assessing and Maintaining Security of a Computerized System under Development - A security assessment method for assessing security of a computerized system under development, the system including assets and being managed in accordance with an organization policy, the method including providing an organizational computerized system development policy; classifying said assets in said system under development, thereby to generate asset classification information; and automated creation of at least one security requirement based on said asset classification information and said organization policy. | 12-02-2010 |
Gavriel Adar, Kvutzat Yavne IL
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20160100557 | SYSTEM AND METHOD FOR MONITORING EGGS DURING INCUBATION - An incubation tray is disclosed, including an enclosure with a plurality of egg placements for carrying eggs for incubation within an egg incubator. The incubation tray includes a tester unit including plurality of inspection modules in the enclosure associated with the plurality of egg placements. The inspection modules, each includes radiation emitter(s) and sensor(s), and are configured and operable for respectively inspecting the plurality of eggs located in the egg placements, by irradiating the eggs with radiation from a lateral side of the eggs and measuring a radiation response coming in response to the irradiation from a lateral side of the eggs, giving rise to measured data indicative of conditions of the eggs. The measured data may be processed to determine dynamic and static parameters of the radiation response from which a physiological development stage, and growth of the embryos within the eggs can be estimated. | 04-14-2016 |
Gil Adar, Pardes Hana Karkur IL
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20120311220 | COMPUTER BUS WITH ENHANCED FUNCTIONALITY - A method for computing includes connecting a host device to a peripheral device via a bus that is physically configured in accordance with a predefined standard and includes multiple connection pins that are specified by the standard, including a plurality of ground pins. At least one pin, selected from among the pins on the bus that are specified as the ground pins, is used in order to indicate to the peripheral device that the host device has an extended operational capability. | 12-06-2012 |
Rivka Adar, Carmai Yosef IL
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20150252362 | PROGRAMMABLE ITERATED ELONGATION: A METHOD FOR MANUFACTURING SYNTHETIC GENES AND COMBINATORIAL DNA AND PROTEIN LIBRARIES - A method for manufacturing synthetic genes and combinatorial DNA and protein libraries, termed here Divide and Conquer-DNA synthesis (D&C-DNA synthesis) method. The method can be used in a systematic and automated way to synthesize any long DNA molecule and, more generally, any combinatorial molecular library having the mathematical property of being a regular set of strings. The D&C-DNA synthesis method is an algorithm design paradigm that works by recursively breaking down a problem into two or more sub-problems of the same type. The division of long DNA sequences is done in silico. The assembly of the sequence is done in vitro. The D&C-DNA synthesis method protocol consists of a tree, in which each node represents an intermediate sequence. The internal nodes are created in elongation reactions from their daughter nodes, and the leaves are synthesized directly. After each elongation only one DNA strand passes to the next level in the tree until receiving the final product. Optionally and preferably, error correction is performed to correct any errors which may have occurred during the synthetic process. | 09-10-2015 |
Rivka Adar, Carmei Yosef IL
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20140066490 | SYSTEM AND METHOD FOR MODIFYING DEOXYRIBOZYMES - A system and method for programming DNAzymes to be utilized as programmable drugs, which are active only in the presence of specific input combinations and/or certain conditions. | 03-06-2014 |
Roy Adar, Kiryat-Tivon IL
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20150113600 | METHOD AND SYSTEM FOR DETECTING UNAUTHORIZED ACCESS TO AND USE OF NETWORK RESOURCES - Methods and systems are disclosed for detecting unauthorized actions associated with network resources, the actions including access to the resource and activity associated with the resource. The unauthorized actions are detected by analyzing action data of a client action associated with the network resource against credential retrieval data including records of authorized actions and/or procedures for performing an action associated with the network resource. | 04-23-2015 |
20150121461 | METHOD AND SYSTEM FOR DETECTING UNAUTHORIZED ACCESS TO AND USE OF NETWORK RESOURCES WITH TARGETED ANALYTICS - Methods and systems are disclosed for detecting improper, and otherwise unauthorized actions, associated with network resources, the actions including access to the resource and activity associated with the resource. The unauthorized actions are detected by analyzing action data of user actions employing accounts managed by a privileged access management system and associated with a network resource against profiles and rules to discover anomalies and/or deviations from rules associated with the network resource or accounts. | 04-30-2015 |
20160006712 | USER PROVISIONING - A method of credential provisioning on a target service utilizes three credential sets: authentication credentials, privileged credentials and provisioned credentials. An intermediate element receives a request from a user client to establish a session with a target service. The request includes authentication credentials. The intermediate element creates provisioned credentials using privileged credentials which are authorized for creating provisioned credentials for accessing the target service. Once provisioned credentials have been created, a dual session communication channel is established between the user client and the target service. The session between the user client and intermediate element is established using the authentication credentials and the session between the intermediate element and the target service is established using the provisioned credentials. Optionally, user authorization to establish a session with the target service is determined prior to creating the provisioned credentials. | 01-07-2016 |
Rutie Adar, Ramat Gan IL
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20130205075 | NONVOLATILE MEMORY DEVICE AND MEMORY CARD INCLUDING THE SAME - There is provided a nonvolatile memory device including a memory cell array including nonvolatile memory cells, a battery not supplied with external power and configured to store a charged voltage, a sensing unit configured to sense a degradation state of the nonvolatile memory cells of the memory cell array, and a trigger circuit configured to transmit a refresh trigger signal based on the sensing result, wherein the nonvolatile memory cells of the memory cell array are refreshed using the charged voltage provided by the battery in response to the trigger signal transmitted from the trigger circuit. | 08-08-2013 |
Simon Adar, Tel Aviv IL
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20100161831 | OPTIMIZING CONTENT AND COMMUNICATION IN MULTIACCESS MOBILE DEVICE EXHIBITING COMMUNICATION FUNCTIONALITIES RESPONSIVE OF TEMPO SPATIAL PARAMETERS - A content and traffic managing system operatively associated with and a computer implemented method of managing traffic of a mobile device exhibiting communication functionality. The mobile device is connectable to users and to content providers via communication links. The system tracks various parameters over time, and schedules communication, both in relation to predefined or projected content responsive of the following: users' content related behavior, users' communication behavior, users' external behavior, and parameters of communication links. The method comprises: (i) tracking users' content related behavior, communication behavior and users' external behavior over time; (ii) tracking parameters of communication links over time; (iii) scheduling and initiating communication related to predefined or projected content responsive of the above mentioned criteria at time slots selected such that the communication is performed in view of users' predefined or projected preferences in accordance with the parameters of communication links. | 06-24-2010 |
Tomer Adar, Modi'In IL
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20110200610 | Immuno-Modulating Compositions for the Treatment of Immune-Mediated Disorders - The present invention relates to immunomodulatory compositions comprising mammalian colostrum-derived immunoglobulin preparation and optionally further colostrums, milk or milk product component/s and any adjuvants for treating immune-related disorders. More specifically, the invention provides compositions comprising colostrum-derived anti-insulin immunoglobulin preparations for the treatment of Metabolic Syndrome. The invention further provides methods and uses of the immunomodulatory compositions for an active or passive immunization in a disease-antigen specific or non specific manner. | 08-18-2011 |
20120135007 | Anti-LPS Enriched Immunoglobulin Preparations For The Treatment And/Or Prophylaxis Of A Pathologic Disorder - The invention relates to the use of preparations enriched with anti LPS antibodies, such as those derived from mammalian colostrum or avian eggs, and optionally further antibodies against disease-associated antigens, colostrums, milk or milk product component/s and any adjuvants for treating, delaying or preventing the progression of a pathologic disorder such as chronic liver disease, cirrhosis and any complication or disorder associated therewith. The invention further relates to combined compositions comprising a combination of anti-LPS enriched antibody preparations and antibodies recognizing at least one antigen specific for a pathologic disorder and uses thereof in the treatment of immune-related disorders. | 05-31-2012 |
20130164302 | Immuno-Modulating Compositions for the Treatment of Immune-Mediated Disorders - The present invention relates to immunomodulatory compositions comprising mammalian colostrum-derived immunoglobulin preparation and optionally further colostrums, milk or milk product component/s and any adjuvants for treating immune-related disorders. More specifically, the invention provides compositions comprising colostrum-derived anti-insulin immunoglobulin preparations for the treatment of Metabolic Syndrome. The invention further provides methods and uses of the immunomodulatory compositions for an active or passive immunization in a disease-antigen specific or non specific manner. | 06-27-2013 |
20130224216 | ANTI-LPS ENRICHED IMMUNOGLOBULIN FOR USE IN TREATMENT AND/OR PROPHYLAXIS OF A PATHOLOGIC DISORDER - Methods and compositions for treating conditions including liver dysfunction, e.g., associated with fatty liver; glucose intolerance; and others, by administering compositions comprising anti-LPS immunoglobulin enriched colostrum preparations. | 08-29-2013 |
Uri Adar, Nofit IL
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20120120238 | TWO LAYER VIDEO MOTION DETECTION - A method of identifying suspicious movements in video images, comprising: examining a video stream, in a first video motion detection (VMD) stage, to identify sequences of a plurality of video frames in which the video frames together indicate a possibility of movement of an object within the video stream; initiating operation of a second VMD stage on the video stream, which includes analyzing the pixel content of frames of the video stream to identify suspect objects, responsive to an indication from the first VMD stage; and providing an indication of a suspicious movement if the second VMD resulted in an identification of movement of a suspect object. | 05-17-2012 |
Yair Adar, Kvutzat Yavne IL
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20160089928 | FOIL STAMPING MACHINE - A stamping machine is configured for stamping with a stamping head onto an article, The stamping machine includes a camera and a computer system. The computer system includes a display. The computer system is configured to capture from the camera an image of the article prior to the stamping and presents the image on the display. A user selects a symbol using the computer system prior to the stamping onto the article. The user using the computer system, positions the selected symbol as a displayed symbol superimposed on the image of the article. | 03-31-2016 |
Yair Or Adar, Kvutzat Yavne IL
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20160100557 | SYSTEM AND METHOD FOR MONITORING EGGS DURING INCUBATION - An incubation tray is disclosed, including an enclosure with a plurality of egg placements for carrying eggs for incubation within an egg incubator. The incubation tray includes a tester unit including plurality of inspection modules in the enclosure associated with the plurality of egg placements. The inspection modules, each includes radiation emitter(s) and sensor(s), and are configured and operable for respectively inspecting the plurality of eggs located in the egg placements, by irradiating the eggs with radiation from a lateral side of the eggs and measuring a radiation response coming in response to the irradiation from a lateral side of the eggs, giving rise to measured data indicative of conditions of the eggs. The measured data may be processed to determine dynamic and static parameters of the radiation response from which a physiological development stage, and growth of the embryos within the eggs can be estimated. | 04-14-2016 |
Yehuda Arkin Adar, Haifa IL
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20160140508 | MANAGING DYNAMICALLY SCHEDULABLE MEETINGS - Management of a dynamically schedulable meeting is provided. An application such as a calendar application detects a request to schedule the dynamically schedulable meeting. The request includes a time range and meeting attendees. Events on a calendar are analyzed to locate a timeslot for the dynamically schedulable meeting within the time range. The timeslot is identified. In response to a failure to identify the timeslot, other dynamically schedulable meetings are re-scheduled to generate the timeslot. The dynamically schedulable meeting is scheduled at the timeslot. | 05-19-2016 |