| Patent application number | Description | Published |
|---|
| 20110062557 | 3D POLYSILICON DIODE WITH LOW CONTACT RESISTANCE AND METHOD FOR FORMING SAME - A semiconductor p-i-n diode and method for forming the same are described herein. In one aspect, a SiGe region is formed between a region doped to have one conductivity (either p+ or n+) and an electrical contact to the p-i-n diode. The SiGe region may serve to lower the contact resistance, which may increase the forward bias current. The doped region extends below the SiGe region such that it is between the SiGe region and an intrinsic region of the diode. The p-i-n diode may be formed from silicon. The doped region below the SiGe region may serve to keep the reverse bias current from increasing as result of the added SiGe region. In one embodiment, the SiGe is formed such that the forward bias current of an up-pointing p-i-n diode in a memory array substantially matches the forward bias current of a down-pointing p-i-n diode which may achieve better switching results when these diodes are used with the R/W material in a 3D memory array. | 03-17-2011 |
| 20110085370 | SOFT FORMING REVERSIBLE RESISTIVITY-SWITCHING ELEMENT FOR BIPOLAR SWITCHING - A method and system for forming reversible resistivity-switching elements is described herein. Forming refers to reducing the resistance of the reversible resistivity-switching element, and is generally understood to refer to reducing the resistance for the first time. Prior to forming the reversible resistivity-switching element it may be in a high-resistance state. A first voltage is applied to “partially form” the reversible resistivity-switching element. The first voltage has a first polarity. Partially forming the reversible resistivity-switching element lowers the resistance of the reversible resistivity-switching element. A second voltage that has the opposite polarity as the first is then applied to the reversible resistivity-switching element. Application of the second voltage may further lower the resistance of the reversible resistivity-switching element. Therefore, the second voltage could be considered as completing the forming of the reversible resistivity-switching element. | 04-14-2011 |
| 20110140064 | CARBON/TUNNELING-BARRIER/CARBON DIODE - A carbon/tunneling-barrier/carbon diode and method for forming the same are disclosed. The carbon/tunneling-barrier/carbon may be used as a steering element in a memory array. Each memory cell in the memory array may include a reversible resistivity-switching element and a carbon/tunneling-barrier/carbon diode as the steering element. The tunneling-barrier may include a semiconductor or an insulator. Thus, the diode may be a carbon/semiconductor/carbon diode. The semiconductor in the diode may be intrinsic or doped. The semiconductor may be depleted when the diode is under equilibrium conditions. For example, the semiconductor may be lightly doped such that the depletion region extends from one end of the semiconductor region to the other end. The diode may be a carbon/insulator/carbon diode. | 06-16-2011 |
| 20110169126 | In-situ passivation methods to improve performance of polysilicon diode - A nonvolatile memory cell including a storage element in series with a diode steering element. At least one interface of the diode steering element is passivated. | 07-14-2011 |
| 20110176352 | NONVOLATILE MEMORY CELL OPERATING BY INCREASING ORDER IN POLYCRYSTALLINE SEMICONDUCTOR MATERIAL - A nonvolatile memory cell is described, the memory cell comprising a semiconductor diode. The semiconductor material making up the diode is formed with significant defect density, and allows very low current flow at a typical read voltage. Application of a programming voltage permanently changes the nature of the semiconductor material, resulting in an improved diode. The programmed diode allows much higher current flow, in some embodiments one, two or three orders of magnitude higher, at the same read voltage. The difference in current allows a programmed memory cell to be distinguished from an unprogrammed memory cell. Fabrication techniques to generate an advantageous unprogrammed defect density are described. The memory cell of the present invention can be formed in a monolithic three dimensional memory array, having multiple stacked memory levels formed above a single substrate. | 07-21-2011 |
| 20110205782 | STEP SOFT PROGRAM FOR REVERSIBLE RESISTIVITY-SWITCHING ELEMENTS - A method and system for forming, resetting, or setting memory cells is disclosed. One or more programming conditions to apply to a memory cell having a reversible resistivity-switching element may be determined based on its resistance. The determination of one or more programming conditions may also be based on a pre-determined algorithm that may be based on properties of the memory cell. The one or more programming conditions may include a programming voltage and a current limit. For example, the magnitude of the programming voltage may be based on the resistance. As another example, the width of a programming voltage pulse may be based on the resistance. In some embodiments, a current limit used during programming is determined based on the memory cell resistance. | 08-25-2011 |
| 20110280059 | ALTERNATING BIPOLAR FORMING VOLTAGE FOR RESISTIVITY-SWITCHING ELEMENTS - A method and system for forming reversible resistivity-switching elements is described herein. Forming refers to reducing the resistance of the reversible resistivity-switching element, and may refer to reducing the resistance for the first time. Prior to forming the reversible resistivity-switching element it may be in a high-resistance state. The method may comprise alternating between applying one or more first voltages having a first polarity to the memory cell and applying one or more second voltages having a second polarity that is opposite the first polarity to the memory cell until the reversible resistivity-switching memory element is formed. There may be a rest period between applying the voltages of opposite polarity. | 11-17-2011 |
| 20110310655 | Composition Of Memory Cell With Resistance-Switching Layers - A memory device in a 3-D read and write memory includes memory cells. Each memory cell includes a resistance-switching memory element (RSME) in series with a steering element. The RSME has first and second resistance-switching layers on either side of a conductive intermediate layer, and first and second electrodes at either end of the RSME. The first and second resistance-switching layers can both have a bipolar or unipolar switching characteristic. In a set or reset operation of the memory cell, an ionic current flows in the resistance-switching layers, contributing to a switching mechanism. An electron flow, which does not contribute to the switching mechanism, is reduced due to scattering by the conductive intermediate layer, to avoid damage to the steering element. Particular materials and combinations of materials for the different layers of the RSME are provided. | 12-22-2011 |
