Patent application number | Description | Published |
20150152982 | THICK-WALLED HIGH-STRENGTH SOUR-RESISTANT LINE PIPE AND METHOD FOR PRODUCING SAME - A line pipe and a production method therefor are provided. The microstructure in the pipe thickness direction contains 90% or more bainite in a region that extends from a position 2 mm from an inner surface to a position 2 mm from an outer surface. In a hardness distribution in the pipe thickness direction, the hardness in a region other than a center segregation area is 220 Hv10 or less and the hardness in the center segregation area is 250 Hv0.05 or less. The major axes of pores, inclusions, and inclusion clusters that are present in a portion that extends from a position 1 mm from the inner surface to a 3/16 position of the tube thickness and in a portion that extends from a position 1 mm from the outer surface to a 13/16 position of the tube thickness in the tube thickness direction are 1.5 mm or less. A continuous casting slab having the above-described composition is hot-rolled under particular conditions and then subjected to accelerated cooling. | 06-04-2015 |
20150176727 | THICK, HIGH-STRENGTH, SOUR-RESISTANT LINE PIPE AND METHOD FOR PRODUCING SAME - A line pipe having a wall thickness of 20 mm or more and a tensile strength of 560 MPa or more and a production method therefor are provided. The base metal portion contains particular amounts of C, Si, Mn, P, S, Al, Nb, Ca, N, and O, one or more component selected from Cu, Ni, Cr, Mo, V, and Ti as optional components, and the balance being Fe and unavoidable impurities. The microstructure in the pipe thickness direction contains 90% or more bainite and 1% or less of MA in a region that extends from a position 2 mm from an inner surface to a position 2 mm from an outer surface. In a hardness distribution in the pipe thickness direction, the hardness in a region other than a center segregation area is 220 Hv10 or less and the hardness in the center segregation area is 250 Hv10 or less. The major axes of pores, inclusions, and inclusion clusters that are present in a portion that extends from, a position 1 mm from the inner surface to a 3/16 position of the tube thickness and in a portion that extends from a position 1 mm from the outer surface to a 13/16 position of the tube thickness in the tube thickness direction are 1.5 mm or less. | 06-25-2015 |
Patent application number | Description | Published |
20120063133 | LIGHT REFLECTION SHEET, LIGHT SOURCE DEVICE, AND DISPLAY DEVICE - A through hole penetrating in a vertical direction and a slot which is separated from the through hole in the direction along the sheet surface and is long in a separating direction are provided on a light reflection sheet supported on a support body supporting a light source for reflecting light emitted from the light source, and there are provided a first shaft member fitted in the through hole for setting a position of the light reflection sheet with respect to the support body, and a second shaft member fitted in the slot to enable a relative movement in a longitudinal direction of the slot for setting the position of the light reflection sheet with respect to the support body. | 03-15-2012 |
20120087122 | LIGHT SOURCE DEVICE AND DIPLAY DEVICE - There are provided a light source device and a display device which do not generate a wrinkle on an optical sheet even if the optical sheet is held on an LED substrate. A reflection sheet is disposed between each of head portions possessed by a rivet, a positioning rivet and a support rivet and one surface of an LED substrate where an LED is mounted, and a gap in a direction of a sheet thickness is provided between the head portion of each of the rivets and the reflection sheet. In the case in which a sudden thermal change is caused, therefore, the reflection sheet expands or contracts between the head portion of each of the rivets and the reflection sheet so that the wrinkle can be prevented from being generated over the reflection sheet. | 04-12-2012 |
20120087126 | LIGHT SOURCE DEVICE AND DISPLAY DEVICE - There are provided a plurality of circuit boards having a light-emitting element mounted on a one surface and disposed apart from each other with a planar direction aligned, a support body positioned on the other surface side of the circuit boards for supporting the circuit boards, and a connector for electrically connecting the adjacent circuit boards to each other. Inserting holes for inserting a fixture for fixing the circuit boards to the support body are formed on the circuit boards apart from each other, and a dimension of the inserting hole is smaller than that of the other inserting hole. | 04-12-2012 |
20120105763 | LIGHT SOURCE DEVICE, ILLUMINATING DEVICE, BACKLIGHT DEVICE, LIQUID CRYSTAL DISPLAY DEVICE AND DISPLAY DEVICE - Concave marks indicative of an orientation of a circuit board are formed on the circuit board, convex indices to be engaged with the marks are formed in a position in which the circuit is to be attached. An operator confirms the orientation of the circuit board easily and accurately by visually recognizing the marks and touching the marks with a finger. Moreover, the operator positions the circuit board by engaging the marks with the indices. | 05-03-2012 |
20130279173 | REFLECTION SHEET LIGHT SOURCE DEVICE AND DISPLAY DEVICE - It is to provide a reflection sheet, light source device and display device, not only for uniforming the luminance of light emitted from a light source, but also for utilizing a single sheet material to form the reflection sheet having a frame portion that continues to all rims of a flat portion. The reflection sheet is provided with a flat portion that is formed in a substantially square shape, and a frame portion that is folded at a first fold formed on a rim of the flat portion. It is formed in a case shape. It is provided with three second folds divergent from a corner of the flat portion to a rim of a corner on the frame portion, between each corner of the flat portion and the rim of the corner on the frame portion. No gap and step are generated on the corner. | 10-24-2013 |
20140098520 | LIGHT SOURCE DEVICE AND DISPLAY DEVICE - A light source device includes a circuit board having a light-emitting element mounted on a one surface; a support body positioned on the other surface side of the circuit board for supporting the circuit board; a rivet having a head portion, which is positioned on a side of the one surface of the circuit board and cannot be inserted into a first through hole provided on the circuit board and the support body, and a shaft portion having a tip side stopped and held on the support body in a penetration via the first through hole; and a reflection sheet arranged on the one surface of the circuit board for reflecting light. The light source device provides a second through hole having a diameter larger or smaller than the diameter of the head portion at the position corresponding to the head portion on the reflection sheet. | 04-10-2014 |
20140313733 | LIGHT SOURCE DEVICE AND DISPLAY DEVICE - There are provided a light source device and a display device which do not generate a wrinkle on an optical sheet even if the optical sheet is held on an LED substrate. A reflection sheet is disposed between each of head portions possessed by a rivet, a positioning rivet and a support rivet and one surface of an LED substrate where an LED is mounted, and a gap in a direction of a sheet thickness is provided between the head portion of each of the rivets and the reflection sheet. In the case in which a sudden thermal change is caused, therefore, the reflection sheet expands or contracts between the head portion of each of the rivets and the reflection sheet so that the wrinkle can be prevented from being generated over the reflection sheet. | 10-23-2014 |
Patent application number | Description | Published |
20120265956 | STORAGE SUBSYSTEM, DATA MIGRATION METHOD AND COMPUTER SYSTEM - It is provided a storage subsystem, comprising: a storage device which provides a volume for storing data; a processor which executes a program for controlling the storage subsystem; a memory which stores data used by the processor; and a port which is coupled to another storage subsystem. The memory stores interface management information, which holds a use of the port in migration, and port management information, which holds a use of a port of the another storage subsystem in migration. The processor refers to the interface management information and the port management information to identify a port of the another storage subsystem which is permitted to communicate with the port of the storage subsystem, in order to determine a communication zone of the port coupled to the another storage subsystem for migration. | 10-18-2012 |
20120278584 | INFORMATION STORAGE SYSTEM AND STORAGE SYSTEM MANAGEMENT METHOD - An embodiment of this invention is an information storage system comprising a plurality of storage systems connected to be able to communicate. Each of the plurality of storage systems includes default storage system identification information which is the same to the plurality of storage systems, common volume identification information for uniquely identifying volumes provided by the plurality of storage systems to a host computer among the plurality of storage systems, and a controller configured to return the default storage system identification information to the host computer in response to a request from the host computer and to process a read or write request to a volume accompanying the common volume identification information from the host computer. | 11-01-2012 |
20150142915 | INFORMATION STORAGE SYSTEM INCLUDING A PLURALITY OF STORAGE SYSTEMS THAT IS MANAGED USING SYSTEM AND VOLUME IDENTIFICATION INFORMATION AND STORAGE SYSTEM MANAGEMENT METHOD FOR SAME - An embodiment of this invention is an information storage system comprising a plurality of storage systems connected to be able to communicate. Each of the plurality of storage systems includes default storage system identification information which is the same to the plurality of storage systems, common volume identification information for uniquely identifying volumes provided by the plurality of storage systems to a host computer among the plurality of storage systems, and a controller configured to return the default storage system identification information to the host computer in response to a request from the host computer and to process a read or write request to a volume accompanying the common volume identification information from the host computer. | 05-21-2015 |
Patent application number | Description | Published |
20090323537 | NETWORK FAILURE DETECTION SYSTEM, METHOD, AND STORAGE MEDIUM - A system includes, in order to detect a failure occurring on a transmission path through which service traffic is transmitted from a delivery server, a node that is on the transmission path and that monitors the service traffic, and a monitoring server that determines a location at which a failure has occurred by analyzing information transmitted from the node. Each node measures the service traffic, recognizes an adjacent node, which is a node adjacent in a logic tree structure corresponding to a transmission path, establishes a link, recognizes a position of the node in the logic tree structure, sets a monitoring target link to be monitored in the logic tree structure, uses a measurement result, and transmits the estimation result to one of the adjacent node and the server. The server analyzes the estimation result received from the node, and determines the location of a failure on the transmission path. | 12-31-2009 |
20100180315 | Video Quality Monitoring Method, Distribution Server, and Client - A video quality monitoring method includes a distribution server measuring first video quality index values according to a full-reference method by comparing a video, distributed from the distribution server to a client through a network, with a degraded video, generated by causing multiple scenarios of quality degradation due to the network in the video in a pseudo manner, creating characteristic data of first quality degradation values, obtained by causing the quality degradation to vary with the scenarios at regular intervals, and the first video quality index values corresponding to the respective scenarios, and transmitting the characteristic data to the client; and the client measuring a second quality degradation value in the video distributed through the network, and calculating a second video quality index value, equivalent to a value according to the full-reference method, of the distributed video from the measured second quality degradation value and the characteristic data. | 07-15-2010 |
20120320222 | Video Quality Monitoring Method, Distribution Server, and Client - A video quality monitoring method includes a distribution server measuring first video quality index values according to a full-reference method by comparing a video, distributed from the distribution server to a client through a network, with a degraded video, generated by causing multiple scenarios of quality degradation due to the network in the video in a pseudo manner, creating characteristic data of first quality degradation values, obtained by causing the quality degradation to vary with the scenarios at regular intervals, and the first video quality index values corresponding to the respective scenarios, and transmitting the characteristic data to the client; and the client measuring a second quality degradation value in the video distributed through the network, and calculating a second video quality index value, equivalent to a value according to the full-reference method, of the distributed video from the measured second quality degradation value and the characteristic data. | 12-20-2012 |
Patent application number | Description | Published |
20120101276 | CRYSTALS - A main object of the present invention is to provide a novel crystal of 2-{4-[N-(5,6-diphenylpyrazin-2-yl)-N-isopropylamino]butyloxy}-N-(methylsulfonyl)acetamide (hereinafter referred to as “compound A”). A Form-I crystal of compound A shows diffraction peaks at 9.4 degrees, 9.8 degrees, 17.2 degrees and 19.4 degrees in the powder X-ray diffraction spectrum thereof. A Form-II crystal of compound A shows diffraction peaks at 9.0 degrees, 12.9 degrees, 20.7 degrees and 22.6 degrees in the powder X-ray diffraction spectrum thereof. A Form-III crystal of compound A shows diffraction peaks at 9.3 degrees, 9.7 degrees, 16.8 degrees, 20.6 degrees and 23.5 degrees in the powder X-ray diffraction spectrum thereof. | 04-26-2012 |
20140155414 | CRYSTALS OF 2- {4- [N- (5,6-DIPHENYLPYRAZIN-2-YL) -N-ISOPROPYLAMINO]BUTYLOXY}-N- (METHYLSULFONYL) ACETAMIDE - A main object of the present invention is to provide a novel crystal of 2-{4-[N-(5,6-diphenylpyrazin-2-yl)-N-isopropylamino]butyloxy}-N-(methylsulfonyl)acetamide (hereinafter referred to as “compound A”). A Form-I crystal of compound A shows diffraction peaks at 9.4 degrees, 9.8 degrees, 17.2 degrees and 19.4 degrees in the powder X-ray diffraction spectrum thereof. A Form-II crystal of compound A shows diffraction peaks at 9.0 degrees, 12.9 degrees, 20.7 degrees and 22.6 degrees in the powder X-ray diffraction spectrum thereof. A Form-III crystal of compound A shows diffraction peaks at 9.3 degrees, 9.7 degrees, 16.8 degrees, 20.6 degrees and 23.5 degrees in the powder X-ray diffraction spectrum thereof. | 06-05-2014 |
20150266830 | FORM-III CRYSTAL OF 2--N-(METHYLSULFONYL)ACETAMIDE, METHOD FOR PRODUCING THE SAME, AND USE THEREOF - Form-III crystal of 2-{4-[N-(5,6-diphenylpyrazin-2-yl)-N-isopropylamino]butyloxy}-N-(methylsulfonyl)acetamide and a method of producing the crystal are provided. The Form-III crystal exhibits diffraction peaks in its X-ray powder diffraction spectrum at least at the following angles of diffraction 2θ when the spectrum is obtained by using Cu Kα radiation: 9.3 degrees, 9.7 degrees, 16.8 degrees, 20.6 degrees, and 23.5 degrees. The Form-III crystal can be produced by crystallizing the subject compound from an ester solvent or an aromatic hydrocarbon solvent. The crystal may be administered as an active ingredient to a subject for the purpose of treating or preventing certain diseases, disorders, and symptoms, or for promoting angiogenesis or gene therapy. The targeted diseases and disorders include transient ischemic attack, diabetic neuropathy, diabetic gangrene, peripheral circulatory disturbance, connective tissue disease, reocclusion/restenosis after percutaneous transluminal coronary angioplasty, arteriosclerosis, thrombosis, hypertension, pulmonary hypertension, and diabetic nephropathy. | 09-24-2015 |
Patent application number | Description | Published |
20080203437 | Semiconductor integrated circuit device with reduced leakage current - The gate tunnel leakage current is increased in the up-to-date process, so that it is necessary to reduce the gate tunnel leakage current in the LSI which is driven by a battery for use in a cellular phone and which needs to be in a standby mode at a low leakage current. In a semiconductor integrated circuit device, the ground source electrode lines of logic and memory circuits are kept at a ground potential in an active mode, and are kept at a voltage higher than the ground potential in an unselected standby mode. The gate tunnel leakage current can be reduced without destroying data. | 08-28-2008 |
20080203466 | METHOD OF MANUFACTURING A NONVOLATILE SEMICONDUCTOR MEMORY DEVICE, AND A NONVOLATILE SEMICONDUCTOR MEMORY DEVICE - For enhancing the high performance of a non-volatile semiconductor memory device having an MONOS type transistor, a non-volatile semiconductor memory device is provided with MONOS type transistors having improved performance in which the memory cell of an MONOS non-volatile memory comprises a control transistor and a memory transistor. A control gate of the control transistor comprises an n-type polycrystal silicon film and is formed over a gate insulative film comprising a silicon oxide film. A memory gate of the memory transistor comprises an n-type polycrystal silicon film and is disposed on one of the side walls of the control gate. The memory gate comprises a doped polycrystal silicon film with a sheet resistance lower than that of the control gate comprising a polycrystal silicon film formed by ion implantation of impurities to the undoped silicon film. | 08-28-2008 |
20080206975 | METHOD OF MANUFACTURING A NONVOLATILE SEMICONDUCTOR MEMORY DEVICE, AND A NONVOLATILE SEMICONDUCTOR MEMORY DEVICE - For enhancing the high performance of a non-volatile semiconductor memory device having an MONOS type transistor, a non-volatile semiconductor memory device is provided with MONOS type transistors having improved performance in which the memory cell of an MONOS non-volatile memory comprises a control transistor and a memory transistor. A control gate of the control transistor comprises an n-type polycrystal silicon film and is formed over a gate insulative film comprising a silicon oxide film. A memory gate of the memory transistor comprises an n-type polycrystal silicon film and is disposed on one of the side walls of the control gate. The memory gate comprises a doped polycrystal silicon film with a sheet resistance lower than that of the control gate comprising a polycrystal silicon film formed by ion implantation of impurities to the undoped silicon film. | 08-28-2008 |
20090269899 | Semiconductor integrated circuit device with reduced leakage current - The gate tunnel leakage current is increased in the up-to-date process, so that it is necessary to reduce the gate tunnel leakage current in the LSI which is driven by a battery for use in a cellular phone and which needs to be in a standby mode at a low leakage current. In a semiconductor integrated circuit device, the ground source electrode lines of logic and memory circuits are kept at a ground potential in an active mode, and are kept at a voltage higher than the ground potential in an unselected standby mode. The gate tunnel leakage current can be reduced without destroying data. | 10-29-2009 |
20100144108 | METHOD OF MANUFACTURING A NONVOLATILE SEMICONDUCTOR MEMORY DEVICE, AND A NONVOLATILE SEMICONDUCTOR MEMORY DEVICE - For enhancing the high performance of a non-volatile semiconductor memory device having an MONOS type transistor, a non-volatile semiconductor memory device is provided with MONOS type transistors having improved performance in which the memory cell of an MONOS non-volatile memory comprises a control transistor and a memory transistor. A control gate of the control transistor comprises an n-type polycrystal silicon film and is formed over a gate insulative film comprising a silicon oxide film. A memory gate of the memory transistor comprises an n-type polycrystal silicon film and is disposed on one of the side walls of the control gate. The memory gate comprises a doped polycrystal silicon film with a sheet resistance lower than that of the control gate comprising a polycrystal silicon film formed by ion implantation of impurities to the undoped silicon film. | 06-10-2010 |
20110024820 | METHOD OF MANUFACTURING A NONVOLATILE SEMICONDUCTOR MEMORY DEVICE, AND A NONVOLATILE SEMICONDUCTOR MEMORY DEVICE - For enhancing the high performance of a non-volatile semiconductor memory device having an MONOS type transistor, a non-volatile semiconductor memory device is provided with MONOS type transistors having improved performance in which the memory cell of an MONOS non-volatile memory comprises a control transistor and a memory transistor. A control gate of the control transistor comprises an n-type polycrystal silicon film and is formed over a gate insulative film comprising a silicon oxide film. A memory gate of the memory transistor comprises an n-type polycrystal silicon film and is disposed on one of the side walls of the control gate. The memory gate comprises a doped polycrystal silicon film with a sheet resistance lower than that of the control gate comprising a polycrystal silicon film formed by ion implantation of impurities to the undoped silicon film. | 02-03-2011 |
20110215414 | Semiconductor integrated circuit device with reduced leakage current - The gate tunnel leakage current is increased in the up-to-date process, so that it is necessary to reduce the gate tunnel leakage current in the LSI which is driven by a battery for use in a cellular phone and which needs to be in a standby mode at a low leakage current. In a semiconductor integrated circuit device, the ground source electrode lines of logic and memory circuits are kept at a ground potential in an active mode, and are kept at a voltage higher than the ground potential in an unselected standby mode. The gate tunnel leakage current can be reduced without destroying data. | 09-08-2011 |
20120113709 | Semiconductor Integrated Circuit Device with Reduced Leakage Current - The gate tunnel leakage current is increased in the up-to-date process, so that it is necessary to reduce the gate tunnel leakage current in the LSI which is driven by a battery for use in a cellular phone and which needs to be in a standby mode at a low leakage current. In a semiconductor integrated circuit device, the ground source electrode lines of logic and memory circuits are kept at a ground potential in an active mode, and are kept at a voltage higher than the ground potential in an unselected standby mode. The gate tunnel leakage current can be reduced without destroying data. | 05-10-2012 |
20120257443 | SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE WITH REDUCED LEAKAGE CURRENT - The gate tunnel leakage current is increased in the up-to-date process, so that it is necessary to reduce the gate tunnel leakage current in the LSI which is driven by a battery for use in a cellular phone and which needs to be in a standby mode at a low leakage current. In a semiconductor integrated circuit device, the ground source electrode lines of logic and memory circuits are kept at a ground potential in an active mode, and are kept at a voltage higher than the ground potential in an unselected standby mode. The gate tunnel leakage current can be reduced without destroying data. | 10-11-2012 |
20130229860 | SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE WITH REDUCED LEAKAGE CURRENT - The gate tunnel leakage current is increased in the up-to-date process, so that it is necessary to reduce the gate tunnel leakage current in the LSI which is driven by a battery for use in a cellular phone and which needs to be in a standby mode at a low leakage current. In a semiconductor integrated circuit device, the ground source electrode lines of logic and memory circuits are kept at a ground potential in an active mode, and are kept at a voltage higher than the ground potential in an unselected standby mode. The gate tunnel leakage current can be reduced without destroying data. | 09-05-2013 |
20150155031 | Semiconductor Integrated Circuit Device with Reduced Leakage Current - The gate tunnel leakage current is increased in the up-to-date process, so that it is necessary to reduce the gate tunnel leakage current in the LSI which is driven by a battery for use in a cellular phone and which needs to be in a standby mode at a low leakage current. In a semiconductor integrated circuit device, the ground source electrode lines of logic and memory circuits are kept at a ground potential in an active mode, and are kept at a voltage higher than the ground potential in an unselected standby mode. The gate tunnel leakage current can be reduced without destroying data. | 06-04-2015 |
20150357026 | SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE WITH REDUCED LEAKAGE CURRENT - The gate tunnel leakage current is increased in the up-to-date process, so that it is necessary to reduce the gate tunnel leakage current in the LSI which is driven by a battery for use in a cellular phone and which needs to be in a standby mode at a low leakage current. In a semiconductor integrated circuit device, the ground source electrode lines of logic and memory circuits are kept at a ground potential in an active mode, and are kept at a voltage higher than the ground potential in an unselected standby mode. The gate tunnel leakage current can be reduced without destroying data. | 12-10-2015 |
Patent application number | Description | Published |
20100067967 | IMAGE FORMING SYSTEM AND IMAGE FORMING APPARATUS - An image forming system includes: a decurl section which corrects a curl on a sheet on which an image has been formed; a sheet ejection section on which the sheet to be ejected is stacked; a finishing section which conducts post processing on the sheet on which the image has been formed and ejects the sheet on the sheet ejection section; and an operation and display section having a setting screen for setting a post-processing condition and a selection screen for selecting a decurl direction to be corrected by the decurl section. A selection section that selects the decurl direction given by the decurl section, and a decurl image that shows a decurl direction on the sheet ejection section for the sheet, are indicated on the selection screen, and the selection section and the decurl image are displayed on the same selection screen. | 03-18-2010 |
20100119277 | IMAGE FORMING SYSTEM AND IMAGE FORMING DEVICE - Disclosed is an image forming system including an image forming device to form an image on a paper and a plurality of post processing devices, and the image forming device includes an ejecting place information informing unit, a comparing unit and a stopping permission information informing unit, and the post processing devices include a determination unit, a permission request unit and an actuation determination unit. | 05-13-2010 |
20100271672 | SHEET FINISHER, IMAGE FORMING APPARATUS AND IMAGE FORMING SYSTEM - A sheet finisher includes: a conveyance section to convey a sheet; an image reading section which reads an image of a sheet; and a sheet finisher control section, wherein the sheet finisher control section transmits wait information which requests an interruption of sheet conveyance, to outside, and transmits image data acquired by reading of the image reading section to the outside after transmitting the wait information. | 10-28-2010 |
20120319344 | SHEET ATACKER AND FINISHER - An improved sheet stacking scheme is described which is applied to a copying machine, a printer, or the like. Even when printed sheets are sorted and stacked in different stacking positions, sheet alignment is achieved by inhibiting each sheet from being displaced. When sheets are sorted into a first stacking position and a second stacking position, the finisher control unit | 12-20-2012 |
20130242346 | IMAGE FORMING APPARATUS, IMAGE FORMING SYSTEM, AND IMAGE FORMING METHOD - Provided is an image forming system where a plurality of image forming apparatuses for printing an image on a sheet based on a job, and outputting the image are connected with one another in a communicable manner, including a communication unit to carry out the communication, and a control unit to manage the job, and control the communication unit, where the control unit divides the job for sequentially processing a plurality of steps into a plurality of divided step jobs, executes a former part of the divided step jobs on an image forming apparatus which can execute the former part of the divided step jobs, and reserves a latter part of the divided step jobs on an image forming apparatus which can execute the latter part of the divided step jobs, and is different from the image forming apparatus, thereby enabling efficient execution of the job. | 09-19-2013 |