Shih-Hsien
Shih-Hsien Chang, Taoyuan Shien TW
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20120293072 | FREQUENCY-VARIABLE DIMMING CONTROL APPARATUS FOR LIGHT-EMITTING DIODES AND METHOD FOR OPERATING THE SAME - A frequency-variable dimming control apparatus for a plurality of light-emitting diodes (LEDs) and a method for operating the same are disclosed. The frequency-variable dimming control apparatus is provided for dimming the LEDs. The frequency-variable dimming control apparatus includes a DC/AC converter, a resonance circuit, a transformer, a current-sensing unit, and a control unit. The DC/AC converter receives and converts a DC input voltage into an AC voltage. The resonance circuit is electrically connected to the DC/AC converter to receive and converter the AC voltage into a resonance voltage. The transformer receives the resonance voltage and outputs an AC driven voltage. The current-sensing unit is electrically connected to a secondary-side winding of the transformer to output a current frequency signal. The control unit is electrically connected to the current-sensing unit and the DC/AC converter to receive a dimming control signal for dimming the LEDs. | 11-22-2012 |
Shih-Hsien Chang US
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20140168962 | DIRECT-CURRENT LIGHT-EMITTING DIODE LAMP WITH POLARITY-HOLDING FUNCTION - A direct-current light-emitting diode lamp (DC LED lamp) with a polarity-holding function receives a DC driving voltage and the DC LED lamp includes at least one LED string and a polarity-holding circuit. The at least one LED string has a plurality of LEDs and each LED is connected in series to each other to form an anode terminal and a cathode terminal. The polarity-holding circuit is electrically connected to the anode terminal and the cathode terminal of the LED string. The polarity-holding circuit receives the DC driving voltage and holds the polarity of the DC driving voltage, thus driving the LED string in forward bias. | 06-19-2014 |
Shih-Hsien Chang, Hsinchu TW
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20150377951 | METHOD FOR TESTING SPECIAL PATTERN AND PROBE CARD DEFECT IN WAFER TESTING - Methods for testing a special pattern and testing a probe card defect in wafer testing are provided. In the method for testing the special pattern, a wafer is divided into multiple testing partitions, in which each of the testing partitions includes multiple dies. The dies in each testing partition of the wafer are respectively tested by multiple sites of the probe card to obtain a testing map. Then, a number of the dies having defects and a number of the dies without defect within each of the testing partitions in the testing map are accumulated to construct chi-square test and calculate a maximum P-value. Finally, it is determined whether a minimum of the maximum P-values of all of the testing partitions is smaller than a certain predetermined threshold. If the minimum is smaller than the threshold, it is determined that the testing map of the wafer contains the special pattern. | 12-31-2015 |
Shih-Hsien Chang, Taoyuan County TW
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20120268024 | CURRENT-SHARING BACKLIGHT DRIVING CIRCUIT FOR LIGHT-EMITTING DIODES AND METHOD FOR OPERATING THE SAME - A current-sharing backlight driving circuit for light-emitting diodes and a method for operating the same are disclosed. The current-sharing backlight driving circuit includes a class-E converter and a plurality of power processing units. The class-E converter receives a DC input voltage and produces an AC output voltage. The AC output voltage outputted from the class-E converter is converted into a DC driven voltage thorough the power processing units, thus driving the light-emitting diodes and providing a current-sharing backlight operation. | 10-25-2012 |
Shih-Hsien Chen, Zhubei City TW
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20150098266 | MECHANISMS FOR PREVENTING LEAKAGE CURRENTS IN MEMORY CELLS - Memory cells and operation methods thereof are provided. A memory device includes a number of memory cells. Each of the memory cells includes a first transistor, a switch and a capacitor. The first transistor has a drain connected to a corresponding bit-line. The switch has a first terminal connected to a source of the first transistor and a second terminal coupled to a reference voltage. The capacitor has a first plate and a second plate, and the first plate of the capacitor is electrically connected to a gate of the first transistor. The second plate of the capacitor is connected to a corresponding word line. The switch is turned off when the memory cell is not selected to perform a write operation or a read operation. | 04-09-2015 |
20150132905 | STRUCTURE AND METHOD FOR SINGLE GATE NON-VOLATILE MEMORY DEVICE HAVING A CAPACITOR WELL DOPING DESIGN WITH IMPROVED COUPLING EFFICIENCY - The NVM device includes a semiconductor substrate having a first region and a second region. The NVM device includes a data-storing structure formed in the first region and designed operable to retain charges. The NVM device includes a capacitor formed in the second region and coupled with the data-storing structure for data operations. The data-storing structure includes a first doped well of a first-type in the semiconductor substrate. The data-storing structure includes a first gate dielectric feature on the first doped well. The data-storing structure includes a first gate electrode disposed on the first gate dielectric feature and configured to be floating. The capacitor includes a second doped well of the first-type. The capacitor includes a second gate dielectric feature on the second doped well. The capacitor also includes a second gate electrode disposed on the second gate dielectric feature and connected to the first gate electrode. | 05-14-2015 |
20160093628 | MEMORY DEVICE, MEMORY CELL AND MEMORY CELL LAYOUT - A memory device includes at least one memory cell. The memory cell includes first and second transistors, and first and second capacitors. The first transistor is coupled to a source line. The second transistor is coupled to the first transistor and a bit line. The first capacitor is coupled to a word line and the second transistor. The second capacitor is coupled to the second transistor and an erase gate. | 03-31-2016 |
Shih-Hsien Chen, Shengang Township TW
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20110296671 | Display Modules and Methods of Fixing Flexible Circuit Boards Therein - A method of fixing a flexible circuit board. The method comprises the following steps: providing a flexible circuit board having a locating hole, providing a display module frame having a locating element corresponding to the locating hole, passing the locating element through the locating hole, bonding the flexible circuit board to the frame and deforming the locating element for to fix the flexible circuit board on the frame. | 12-08-2011 |
Shih-Hsien Chen, Kaohsiung City TW
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20150023018 | FASTENER, LIGHT SOURCE MODULE, AND METHOD OF ASSEMBLING A LIGHT SOURCE MODULE - A fastener includes a head portion and a shank portion that extends from the head portion. The shank portion has a distal end that is distal from the head portion and that is formed with at least two bendable anchor segments. The fastener is used to fasten a base plate of a light emitting bar to a base of a light source module. | 01-22-2015 |
Shih-Hsien Chen, Hsinchu City TW
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20130092991 | STRUCTURE AND METHOD FOR SINGLE GATE NON-VOLATILE MEMORY DEVICE HAVING A CAPACITOR WELL DOPING DESIGN WITH IMPROVED COUPLING EFFICIENCY - The NVM device includes a semiconductor substrate having a first region and a second region. The NVM device includes a data-storing structure formed in the first region and designed operable to retain charges. The NVM device includes a capacitor formed in the second region and coupled with the data-storing structure for data operations. The data-storing structure includes a first doped well of a first-type in the semiconductor substrate. The data-storing structure includes a first gate dielectric feature on the first doped well. The data-storing structure includes a first gate electrode disposed on the first gate dielectric feature and configured to be floating. The capacitor includes a second doped well of the first-type. The capacitor includes a second gate dielectric feature on the second doped well. The capacitor also includes a second gate electrode disposed on the second gate dielectric feature and connected to the first gate electrode. | 04-18-2013 |
20140016399 | MEMORY ARCHITECTURES HAVING DENSE LAYOUTS - One embodiment relates to a memory device including a plurality of memory units tiled together to form a memory array. A memory unit includes a plurality of memory cells, which include respective capacitors and respective transistors, disposed on a semiconductor substrate. The capacitors include respective lower plates disposed in a conductive region in the semiconductor substrate. A wordline extends over the conductive region, and a contact couples the wordline to the conductive region so as to couple the wordline to the lower plates of the respective capacitors. The respective transistors are arranged so successive gates of the transistors are arranged on alternating sides of the wordline. | 01-16-2014 |
20150016180 | MEMORY ARCHITECTURES HAVING DENSE LAYOUTS - Some embodiments relate to a memory cell to store one or more bits of data. The memory cell includes a capacitor including first and second capacitor plates which are separated from one another by a dielectric. The first capacitor plate corresponds to a doped region disposed in a semiconductor substrate, and the second capacitor plate is a polysilicon or metal layer arranged over the doped region. The memory cell also includes a transistor laterally spaced apart from the capacitor and including a gate electrode arranged between first and second source/drain regions. An interconnect structure is disposed over the semiconductor substrate and couples the gate electrode of the transistor to the second capacitor plate. | 01-15-2015 |
Shih-Hsien Chuang, Xizhi City TW
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20100179146 | Indolinone Compounds as Kinase Inhibitors - Indolinone compounds of formula (I) or (II): | 07-15-2010 |
Shih-Hsien Chuang, Taoyuan City TW
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20130190312 | MODULATORS OF HEC1 ACTIVITY AND METHODS THEREFOR - Compounds, compositions, and methods for modulation of Hec1/Nek2 interaction are provided. Such compounds disrupt Nek2/Hec1 binding and may be useful as chemotherapeutic agents for neoplastic diseases. | 07-25-2013 |
20150250794 | MODULATORS OF HEC1 ACTIVITY AND METHODS THEREFOR - Compounds, compositions, and methods for modulation of Hec1/Nek2 interaction are provided. Such compounds disrupt Nek2/Hec1 binding and may be useful as chemotherapeutic agents for neoplastic diseases. | 09-10-2015 |
Shih-Hsien Huang, Renwu Township TW
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20120126296 | INTEGRATED CIRCUITS AND FABRICATION METHODS THEREOF - A method of forming an integrated circuit includes forming a gate structure over a substrate. Portions of the substrate are removed to form recesses adjacent to the gate structure. A silicon-containing material structure is formed in each of the recesses. The silicon-containing material structure has a first region and a second region, the second region is closer to the gate structure than the first region, and the first region is thicker than the second region | 05-24-2012 |
20140299945 | INTEGRATED CIRCUITS HAVING SOURCE/DRAIN STRUCTURE - An integrated circuit includes a gate structure over a substrate. A silicon-containing material structure is in each of recesses that are adjacent to the gate structure. The silicon-containing material structure has a first region and a second region, the second region is closer to the gate structure than the first region, and the first region is thicker than the second region. | 10-09-2014 |
Shih-Hsien Huang, Tainan City TW
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20150055336 | PIXEL STRUCTURE AND DISPLAY USING THE SAME - A pixel structure comprising an N-side light emitting surface, several reflectors and several light emitting elements is provided. N is a nature number equal to or greater than 3. The light emitting surface has a first normal line. The reflectors surround peripherals of the light emitting surface. Each reflector, which correspondingly connects with a side of the light emitting surface, is connected to its adjoining reflectors and comprises a first reflecting portion and a second reflecting portion having a second normal line and a third normal line, respectively. The second and the first normal lines intercross to form an acute angle α, and the third and the first normal lines intercross to form an obtuse angle β. The lights emitted by the light emitting elements are reflected by the second reflecting portion of the reflectors so that the lights are directed towards the light emitting surface. | 02-26-2015 |
20150122786 | APPARATUS AND METHOD FOR FABRICATING PERIODIC MICRO-PATTERN BY LASER BEAMS - The invention provides an apparatus for fabricating a periodic micro-pattern by laser beams. The apparatus includes an ultrafast laser light source configured to generate an output laser beam. A diffraction optical element is configured to divide the output laser beam into a plurality of diffractive laser beams. A confocal system is configured to focus the plurality of diffractive laser beams on a focal point, so that the plurality of diffractive laser beams produces an interference light beam with interference phenomena. The interference light beam ablates a surface of an element to fabricate a periodic micro-pattern on the surface of the element. The confocal system includes a first lens, a second lens and a light shielding mask. The plurality of diffractive laser beams passes through the first lens, the light shielding mask and the second lens in sequence. | 05-07-2015 |
Shih-Hsien Tseng, Hsinchu TW
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20160141102 | SUBSTRATE-LESS ELECTRONIC COMPONENT AND THE METHOD TO FABRICATE THEREOF - An electronic component is disclosed, the electronic component comprising: a conductive structure, comprising a plurality of conductive layers separated by a plurality of insulating layers, wherein the plurality of conductive layers and the plurality of insulating layers are stacked in a vertical direction, wherein the plurality of conductive layers forms at least one coil, wherein each of the coil is formed along the vertical direction across said plurality of conductive layers, wherein the plurality of insulating layers are not supported by a substrate. | 05-19-2016 |
Shih-Hsien Tseng, Zhubei City TW
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20120131792 | METHOD OF PRODUCING AN INDUCTOR WITH A HIGH INDUCTANCE - A method of producing an inductor with high inductance includes forming a removable polymer layer on a temporary carrier; forming a structure including a first coil, a second coil, and a dielectric layer on the removable polymer layer; forming a first magnetic glue layer on the removable polymer layer and the structure; removing the temporary carrier; and forming a second magnetic glue layer below the structure and the first magnetic glue layer. | 05-31-2012 |
20140016289 | NETWORK COMMUNICATION DEVICE - A network communication device is disclosed. The network communication device includes a circuit board, a network connector, a network chip and a plurality of network magnetic assemblies. The network connector, the network chip and the network magnetic assemblies are disposed on the circuit board. The network magnetic assemblies are electrically connected with the network connector and the network chip, respectively. Each of the network magnetic assemblies includes an Ethernet transformer and at least one inductor. The Ethernet transformer is electrically connected in series with the inductor via a conductive trace of the circuit board. The spaced distance or a path length of the conductive trace between the Ethernet transformer and the inductor of the at least one network magnetic assembly is less than a first specific length. | 01-16-2014 |
20160073491 | NETWORK COMMUNICATION DEVICE - A network communication device is disclosed. The network communication device includes a circuit board, a network connector, a network chip and a plurality of network magnetic assemblies. The network connector, the network chip and the network magnetic assemblies are disposed on the circuit board. The network magnetic assemblies are electrically connected with the network connector and the network chip, respectively. Each of the network magnetic assemblies includes an Ethernet transformer and at least one inductor. The Ethernet transformer is electrically connected in series with the inductor via a conductive trace of the circuit board. Any two adjacent Ethernet transformers are separately arranged with a gap having a second specific length. | 03-10-2016 |
Shih-Hsien Wang, Taipei TW
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20100292379 | PVC resin composition and products made of the same - A PVC resin composition having high flame retardancy and low smoke generation comprises a formula including a PVC resin, inorganic powders, a additive, a toughening agent, a coupling agent and an initiator mixed by proportion, wherein the initiator cooperates with the coupling agent to improve a binding effect of the inorganic powders inside the PVC resin composition to endow a PVC product if made of the composition to provide with excellent tensile strength and elongation and enable the product to perform high flame retardancy and low smoke generation during combustion. | 11-18-2010 |
Shih-Hsien Yang, Hsin-Chu TW
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20140048129 | SOLAR CELL AND FABRICATING METHOD THEREOF - A solar cell includes a substrate. The substrate has a light-receiving surface and a back surface opposite to the light-receiving surface. The substrate includes plural trenches formed on the back surface. The solar cell includes plural n-type diffusion areas and plural p-type diffusion areas alternately disposed on the back surface and the surface of the trenches. The possibility of recombination of the electron-hole pair while moving can be reduced because of the trenches, which are formed in the substrate. | 02-20-2014 |
20150013743 | SOLAR CELL MODULE - A solar cell module includes a front plate, at least one solar cell chip, and at least one anti-ultraviolet light element. The front plate has at least one anti-ultraviolet light segment and at least one light receiving segment. The solar cell chip is disposed at one side of the front plate, and a vertical projection of the light receiving segment of the front plate overlaps at least one portion of the solar cell chip. The anti-ultraviolet light element is disposed at the other side of the front plate opposite to the solar cell chip, and covers the anti-ultraviolet light segment of the front plate but exposes the light receiving segment of the front plate. The anti-ultraviolet light element allows visible light to pass therethrough, but blocks the ultraviolet light. | 01-15-2015 |
20150175291 | CARTON - A carton includes a top casing and a bottom casing. The top casing includes plural first sidewalls and plural first tongue parts connecting to the first sidewalls. The first tongue stripes parts are used for fixing on the inner surfaces of the adjacent first sidewalls. The bottom casing includes plural second sidewalls and plural second tongue parts connecting to the second sidewalls. The second tongue parts are used for fixing on inner surfaces of the adjacent second sidewalls. The bottom casing further includes plural reinforcing pieces respectively connected to one of the second sidewalls. The reinforcing pieces are disposed at the outside of the second sidewalls. When the top casing is coupled to the bottom casing, the reinforcing pieces are utilized for filling the gap between the top casing and the bottom casing caused by the first tongue parts. | 06-25-2015 |
Shih-Hsien Yang, Hsinchu City TW
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20080270813 | Mother/daughter switch design with self power-up control - System and method for providing power to integrated circuitry with good power-on responsive time and reduced power-on transient glitches. A preferred embodiment comprises a daughter switch coupled to a circuit block, a first control circuit coupled to the daughter circuit, a second control circuit coupled to the first control circuit, and a mother circuit coupled to the circuit block and to the second control circuit. After the daughter switch is turned on by a control signal, the mother switch is not turned on until the daughter switch has discharged (charged) the voltage potential across power rails of the mother circuit to a point where glitches are minimized. The second control circuit turns on the mother circuit when the reduced voltage potential is reached, with a signal produced by the first control circuit reflects the voltage potential. Furthermore, a bypass circuit can be used to reduce leakage current. | 10-30-2008 |
20130326438 | LAYOUT MODIFICATION METHOD AND SYSTEM - A method comprises providing a non-transitory, machine-readable storage medium storing a partial netlist of at least a portion of a previously taped-out integrated circuit (IC) layout, representing a set of photomasks for fabricating an IC having the IC layout such that the IC meets a first specification value. A computer identifies a proper subset of a plurality of first devices in the IC layout, such that replacement of the proper subset of the first devices by second devices in a revised IC layout satisfies a second specification value different from the first specification value. At least one layout mask is generated and stored in at least one non-transitory machine readable storage medium, accessible by a tool for forming at least one additional photomask, such that the set of photomasks and the at least one additional photomask are usable to fabricate an IC according to the revised IC layout. | 12-05-2013 |
20140351784 | LAYOUT MODIFICATION METHOD AND SYSTEM - A method comprises providing a non-transitory, machine-readable storage medium storing a partial netlist of at least a portion of a previously taped-out integrated circuit (IC) layout, representing a set of photomasks for fabricating an IC having the IC layout such that the IC meets a first specification value. A computer identifies a proper subset of a plurality of first devices in the IC layout, such that replacement of the proper subset of the first devices by second devices in a revised IC layout satisfies a second specification value different from the first specification value. At least one layout mask is generated and stored in at least one non-transitory machine readable storage medium, accessible by a tool for forming at least one additional photomask, such that the set of photomasks and the at least one additional photomask are usable to fabricate an IC according to the revised IC layout. | 11-27-2014 |
20150363540 | LAYOUT MODIFICATION METHOD AND SYSTEM - A method comprises providing a non-transitory, machine-readable storage medium storing a partial netlist of at least a portion of a previously taped-out integrated circuit (IC) layout, representing a set of photomasks for fabricating an IC having the IC layout such that the IC meets a first specification value. A computer identities a proper subset of a plurality of first devices in the IC layout, such that replacement of the proper subset of the first devices by second devices in a revised IC layout satisfies a second specification value different from the first specification value. At least one layout mask is generated and stored in at least one non-transitory machine readable storage medium, accessible by a tool for forming at least one additional photomask, such that the set of photomasks and the at least one additional photomask are usable to fabricate an IC according to the revised IC layout. | 12-17-2015 |
Shih-Hsien Yang, Taipei City TW
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20090133087 | METHOD FOR DEVISING A COMMUNICATION PLATFORM WHICH CAN DISPLAY THE MEDIA ADVERTISEMENT AUTOMATICALLY - A method for devising a communication platform that can play the media advertisement automatically. After a computer is logged on, a user is connected to the communication platform. A network media advertisement is displayed through the reception of a network control signal by network. Or a custom media advertisement is played by a media player under a time period. After the playing of a custom media advertisement or a network media advertisement, the communication platform is connected to. A custom media advertisement or a network media advertisement is played by the above mentioned methods. | 05-21-2009 |
Shih-Hsien Yang, Hsinchu TW
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20100146221 | Method For Protecting Memory Data - A method for protecting memory data is provided, by extracting bad block addresses stored in the bad block information obtained during the memory scanning testing as memory label, and using an algorithm to compute an identification based on the memory label so that the memory will check the identification and whether the blocks pointed by memory label being bad blocks when an external device request data reading so as to prevent the unauthorized data from being read and achieve the object of protecting memory data. | 06-10-2010 |
Shih-Hsien Yang, Taipei TW
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20120326908 | COMMUNICATION SYSTEM FOR FREQUENCY SHIFT KEYING SIGNAL - A communication system includes a time-to-digital converter, a digital low-pass filter, and a digital signal processor. The time-to-digital converter receives an in-phase signal of a frequency-shift keying signal and to generate a digital signal according to the in-phase signal. The digital low-pass filter receives the digital signal and to generate a filtered signal including N continuous words according to the digital signal. The digital signal processor divides up the N continuous words into N/2 word sets in order, wherein each of the N/2 word sets includes a first word and a second word, and if a difference between the first word and the second word meets a predetermined condition, the digital signal processor generates an output data and an output clock according to all the first words and the second words that have difference which meets the predetermined condition. | 12-27-2012 |
Shih-Hsien Yeh, Sinjhuang City TW
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20100247064 | Systems and Methods of Variable Frame Rate Playback - Systems and methods for variable rate playback are provided. Disclosed systems and methods of variable frame rate playback may reduce processor loading for presentation of multiple videos in a wall of video thumbnails, for example. The frame rate of the thumbnails may be dynamically changed based on different parameters. In an example embodiment, the parameter may include a video thumbnail position on a browsing page or the position of the video thumbnail as displayed on a video display. As an example embodiment of a default parameter, a seminal thumbnail may be set to the center thumbnail of a browsing page. Then, the frame rate of non-seminal thumbnails may decrease gradually relative to the distance from the seminal thumbnail. The frame rate may be dynamically changed based on a user behavior. The processor may enable real time decoding of the video thumbnail that a user focuses on, which may be determined, for example, by the position of a pointer, a selection of a thumbnail, and/or an entry of a particular video parameter as entered through a user interface. | 09-30-2010 |
Shih-Hsien Yu, New Taipei City TW
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20160127308 | METHOD FOR KEEPING REMOTE CONNECTION, ELECTRONIC DEVICE AND SERVER - A method for keeping remote connection, an electronic device, and a server are provided. After establishing a first network connection, the electronic device enters a power-saving state from an operation state. While operating in the power-saving state, a communication module of the electronic device continuously detects a keep-alive packet transmitted by the server via the first network connection. If an error of reception of the keep-alive packet occurs, the electronic device returns to the operation state from the power-saving state in response to a wake-up signal, so as to re-establish a second network connection between the electronic device and the server. | 05-05-2016 |
Shih-Hsien Yu, Taipei TW
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20090231148 | STRUCTURE FOR DISPLAYING OPERATION STATUS OF A POWER SUPPLY - The present invention provides a power source to transform external power to DC driving power and has an air fan and a fan driving circuit connecting to a detection element to detect operation temperature inside the power supply and output a temperature control signal. Through the temperature control signal, the DC driving power is determined to drive the air fan at a required rotation speed. The power supply further has a status display circuit which includes at least two switches and two lighting elements. The switches are set at different ON/OFF levels and triggered by the temperature control signal or the fan driving circuit to determine whether ON/OFF of the switches be activated. The lighting elements are connected to the switches and driven by the DC driving power to emit light in the ON condition of the switches. | 09-17-2009 |