Han, Kyoungki-Do
Hi-Hyun Han, Kyoungki-Do KR
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20080225628 | Semiconductor memory device for driving a word line - A semiconductor memory device for driving a word line is provided. The enabling timing of a word line is advanced using a block information signal that contains no redundancy information, thereby improving a RAS to CAS delay (tRCD). A sub word line driving enable signal for controlling a driving of a sub word line and a main word line driving enable signal for controlling a driving of a main word line are controlled by the block information signal that contains only mat information but does not contain the redundancy information. Accordingly, the word line control signal may be activated earlier than the sub word line driving enable signal and the main word line driving enable signal, thereby advancing the enable timing of the word line. | 09-18-2008 |
20080247248 | SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR DRIVING THE SAME - A semiconductor memory device includes: a driving voltage supplying unit configured to detect a simultaneous activation of banks and selectively supply one of a high voltage and an external voltage lower than the high voltage as a driving voltage; a flag detecting unit configured to detect inputs of flag signals activated in response to an active command and generate a precharge control signal; and a signal generating unit configured to generate a bit line precharge signal swinging between the driving voltage and a ground voltage in response to the precharge control signal. | 10-09-2008 |
20090116322 | Semiconductor memory device having wafer burn-in test mode - A semiconductor memory device includes an enable signal generator configured to generate an enable signal in response to a plurality of burn-in test signals; a test mode signal generator configured to generate a plurality of peripheral region test mode signals and a plurality of core region test mode signals corresponding to the burn-in test signals in response to the enable signal; a core region controller configured to control circuits in a core region in response to the core region test mode signals; and a peripheral region controller configured to control circuits in a peripheral region in response to the peripheral region test mode signals. | 05-07-2009 |
Ky-Hyun Han, Kyoungki-Do KR
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20080242095 | Method for forming trench in semiconductor device - A method for fabricating a trench in a semiconductor device includes forming a mask pattern over a substrate, and etching the substrate to form a trench with a vertical profile, the etching performed at an etching rate of approximately 40 A/sec or less using an etching gas including a gas generating polymers | 10-02-2008 |
20080242098 | Method for forming pattern in semiconductor device - A method for forming a pattern in a semiconductor device includes forming an etch target layer over a substrate, forming a hard mask pattern over the etch target layer, and etching the etch target layer using the hard mask pattern as an etch mask and a gas mixture including a fluorine (F)-based gas and a bromine (Br)-based gas as an etch gas to form a target pattern. | 10-02-2008 |
Woo-Seung Han, Kyoungki-Do KR
Patent application number | Description | Published |
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20090175095 | VOLTAGE SENSING CIRCUIT AND METHOD FOR OPERATING THE SAME - A voltage sensing circuit is capable of controlling a pumping voltage to be stably generated in a low voltage environment. The voltage sensing circuit includes a current mirror having first and second terminals, a first switching element configured to control current on the first terminal of the current mirror by a reference voltage, a second switching element configured to control current from the second terminal of the current mirror in response to a pumping voltage, and a third switching element configured to control current sources of the first and second switching elements to receive a negative voltage. | 07-09-2009 |
20110210794 | VOLTAGE SENSING CIRCUIT CAPABLE OF CONTROLLING A PUMP VOLTAGE STABLY GENERATED IN A LOW VOLTAGE ENVIRONMENT - Herein, a voltage sensing circuit, which is capable of controlling a pumping voltage to be stably generated in a low voltage environment, is provided. The voltage sensing circuit includes a current mirror having first and second terminals, a first switching element configured to control current on the first terminal of the current mirror by a reference voltage, a second switching element configured to control current from the second terminal of the current mirror in response to a pumping voltage, and a third switching element configured to control current sources of the first and second switching elements to receive a negative voltage. | 09-01-2011 |
20110242920 | VOLTAGE SENSING CIRCUIT CAPABLE OF CONTROLLING A PUMP VOLTAGE STABLY GENERATED IN A LOW VOLTAGE ENVIRONMENT - Herein, a voltage sensing circuit, which is capable of controlling a pumping voltage to be stably generated in a low voltage environment, is provided. The voltage sensing circuit includes a current mirror having first and second terminals, a first switching element configured to control current on the first terminal of the current mirror by a reference voltage, a second switching element configured to control current from the second terminal of the current mirror in response to a pumping voltage, and a third switching element configured to control current sources of the first and second switching elements to receive a negative voltage. | 10-06-2011 |