Cheng-Ta
Cheng Ta Chuang, New Taipei TW
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20130314317 | APPARATUS FOR NON-CONTACT 3D HAND GESTURE RECOGNITION WITH CODE-BASED LIGHT SENSING - An apparatus for non-contact 3D hand gesture recognition with code-based light sensing is provided, including a plurality of light emitters, at least a light sensor, and a controller, wherein the controller is connected to and controls the plurality of light emitters to emit lights containing a respective identification code. The emitted lights can be reflected by an object, for example, a hand in our application. The at least a light sensor can identify the original light emitter of each respective reflected light through the identification code as well as computing the power level of each respective reflected light to determine the distance or location of the object. The hand gesture recognition can be deduced based on the power levels of respective reflected lights over a time period. | 11-28-2013 |
Cheng Ta Li, Nantou County TW
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20150333404 | NFC ANTENNA - The disclosure illustrates a NFC antenna. The NFC antenna includes a first radiating portion and a second radiating portion. The first radiating portion is formed by a first conducting wire surrounding an axis core. The second radiating portion is formed by a second conducting wire surrounding the same axis core based on a surrounding direction which the first radiating portion surrounds the axis core. A second signal input terminal of the second radiating portion is electrically connected to a first signal input terminal of the first radiating portion. An open end of the second radiating portion is disposed proximately to a first signal output terminal. Thus, the NFC antenna can reduce the interferences affected from surrounding metal elements, and improve a quality factor of the NFC antenna. | 11-19-2015 |
Cheng Ta Lin, Taipei TW
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20130304280 | VEHICLE CONTROL AND DISPLAY SYSTEM - A vehicle control and display system to control the vehicle systems and display vehicle information. A control processing unit communicates with remote units and the vehicle systems wherein when the control processing unit receives commands from the remote units, the control processing unit transfers these commands to the vehicle systems. The vehicle information is displayed on the control processing unit or on the remote units. The control processing unit receives vehicle information from the vehicle systems and transfers that information to remote units to be displayed. | 11-14-2013 |
Cheng-Ta Chen, Tainan City TW
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20150060401 | METHOD OF EDGE COATING A BATCH OF GLASS ARTICLES - A method of edge coating a batch of glass articles includes printing masks on surfaces of a glass sheet, where at least one of the masks is a patterned mask defining a network of separation paths. The glass sheet with the printed masks is divided into multiple glass articles along the separation paths. For at least a batch of the glass articles, the edges of the glass articles in the batch are finished to reduce roughness at the edges. Each finished edge is then etched with an etching medium to reduce and/or blunt flaws in the finished edge. A curable coating is simultaneously applied to the etched edges. The curable coatings are pre-cured. Then, the printed masks are removed from the glass articles with the curable coatings. After removing the printed masks, the pre-cured curable coatings are post-cured. | 03-05-2015 |
Cheng-Ta Chen, Taichung City TW
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20130258474 | OPTOELECTRONIC DEVICE WITH IMPROVED LENS CAP - An optoelectronic device includes a base part and a lens cap. The base part has an optoelectronic chip mounted thereon. The lens cap is mounted over the optoelectronic chip and includes a metallic hollow cylindrical part and a plastic inner cylindrical part. The hollow cylindrical part has an opening on a top thereof. The inner cylindrical part is firmly coupled within the hollow cylindrical part, and the inner cylindrical part has a lens part located within the opening and at least three aligning members in contact with an upper circumference of the base part so as to align the lens part with the optoelectronic chip. | 10-03-2013 |
20150314322 | METHOD OF APPLYING A PROTECTIVE COATING TO SUBSTRATE EDGES - A method of applying a protective coating to a substrate includes applying a surface treatment to edges of the substrate to increase surface wettability of the edges and/or preheating the substrate. A curable coating material is applied to the edges. Then, the substrate is spun to adjust a thickness and uniformity of the curable coating material applied on the substrate edges. The curable coating material is cured to form the protective coating on the substrate edges. | 11-05-2015 |
Cheng-Ta Chiang, Banqiao City TW
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20110116725 | DATA COMPRESSION METHOD AND DATA COMPRESSION SYSTEM - A data compression system and a data compression method using the same are provided. The data compression method includes acquiring original data from a memory and performs image processing and quantization on the original data to transform the original data into a quantization matrix. The data compression method then transforms the quantization matrix into a digital sequence based on a coding table and compares the data volume of the digital sequence and a target volume to generate a volume difference. The data compression method transforms the digital sequence into an inverse quantization matrix based on the volume difference and then transforms the inverse quantization matrix into a modified digital sequence based on the volume difference. The data compression method repeats the processes until the data volume of the digital sequence is substantially equal to a target volume or within an acceptable range of the target volume. | 05-19-2011 |
Cheng-Ta Chung, Huwei Township TW
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20150360553 | ELECTRIC POWER SPLIT HYBRID SYSTEM - An electric power split hybrid system comprises a case, a linkage unit, an electric power part, and a switching part. An engine, a generator, a motor, and a transmission mechanism are installed in the case. The generator is used to start the engine, and is capable of adjusting a torque of the engine and of generating electricity via driving of the engine. The transmission mechanism is used to link and move a wheel to rotate. The linkage unit is used to link and move the engine and the motor. The electric power part is used to store electrical energy generated by the generator and to supply electric power to the motor. The switching part is connected to the generator, the motor, and the electric power part. Electric power generated by the generator is switched by the switching part to supply to one of the motor and the electric power part. | 12-17-2015 |
Cheng-Ta Hu, New Taipei TW
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20130308247 | METHOD AND APPARATUS FOR TESTING CIRCUIT BOARD - An exemplary apparatus for measuring characteristics of a circuit board includes an embedded controller, a first resistor, and a second resistor. The embedded controller includes an A/D (analog to digital) conversion terminal. The A/D conversion terminal receives a DC (direct current) voltage via the first resistor. The A/D conversion terminal is grounded via the second resistor. Resistances of the first resistor and the second resistor indicate different characteristics of the circuit board. The A/D conversion terminal detects a voltage value of a connection point between the first resistor and the second resistor. The embedded controller analyzes characteristics of the circuit board according to the voltage value. | 11-21-2013 |
20130311120 | BATTERY VOLTAGE DETECTION METHOD AND APPARATUS - An exemplary apparatus for detecting a voltage of a battery on a motherboard includes an embedded controller, a first resistor, and a second resistor. The embedded controller includes an analog to digital (A/D) conversion terminal The A/D conversion terminal is electrically connected to a voltage output terminal of the battery via the first resistor. The A/D conversion terminal is grounded via the second resistor. The A/D conversion terminal detects a voltage value of a connection point between the first resistor and the second resistor. The embedded controller calculates the potential of the battery to determine whether the battery is installed on the motherboard according to the voltage value. | 11-21-2013 |
Cheng-Ta Huang, Taoyuan County TW
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20150085209 | TOUCH DISPLAY DEVICE - A touch display device includes an LCD panel, a flexible sensor film disposed on the LCD panel, a cover lens disposed on the flexible sensor film, a first adhesive layer between the flexible sensor film and the LCD panel, a second adhesive layer between the flexible sensor film and the cover lens, and a system mechanism part enclosing the above-described components. | 03-26-2015 |
Cheng-Ta Ko, Chu-Tung TW
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20090008792 | Three-dimensional chip-stack package and active component on a substrate - The 3D chip-stack package comprises a component-embedded plate and a side IC. The PCB has a plurality of conductive contacts. The component-embedded plate comprises a dielectric layer; an active component embedded in the dielectric layer, one surface of each active component exposed outside the dielectric layer, the active components having a plurality of TSVs (Through Silicon Via), one ends of the TSVs exposed outside the exposed surface, the other ends of the TSVs corresponding to the conductive contacts of the PCB; and an electrical circuit on the dielectric layer and in electrical connection between the other ends of the TSVs of the active component and the corresponding conductive contacts of the PCB, respectively. The side IC has a plurality of pads. The pads are electrically connected with the exposed ends of the TSVs of the active component. | 01-08-2009 |
Cheng-Ta Lee, Taipei TW
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20140068771 | Transforming User-Input Data in Scripting Language - A mechanism for preventing injection attacks of scripting languages is provided. There is a mechanism of transforming user-input data in a scripting language included. The mechanism comprises a step of tracing a script instruction to separate instruction related variables and user-input related, variables; and a step of encoding the user-input related variables into data belonging to safe-character-set area which do not include reserved character, and passing the encoded user-input related variables to a statement of the script instruction. | 03-06-2014 |
20150067402 | PROVIDING A REMOTE DIAGNOSIS FOR AN INFORMATION APPLIANCE VIA A SECURE CONNECTION - A processor-implemented method provides a remote diagnosis for an information appliance via a secure connection. A command is received from a console, and an examination is performed to determine whether or not the command is permitted to be issued. In response to a remote diagnostic module being initiated, a determination is made as to whether a secure connection to a remote information appliance has been created. In response to determining that the secure connection to the remote information appliance has been created, the command is transmitted to the remote information appliance via the secure connection. | 03-05-2015 |
Cheng-Ta Lee, Nantou City TW
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20090256764 | Antenna device having an adjustable frequency - An antenna device includes an antenna and a transmission element. The antenna includes a grounding element and a radiating element. The radiating element is connected to the grounding element and is provided with a plurality of spaced apart feeding portions. The transmission element is connected selectively to one of said feeding portions. When the transmission element is connected to one of the feeding portions, the radiating element operates in a distinct frequency. | 10-15-2009 |
Cheng-Ta Lee, Taipei City TW
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20130007136 | COLLABORATING WITH RESOURCES RESIDING IN MULTIPLE INFORMATION DEVICES - An appliance, user information device, method, and computer program product for collaborating with resources residing in multiple information devices. The user information device may communicate with the appliance, and the appliance may further communicate with a first assisting device, wherein the first assisting device has access to a first resource capable of performing a first operation. The user information device includes a device communication interface, a processor configured to execute at least one application, the at least one application configured to generate a first command associated with the first operation via the processor, and a resource agent program executable by the processor, the resource agent program configured to send the first command to the appliance via the device communication interface, the first command operable for enabling performance of the first operation using the first resource when the appliance sends the first command to the first assisting device. | 01-03-2013 |
20140310389 | Automatically constructing protection scope in a virtual infrastructure - An automated technique for constructing and updating protection scope is described. Preferably, the protection scope is MAC-address based. According to this technique, one or more packet processing units (PPUs) execute a MAC address learning algorithm to gather a list of MAC addresses. Packet processing units typically are one of: a kernel module residing on the hypervisor, a virtual appliance running a packet processing engine, and a software agent running on a virtual machine and that processes packet flows between and among associated virtual machines. Each of the one or more PPUs is provisioned to collect a set of MAC addresses; the PPUs exchange their lists, and the lists are then merged into a merged list from which a current protection scope is then generated. Each entry in the protection scope preferably contains information indicating which PPU is available to protect the MAC address associated with that entry. | 10-16-2014 |
20140310796 | Multiple inspection avoidance (MIA) using a protection scope - A multiple inspection avoidance (MIA) technique is implemented in a virtualized environment. Preferably, the technique is implemented in a packet processing unit (PPU) and takes advantage of a protection scope determined in an automated manner. The protection scope may be MAC-based. The MIA technique ensures that the same packet is not inspected more than once by a same packet processing unit (PPU), and that the same packet is not inspected more than once by different PPUs. According to this disclosure, when a PPU implementing MIA receives a packet, it uses the protection scope to determine whether it needs to process the packet. Preferably, the determination of whether to process the packet depends on the source and destination addresses in the packet, whether those addresses are being protected by the PPU that receives the packet, the direction of the packet flow, and optionally one or more packet processing rules. | 10-16-2014 |
20150350079 | METHOD OF MESSAGE ROUTING FOR A DISTRIBUTED COMPUTING SYSTEM - Message routing is implemented by a computer device. A global ring is connected via a network, wherein the global ring is associated with a distributed hash table (DHT) and includes a plurality of nodes which are divided exclusively into groups in advance. A first group of nodes is determined from the plurality of grouped nodes. Using the DHT for a message to be routed, a first node is located from the first group of nodes, as a routing destination. | 12-03-2015 |
Cheng-Ta Li, Nantou City TW
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20140098002 | ANTENNA MODULE - An antenna module includes a printed circuit board, multiple conductive clamps bonded to the printed circuit board, each conductive clamp having elastic clamping arms at two opposite lateral sides thereof, and an antenna inserted in between the clamping arms of each conductive clamp and secured and electrically conducted to the printed circuit board by the conductive clamps for signal feed-in and grounding. | 04-10-2014 |
20150295623 | HANDHELD DEVICE HAVING MULTIPLE NFC READING DIRECTIONS - A handheld device includes at least two NFC antennas provided with different RF transmission directions. The at least two NFC antennas are separated from each other and share one communication unit. In light of this, the handheld device exchange data with an external NFC device through the at least two NFC antennas to have more effective inductive coupling directions. | 10-15-2015 |
Cheng-Ta Parng, Taichung City TW
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20090080392 | Communication terminal device and communication transmission method - A communication terminal device is provided. The communication device includes a control unit, a WLAN module, a WMAN module and a VoIP module. The control unit provides a drive module for driving the WLAN module, the WMAN module and the VoIP module, and provides a real-time kernel module for achieving quality performance of the communication terminal device. | 03-26-2009 |
Cheng-Ta Tsai, Taipei TW
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20100069801 | ROWING MASSAGE MACHINE - The rowing massage machine has a base frame, a footrest, a rowing mechanism and a massage device. The base frame has a base. The footrest is mounted on a front end of the base. The rowing mechanism is mounted on the base and has a chair and at least one rowing resilient element. The chair has a seat and a backrest having longitudinal slits. The rowing resilient element is mounted between the footrest and the rowing mechanism. The massage device has four body massaging wheels and at least one massaging resilient element. The massaging rolling wheels are rotatably mounted on rods connected to the base and are respectively mounted through the slits of the chair. The massaging resilient element is mounted between the rowing mechanism and the massage device. When an operator sits on the chair to exercise, he/her receives a foot, back and upper leg massage. | 03-18-2010 |
Cheng-Ta Wu, Chiayi County TW
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20150056739 | IMAGE SENSOR TRENCH ISOLATION WITH CONFORMAL DOPING - Provided is a semiconductor image sensor device. The image sensor device includes a substrate. The image sensor device includes a first pixel and a second pixel disposed in the substrate. The first and second pixels are neighboring pixels. The image sensor device includes an isolation structure disposed in the substrate and between the first and second pixels. The image sensor device includes a doped isolation device disposed in the substrate and between the first and second pixels. The doped isolation device surrounds the isolation structure in a conformal manner. | 02-26-2015 |
20150060964 | MECHANISMS FOR FORMING IMAGE SENSOR DEVICE - Embodiments of mechanisms for forming an image sensor device are provided. The image sensor device includes a semiconductor substrate and one photodetector formed in the semiconductor substrate. The image sensor device also includes one gate stack formed over the semiconductor substrate. The gate stack includes multiple polysilicon layers. | 03-05-2015 |
20150243537 | MECHANISMS FOR CLEANING SUBSTRATE SURFACE FOR HYBRID BONDING - The mechanisms for cleaning a surface of a semiconductor wafer for a hybrid bonding are provided. The method for cleaning a surface of a semiconductor wafer for a hybrid bonding includes providing a semiconductor wafer, and the semiconductor wafer has a conductive pad embedded in an insulating layer. The method also includes performing a plasma process to a surface of the semiconductor wafer, and metal oxide is formed on a surface of the conductive structure. The method further includes performing a cleaning process using a cleaning solution to perform a reduction reaction with the metal oxide, such that metal-hydrogen bonds are formed on the surface of the conductive structure. The method further includes transferring the semiconductor wafer to a bonding chamber under vacuum for hybrid bonding. The mechanisms for a hybrid bonding and a integrated system are also provided. | 08-27-2015 |
20150279894 | CMOS Image Sensor with Epitaxial Passivation Layer - The present disclosure provides a complimentary metal-oxide-semiconductor (CMOS) image sensor (CIS) device. In accordance with some embodiments, the device includes a semiconductor region having a front surface and a back surface; a light-sensing region extending from the front surface towards the back surface within the semiconductor region; a gate stack formed over the semiconductor region; and at least one epitaxial passivation layer disposed at least one of over and below the light-sensing region. In some embodiments, the at least one epitaxial passivation layer includes a p-type doped silicon (Si) layer. | 10-01-2015 |
20150303265 | SEMICONDUCTOR DEVICE WITH TRENCH ISOLATION - A semiconductor device includes a semiconductor substrate and a trench isolation. The trench isolation is located in the semiconductor substrate, and includes an epitaxial layer and a dielectric material. The epitaxial layer is in a trench of the semiconductor and is peripherally enclosed thereby, in which the epitaxial layer is formed by performing etch and epitaxy processes. The etch and epitaxy process includes etching out a portion of a sidewall of the trench and a portion of a bottom surface of the trench and forming the epitaxial layer conformal to the remaining portion of the sidewall and the remaining portion of the bottom surface. The dielectric material is peripherally enclosed by the epitaxial layer. | 10-22-2015 |
Cheng-Ta Wu, Shueishang Township TW
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20100136791 | Method of Reducing Delamination in the Fabrication of Small-Pitch Devices - A method of forming an integrated circuit structure includes providing a substrate; forming a first hard mask layer over the substrate; forming a second hard mask layer over the first hard mask layer; patterning the second hard mask layer to form a hard mask; and, after the step of patterning the second hard mask layer, baking the substrate, the first hard mask layer, and the hard mask. After the step of baking, a spacer layer is formed, which includes a first portion on a top of the hard mask, and a second portion and a third portion on opposite sidewalls of the hard mask. The method further includes removing the first portion of the spacer layer; removing the hard mask; and using the second portion and the third portion of the spacer layer as masks to pattern the first hard mask layer. | 06-03-2010 |
20100270604 | Non-Volatile Memories and Methods of Fabrication Thereof - Non-volatile memories and methods of fabrication thereof are described. In one embodiment, a method of fabricating a semiconductor device includes forming an oxide layer over a semiconductor substrate, and exposing the oxide layer to a first nitridation step to form a first nitrogen rich region. The first nitrogen rich region is disposed adjacent an interface between the oxide layer and the semiconductor substrate. After the first nitridation step, the oxide layer is exposed to a second nitridation step to form a second nitrogen rich region. A first gate electrode is formed on the oxide layer, wherein the second nitrogen rich region is disposed adjacent an interface between the oxide layer and the first gate electrode. | 10-28-2010 |
20120028473 | Method of Reducing Delamination in the Fabrication of Small-Pitch Devices - A method of forming an integrated circuit structure includes providing a substrate; forming a first hard mask layer over the substrate; forming a second hard mask layer over the first hard mask layer; patterning the second hard mask layer to form a hard mask; and, after the step of patterning the second hard mask layer, baking the substrate, the first hard mask layer, and the hard mask. After the step of baking, a spacer layer is formed, which includes a first portion on a top of the hard mask, and a second portion and a third portion on opposite sidewalls of the hard mask. The method further includes removing the first portion of the spacer layer; removing the hard mask; and using the second portion and the third portion of the spacer layer as masks to pattern the first hard mask layer. | 02-02-2012 |
20130040446 | Backside Surface Treatment of Semiconductor Chips - A method includes performing a grinding to a backside of a semiconductor substrate, wherein a remaining portion of the semiconductor substrate has a back surface. A treatment is then performed on the back surface using a method selected from the group consisting essentially of a dry treatment and a plasma treatment. Process gases that are used in the treatment include oxygen (O | 02-14-2013 |
20130113061 | IMAGE SENSOR TRENCH ISOLATION WITH CONFORMAL DOPING - Provided is a semiconductor image sensor device. The image sensor device includes a substrate. The image sensor device includes a first pixel and a second pixel disposed in the substrate. The first and second pixels are neighboring pixels. The image sensor device includes an isolation structure disposed in the substrate and between the first and second pixels. The image sensor device includes a doped isolation device disposed in the substrate and between the first and second pixels. The doped isolation device surrounds the isolation structure in a conformal manner. | 05-09-2013 |
20130210188 | Method and Apparatus for Reducing Stripe Patterns - A method for reducing stripe patterns comprising receiving scattered light signals from a backside surface of a laser annealed backside illuminated image sensor wafer, generating a backside surface image based upon the scattered light signals, determining a distance between an edge of a sensor array of the laser anneal backside illuminated image sensor wafer and an adjacent boundary of a laser beam and re-calibrating the laser beam if the distance is less than a predetermined value. | 08-15-2013 |
20130270663 | ANTI-REFLECTIVE LAYER FOR BACKSIDE ILLUMINATED CMOS IMAGE SENSORS - A method of forming an image sensor device includes forming a light sensing region at a front surface of a silicon substrate and a patterned metal layer there over. Thereafter, the method includes depositing a metal oxide anti-reflection laminate on the first surface of the substrate. The metal oxide anti-reflection laminate includes one or more composite layers of thin metal oxides stacked over the photodiode. Each composite layer includes two or more metal oxide layers: one metal oxide is a high energy band gap metal oxide and another metal oxide is a high refractive index metal oxide. | 10-17-2013 |
20130285130 | BACKSIDE ILLUMINATED IMAGE SENSOR WITH NEGATIVELY CHARGED LAYER - A semiconductor image sensor device having a negatively-charged layer includes a semiconductor substrate having a p-type region, a plurality of radiation-sensing regions in the p-type region proximate a front side of the semiconductor substrate, and a negatively-charged layer adjoining the p-type region proximate the plurality of radiation-sensing regions. The negatively-charged layer may be an oxygen-rich silicon oxide, a high-k metal oxide, or a silicon nitride formed as a liner in a shallow trench isolation feature, a sidewall spacer or an offset spacer of a transistor gate, a salicide-block layer, a buffer layer under a salicide-block layer, a backside surface layer, or a combination of these. | 10-31-2013 |
20130307045 | Non-Volatile Memories and Methods of Fabrication Thereof - Non-volatile memories and methods of fabrication thereof are described. In one embodiment, a method of fabricating a semiconductor device includes forming an oxide layer over a semiconductor substrate, and exposing the oxide layer to a first nitridation step to form a first nitrogen rich region. The first nitrogen rich region is disposed adjacent an interface between the oxide layer and the semiconductor substrate. After the first nitridation step, the oxide layer is exposed to a second nitridation step to form a second nitrogen rich region. A first gate electrode is formed on the oxide layer, wherein the second nitrogen rich region is disposed adjacent an interface between the oxide layer and the first gate electrode. | 11-21-2013 |
20130327921 | IMAGE DEVICE AND METHODS OF FORMING THE SAME - A method of forming of an image sensor device includes a substrate having a pixel region and a periphery region. A plurality of first trenches is etched in the periphery region. Each of the first trenches has a depth D | 12-12-2013 |
20130329102 | IMAGE SENSOR HAVING COMPRESSIVE LAYERS - An image sensor device including a semiconductor substrate that includes an array region and a black level correction region. The array region contains a plurality of radiation-sensitive pixels. The black level correction region contains one or more reference pixels. The substrate has a front side and a back side. The image sensor device includes a first compressively-stressed layer formed on the back side of the substrate. The first compressively-stressed layer contains silicon oxide, and is negatively charged. The second compressively-stressed layer contains silicon nitride, and is negatively charged. A metal shield is formed over at least a portion of the black level correction region. The image sensor device includes a third compressively-stressed layer formed on the metal shield and the second compressively-stressed layer. The third compressively-stressed layer contains silicon oxide. A sidewall of the metal shield is protected by the third compressively-stressed layer. | 12-12-2013 |
20140061738 | Method to Form a CMOS Image Sensor - The present disclosure relates to a method and composition to limit crystalline defects introduced in a semiconductor device during ion implantation. A high-temperature low dosage implant is performed utilizing a tri-layer photoresist which maintains the crystalline structure of the semiconductor device while limiting defect formation within the semiconductor device. The tri-layer photoresist comprises a layer of spin-on carbon deposited onto a substrate, a layer of silicon containing hard-mask formed above the layer of spin-on carbon, and a layer of photoresist formed above the layer of silicon containing hard-mask. A pattern formed in the layer of photoresist is sequentially transferred to the silicon containing hard-mask, then to the spin-on carbon, and defines an area of the substrate to be selectively implanted with ions. | 03-06-2014 |
20140264493 | Semiconductor Device and Fabricating the Same - A semiconductor device includes a substrate, a gate stack having at least one gate vertex directed to an area in the substrate below the gate stack. The semiconductor device also includes a source structure having at least one vertex directed toward the area in the substrate and a drain structure having at least one vertex directed toward the area in the substrate. | 09-18-2014 |
20150031189 | MECHANISMS FOR CLEANING SUBSTRATE SURFACE FOR HYBRID BONDING - Embodiments of mechanisms for cleaning a surface of a semiconductor wafer for a hybrid bonding are provided. The method for cleaning a surface of a semiconductor wafer for a hybrid bonding includes providing a semiconductor wafer, and the semiconductor wafer has a conductive pad embedded in an insulating layer. The method also includes performing a plasma process to a surface of the semiconductor wafer, and metal oxide is formed on a surface of the conductive structure. The method further includes performing a cleaning process using a cleaning solution to perform a reduction reaction with the metal oxide, such that metal-hydrogen bonds are formed on the surface of the conductive structure. The method further includes transferring the semiconductor wafer to a bonding chamber under vacuum for hybrid bonding. Embodiments of mechanisms for a hybrid bonding and a integrated system are also provided. | 01-29-2015 |
20150041761 | Backside Illuminated Photo-Sensitive Device with Gradated Buffer Layer - A method for forming a backside illuminated photo-sensitive device includes forming a gradated sacrificial buffer layer onto a sacrificial substrate, forming a uniform layer onto the gradated sacrificial buffer layer, forming a second gradated buffer layer onto the uniform layer, forming a silicon layer onto the second gradated buffer layer, bonding a device layer to the silicon layer, and removing the gradated sacrificial buffer layer and the sacrificial substrate. | 02-12-2015 |
20150115397 | SEMICONDUCTOR DEVICE WITH TRENCH ISOLATION - A semiconductor device includes a semiconductor substrate and a trench isolation. The trench isolation is located in the semiconductor substrate, and includes an epitaxial layer and a dielectric material. The epitaxial layer is in a trench of the semiconductor and is peripherally enclosed thereby, in which the epitaxial layer is formed by performing etch and epitaxy processes. The etch and epitaxy process includes etching out a portion of a sidewall of the trench and a portion of a bottom surface of the trench and forming the epitaxial layer conformal to the remaining portion of the sidewall and the remaining portion of the bottom surface. The dielectric material is peripherally enclosed by the epitaxial layer. | 04-30-2015 |
20150214267 | Semiconductor Devices, Image Sensors, and Methods of Manufacture Thereof - Semiconductor devices, image sensors, and methods of manufacture thereof are disclosed. In some embodiments, a semiconductor device includes a high dielectric constant (k) insulating material disposed over a workpiece, the high k insulating material having a dielectric constant of greater than about 3.9. A barrier layer is disposed over the high k insulating material. A buffer oxide layer including a porous oxide film is disposed between the high k insulating material and the barrier layer. The porous oxide film has a first porosity, and the barrier layer or the high k insulating material has a second porosity. The first porosity is greater than the second porosity. | 07-30-2015 |
20150243763 | PERFORMANCE BOOST BY SILICON EPITAXY - The present disclosure relates to a method of generating a transistor device having an epitaxial layer disposed over a recessed active region. The epitaxial layer improves transistor device performance. In some embodiments, the method is performed by providing a semiconductor substrate. An epitaxial growth is performed to form an epitaxial layer onto the semiconductor substrate. An electrically insulating layer is then formed onto the epitaxial layer, and a gate structure is formed onto the electrically insulating layer. By forming the epitaxial layer over the semiconductor substrate the surface roughness of the semiconductor substrate is improved, thereby improving transistor device performance. | 08-27-2015 |
20150263055 | SEMICONDUCTOR DEVICE WITH COMPRESSIVE LAYERS - A semiconductor device includes a substrate having a first side and a second side opposite the first side. The substrate has a sensor region proximate the first side. The semiconductor device also includes a first compressive layer over the second side of the substrate. The semiconductor device further includes a light blocking element over the first compressive layer. The semiconductor device additionally includes a second compressive layer over the first compressive layer and covering a portion of the light blocking element. The semiconductor device also includes a third compressive layer between the second compressive layer and the portion of the light blocking element. | 09-17-2015 |
20150263123 | COMMON SOURCE OXIDE FORMATION BY IN-SITU STEAM OXIDATION FOR EMBEDDED FLASH - The present disclosure relates to an embedded flash memory cell having a common source oxide layer with a substantially flat top surface, disposed between a common source region and a common erase gate, and a method of formation. In some embodiments, the embedded flash memory cell has a semiconductor substrate with a common source region separated from a first drain region by a first channel region and separated from a second drain region by a second channel region. A high-quality common source oxide layer is formed by an in-situ steam generation (ISSG) process at a location overlying the common source region. First and second floating gate are disposed over the first and second channel regions on opposing sides of a common erase gate having a substantially flat bottom surface abutting a substantially flat top surface of the common source oxide layer. | 09-17-2015 |
20150349160 | Backside Illuminated Photo-Sensitive Device With Gradated Buffer Layer - A photo-sensitive device includes a uniform layer, a gradated buffer layer over the uniform layer, a silicon layer over the gradated buffer layer, a photo-sensitive light-sensing region in the uniform layer and the silicon layer, a device layer on the silicon layer, and a carrier wafer bonded to the device layer. | 12-03-2015 |
20150352665 | Method and Apparatus for Reducing Stripe Patterns - An apparatus comprises an optical detector configured to receive scattered light signals from a surface of a wafer including a plurality of sensor arrays, each of which has a boundary smaller than a boundary of a laser beam, a light source optically coupled to the surface of the wafer, wherein light from the light source hits the surface with a small incident angle and a processor configured to measure a distance between a sensor array boundary and a laser beam boundary, wherein a laser annealing process is recalibrated if the distance is less than a predetermined value. | 12-10-2015 |
Cheng-Ta Yang, Taipei City TW
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20110020781 | On-Line Interactive Learning and Managing System - An on-line interactive learning and managing system is disclosed. The system comprises a server for a plurality of users login via the Internet. The plurality of users are allotted to form at least one learning group. The system may form correspondingly an operating interface according to each learning group for executing real-time interactive teaching between the plurality of users. The system further forms a managing interface for managing each learning group or each user's state by an administrator. The administrator uses the managing interface and each operating interface to communicate with each learning group or each user. | 01-27-2011 |
Cheng-Ta Yu, I-Lan TW
Patent application number | Description | Published |
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20080303499 | CONTROL CIRCUIT AND METHOD FOR MULTI-MODE BUCK-BOOST SWITCHING REGULATOR - A control circuit of a multi-mode buck-boost switching regulator and a method thereof are provided. The control circuit imposes ON/OFF timing sequences on switches according to the relationship between two controlling triangle waves and the load fluctuation. In each working cycle of each mode of the regulator, at most two switches perform switching operations. The control circuit is simple to design, which only includes simple digital elements, such as comparators, logic gates etc., instead of complicated analog circuits. | 12-11-2008 |