Patent application number | Description | Published |
20100128792 | VIDEO DECODING METHOD - A method of decoding videos comprises the steps of performing, in respect of a decoding objective area of decoding objective frame, a motion search by using images of plural frames finished with decoding and deciding, on the basis of the result of the motion search, whether an image of the decoding objective area is to be generated through an interpolation process or a decoded image is to be generated through motion compensation using data included in an encoding stream. | 05-27-2010 |
20120236183 | IMAGE TRANSFER SYSTEM, IMAGE TRANSFER METHOD, IMAGE RECEPTION APPARATUS, IMAGE TRANSMISSION APPARATUS, AND IMAGE PICKUP APPARATUS - In order to transfer an image encoded at a high compression rate and suitably increase the resolution of the transferred image, it is provided an image transfer system, comprising: an image transmission unit that transmits an image; and an image reception unit that receives the image transmitted from the image transmission unit. The image transmission unit scales down the image, and transmits the scaled-down image to the image reception unit. The image reception unit calculates an angle between a line displayed in the image transmitted from the image transmission unit and a horizontal direction of the image in correspondence with pixels included in the image, scales up the image transmitted from the image transmission unit, and removes an aliasing component of the scaled-up image based on the calculated angle. | 09-20-2012 |
20120301012 | IMAGE SIGNAL PROCESSING DEVICE AND IMAGE SIGNAL PROCESSING METHOD - When super-resolution processing is applied to an entire screen image at the same intensity, a blur contained in an input image is uniformly reduced over the entire screen image. Therefore, the screen image may be seen differently from when it is naturally seen. As one of methods for addressing the problem, there is such a method that: when a first image for a left eye and a second image for a right eye are inputted, each of parameters concerning image-quality correction is determined based on a magnitude of a positional deviation between associated pixels in the first image and second image respectively; and the parameters are used to perform image-quality correction processing for adjusting a sense of depth of an image. | 11-29-2012 |
Patent application number | Description | Published |
20110159870 | WIRELESS BASE STATION APPARATUS, WIRELESS COMMUNICATION METHOD IN THE WIRELESS BASE STATION APPARATUS, AND WIRELESS COMMUNICATION SYSTEM - A wireless base station apparatus performing wireless communication with a mobile station apparatus includes: a transmission unit to transmit data to the mobile station apparatus; a reception unit to receive a delivery result for the data from the mobile station apparatus; and a control unit to determine whether reception processing through a first channel is performed or parallel reception processing through the first channel and a second channel is performed on the basis of a radio line quality between the wireless base station apparatus and the mobile station apparatus or an amount of processing in the reception unit if the transmission unit transmits a permission notification permitting the transmission through the first channel to the mobile station apparatus, where the reception unit performs the reception processing in accordance with the result of the determination to receive the delivery result transmitted through the first channel or the second channel. | 06-30-2011 |
20120064931 | RADIO BASE STATION AND COMMUNICATION METHOD - A radio base station includes: an acquiring unit which acquires a pilot signal that is discretely included in a transmission signal to be transmitted from a mobile terminal and is referenced to adjust a transmission timing of the transmission signal in the mobile terminal; an adjusting unit which adjusts the transmission timing of the transmission signal in the mobile terminal based on the pilot signal; and a changing unit which changes an adjustment period in which the transmission timing is adjusted by the adjusting unit based on a transmission cycle of the pilot signal. | 03-15-2012 |
20140135026 | BASE STATION AND ANTENNA TILT ANGLE CONTROL METHOD - A base station includes an antenna, a sending unit, a monitoring unit, and a controlling unit. The antenna is configured to be operated corresponding to a communication area of the base station, the antenna being capable of controlling a tilt angle, the tilt angle being an angle made by a vertical direction and a direction of a main beam of the antenna. The sending unit is configured to send a command corresponding to adjustment of timing of sending a signal sent from a mobile station. The monitoring unit is configured to monitor the number of mobile stations present in the communication area by using the command. The controlling unit is configured to reduce the tilt angle when the number of mobile stations exceeds an upper limit allowed to be contained in the communication area. | 05-15-2014 |
20150080045 | BASE STATION, WIRELESS COMMUNICATION SYSTEM, AND WIRELESS COMMUNICATION METHOD - A base station including: a receiver configured to receive a random access signal wirelessly transmitted from a terminal, a transmitter configured to wirelessly transmit a response signal in response to the random access signal, and a processer configured to limit a transmission of the response signal based on a timing difference between a reference timing and a reception timing when the random access signal has been received. | 03-19-2015 |
20150131606 | RADIO BASE STATION AND RADIO COMMUNICATION SYSTEM - An allocation of radio resources in one of first and second radio areas in which a fading frequency estimated value with a relatively low estimation accuracy is obtained is controlled based on a fading frequency estimated value with a relatively high estimation accuracy among the fading frequency estimated values obtained from a radio signal sent by the radio terminal and received in the first and second radio areas. | 05-14-2015 |
20150139200 | BASE STATION, WIRELESS COMMUNICATION SYSTEM, AND METHOD FOR CONTROLLING ALLOCATION OF WIRELESS RESOURCE - A base station provides a first wireless area to communicate with a wireless terminal using a wireless resource. The base station includes a controller that, when controlling allocation of a first wireless resource to be used for data communication between the base station and the wireless terminal in the first wireless area, refers to allocation information representing allocation of a second wireless resource to be used for communication of a preamble of random access in a second wireless area. | 05-21-2015 |
20160100393 | BASE STATION DEVICE, WIRELESS COMMUNICATION SYSTEM, AND BASE STATION DEVICE CONTROL METHOD - A P cell communication unit and an S cell communication unit establish communication with a mobile station using a plurality of radio resources of a first cell and a second cell overlapping the first cell. A moving speed measuring unit measures a moving speed of the mobile station based on a signal transmitted from the mobile station using the radio resources of the first cell. A scheduling processing unit stops an allocation of the radio resources of the second cell to the mobile station based on a wireless environment with the mobile station. The scheduling processing unit starts an allocation of the radio resources of the second cell to the mobile station when the moving speed of the mobile station is less than a certain value in a state in which the allocation of the radio resources of the second cell is stopped. | 04-07-2016 |
Patent application number | Description | Published |
20080209286 | LOGIC CIRCUITRY AND RECORDING MEDIUM - Logic circuitry has a test point to detect a signal about a delay fault propagating on a logic path between an input terminal and an output terminal, the test point being coupled to the logic path, wherein the test point includes a delay component to delay timing to detect the signal about a delay fault propagating on the logic path by predetermined time. | 08-28-2008 |
20090273383 | Logic circuit having gated clock buffer - A logic circuit includes a gated clock buffer including a control node, being set in either a first state or a second state in response to an input signal applied to the control node, outputting an input clock signal supplied as an output signal in the first state, and fixing an output signal to a constant value in the second state, a plurality of scan flip-flops receiving the output signal of the gated clock buffer, and included in at least part of a scan chain, and a combinational logic circuit coupled to at least one of the plurality of scan flip-flops. | 11-05-2009 |
20140184298 | ELECTRIC CIRCUIT AND SEMICONDUCTOR DEVICE - An electric circuit includes a delayed clock generation circuit to which a first clock is supplied and which is configured to generate a first delayed clock and a second delayed clock, the first delayed clock being the first clock delayed by a first delay amount, and the second delayed clock being the first clock delayed by a second delay amount different from the first delay amount, an OR gate configured to receive the first clock, the first delayed clock, and the second delayed clock as inputs and to output a second clock, and a scan circuit to which the second clock is supplied. | 07-03-2014 |
20140298279 | CIRCUIT DESIGN SUPPORT METHOD, COMPUTER PRODUCT, AND CIRCUIT DESIGN SUPPORT APPARATUS - A circuit design support method includes obtaining shared circuit information indicating various types of shared circuits each executing at least any one of various types of logical computations and causing plural signal lines to share an observation point at which a signal value is observable; determining for each of the signal lines to be observed in a circuit under-design, a value based on controllability representing ease of control to set a value of the signal line to be a specific value; selecting based on the obtained shared circuit information, any one shared circuit among the various types of shared circuits; and generating correlation information that correlates each input terminal of the selected shared circuit with a signal line among the signal lines to be observed and whose value determined therefor is equal to a non-controlling value of a logical computation executed for an input signal input into the input terminal. | 10-02-2014 |
Patent application number | Description | Published |
20110068847 | EQUALIZER CIRCUIT AND RECEPTION APPARATUS - An equalizer circuit includes: a plurality of amplifiers that convert a voltage signal into a current; a plurality of capacitive loads that are charged and discharged in accordance with respective outputs of the plurality of amplifiers; a charge discharge circuit provided for each of the plurality of capacitive loads to charge or discharge one of the plurality of capacitive loads; and a reset circuit provided for each of the capacitive loads to initialize the charge stored in the one of the plurality of capacitive loads, wherein a current according to the voltage signal is integrated in different periods for each of the plurality of capacitive loads and the capacitive load is discharged through the current in a first period and the capacitive load is charged through the current in a second period following the first period. | 03-24-2011 |
20140174387 | PHASE ADJUSTMENT CIRCUIT AND INTERFACE CIRCUIT - In a phase adjustment circuit, a first phase adjuster has a plurality of parallel-connected first inverters that receives an input signal to be phase-adjusted, wherein a first inverter to be activated is selected by a first control signal. A second phase adjuster has a plurality of parallel-connected second inverters that receives the input signal with a predetermined delay time, wherein a second inverter to be activated is selected by a second control signal. An output circuit receives output signals of the first and second phase adjusters and outputs a signal whose phase is adjusted within a range of the delay time. The second phase adjuster further includes transistors connected to the second inverters. During the delay time, these transistors block a current path between the first and second phase adjusters, under the control of the input signal. | 06-26-2014 |
20140320171 | ELECTRONIC CIRCUIT - An electronic circuit includes: a weighting circuit configured to generate a first current by weighting and combining a first input signal and a second input signal in accordance with a modifiable coefficient and to generate a second current by weighting and combining a first inverted signal and a second inverted signal in accordance with the coefficient, the first inverted signal being an inverted signal of the first input signal, the second inverted signal being an inverted signal of the second input signal; and a decision circuit configured to decide on an output signal by comparing the first current with the second current. | 10-30-2014 |
20140320192 | INTERPOLATION CIRCUIT AND RECEIVING CIRCUIT - An interpolation circuit includes: a plurality of holding circuits configured to each hold a corresponding input data input chronologically; and a generating circuit configured to generate interpolation data by giving weights, based on an interpolation code, to input data that are chronologically adjacent to each other and are held by the plurality of holding circuits and combining the weighted data together. | 10-30-2014 |