Yu-Lung
Yu-Lung Chen, Kaohsiung City TW
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20090152911 | Method of making an armrest and the armrest made thereby - A method of making an armrest that is mountable between adjacent left and right passenger seats includes: separately forming two receptacle parts by molding a prepreg in a first mold assembly, the receptacle parts being adapted to hold personal objects and each having a looped wall surrounding a slot; forming an armrest frame by molding a prepreg in a second mold assembly, the armrest frame including a lower frame portion having a plurality of downwardly extending legs, and an upper frame portion disposed on top of and bridging the legs; and positioning the receptacle parts within the second mold assembly and combining the receptacle parts with the upper frame portion during the forming of the armrest frame in the second mold assembly, thereby providing a one-piece unitary structure having the receptacle parts and the armrest frame. | 06-18-2009 |
20110017385 | Method of producing a composite article - A method of producing a composite article includes: hot pressing a stack of prepreg sheets in a mold to form the composite article, the mold having a mold cavity; producing a fine ridge pattern on a surface of the stack of the prepreg sheets during the hot pressing of the prepreg sheets in the mold cavity, the fine ridge pattern having a plurality of ridges which are substantially as fine as those of a fingerprint; and removing the composite article from the mold cavity. | 01-27-2011 |
Yu-Lung Hsieh, Highland Heights, OH US
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20150317441 | INTELLIGENT NUCLEAR MEDICINE PATIENT WORKFLOW SCHEDULER - A nuclear medicine scanner system ( | 11-05-2015 |
Yu-Lung Huang, Daxi Township TW
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20110210413 | CHIP PACKAGE AND FABRICATION METHOD THEREOF - An embodiment of the invention provides a chip package, which includes: a semiconductor substrate having a device region; a package layer disposed on the semiconductor substrate; a spacing layer disposed between the semiconductor substrate and the package layer and surrounding the device region; and an auxiliary pattern having a hollow pattern formed in the spacing layer, a material pattern located between the spacing layer and the device region, or combinations thereof. | 09-01-2011 |
20120012988 | CHIP PACKAGE AND METHOD FOR FORMING THE SAME - According to an embodiment, a chip package is provided, which includes: a substrate having a first surface and a second surface; a device region formed in the substrate; a passivation layer formed overlying the first surface of the substrate; at least a polymer planarization layer formed overlying the passivation layer; a package substrate disposed overlying the first surface of the substrate; and a spacer layer disposed between the package substrate and the passivation layer, wherein the spacer layer and the package substrate surround a cavity overlying the substrate, wherein the polymer planar layer does not extends to an outer edge of the spacer layer. | 01-19-2012 |
20120112329 | CHIP PACKAGE - An embodiment of the invention provides a chip package, which includes: a semiconductor substrate having a device region and a non-device region neighboring the device region; a package layer disposed on the semiconductor substrate; a spacing layer disposed between the semiconductor substrate and the package layer and surrounding the device region and the non-device region; a ring structure disposed between the semiconductor substrate and the package layer, and between the spacing layer and the device region, and surrounding a portion of the non-device region; and an auxiliary pattern including a hollow pattern formed in the spacing layer or the ring structure, a material pattern located between the spacing layer and the device region, or combinations thereof. | 05-10-2012 |
20120261809 | CHIP PACKAGE AND MANUFACTURING METHOD THEREOF - An embodiment of the invention provides a manufacturing method of a chip package including: providing a semiconductor wafer having a plurality of device regions separated by a plurality of scribe lines; bonding a package substrate to the semiconductor wafer wherein a spacer layer is disposed therebetween and defines a plurality of cavities respectively exposing the device regions and the spacer layer has a plurality of through holes neighboring the edge of the semiconductor wafer; filling an adhesive material in the through holes wherein the material of the spacer layer is adhesive and different from the adhesive material; and dicing the semiconductor wafer, the package substrate and the spacer layer along the scribe lines to form a plurality of chip packages separated from each other. | 10-18-2012 |
20130252368 | CHIP PACKAGE AND METHOD FOR FORMING THE SAME - According to an embodiment, a chip package is provided, which includes: a substrate having a first surface and a second surface; a device region formed in the substrate; a passivation layer formed overlying the first surface of the substrate; at least a polymer planarization layer formed overlying the passivation layer; a package substrate disposed overlying the first surface of the substrate; and a spacer layer disposed between the package substrate and the passivation layer, wherein the spacer layer and the package substrate surround a cavity overlying the substrate, wherein the polymer planar layer does not extends to an outer edge of the spacer layer. | 09-26-2013 |
20130292825 | CHIP PACKAGE AND METHOD FOR FORMING THE SAME - An embodiment of the invention provides a chip package which includes: a semiconductor substrate having a first surface and a second surface; a device region formed in the semiconductor substrate; a dielectric layer disposed on the first surface of the semiconductor substrate; a conducting pad structure located in the dielectric layer and electrically connected to the device region, wherein the conducting pad structure comprises a stacked structure of a plurality of conducting pad layers; a support layer disposed on a top surface of the conducting pad structure; and a protection layer disposed on the second surface of the semiconductor substrate. | 11-07-2013 |
20130307125 | CHIP PACKAGE AND METHOD FOR FORMING THE SAME - An embodiment of the invention provides a chip package which includes: a semiconductor substrate having an upper surface and a lower surface; a device region or sensing region defined in the semiconductor substrate; a conducting pad located on the upper surface of the semiconductor substrate; at least two recesses extending from the upper surface towards the lower surface of the semiconductor substrate, wherein sidewalls and bottoms of the recesses together form a sidewall of the semiconductor substrate; a conducting layer electrically connected to the conducting pad and extending from the upper surface of the semiconductor substrate to the sidewall of the semiconductor substrate; and an insulating layer located between the conducting layer and the semiconductor substrate. | 11-21-2013 |
20140054786 | CHIP PACKAGE AND METHOD FOR FORMING THE SAME - An embodiment of the invention provides a chip package including a semiconductor substrate having a first surface and a second surface opposite thereto. A conducting pad is located on the first surface. A side recess is on at least a first side of the semiconductor substrate, wherein the side recess extends from the first surface toward the second surface and across the entire length of the first side. A conducting layer is located on the first surface and electrically connected to the conducting pad, wherein the conducting layer extends to the side recess. | 02-27-2014 |
20140065769 | CHIP PACKAGE AND FABRICATION METHOD THEREOF - An embodiment of the invention provides a chip package, which includes: a semiconductor substrate having a device region; a package layer disposed on the semiconductor substrate; a spacing layer disposed between the semiconductor substrate and the package layer and surrounding the device region; and an auxiliary pattern having a hollow pattern formed in the spacing layer, a material pattern located between the spacing layer and the device region, or combinations thereof. | 03-06-2014 |
20140154830 | IMAGE SENSOR CHIP PACKAGE AND METHOD FOR FORMING THE SAME - A method for forming an image sensor chip package includes: providing a substrate having predetermined scribe lines defined thereon, wherein the predetermined scribe lines define device regions and each of the device regions has at least a device formed therein; disposing a support substrate on a first surface of the substrate; forming at least a spacer layer between the support substrate and the substrate, wherein the spacer layer covers the predetermined scribe lines; forming a package layer on a second surface of the substrate; forming conducting structures on the second surface of the substrate, wherein the conducting structures are electrically connected to the corresponding device in corresponding one of the device regions, respectively; and dicing along the predetermined scribe lines such that the support substrate is removed from the substrate and the substrate is separated into a plurality of individual image sensor chip packages. | 06-05-2014 |
20140203387 | SEMICONDUCTOR CHIP PACKAGE AND METHOD FOR MANUFACTURING THEREOF - Disclosed herein is a semiconductor chip package, which includes a semiconductor chip, a plurality of vias, an isolation layer, a redistribution layer, and a packaging layer. The vias extend from the lower surface to the upper surface of the semiconductor chip. The vias include at least one first via and at least one second via. The isolation layer also extends from the lower surface to the upper surface of the semiconductor chip, and part of the isolation layer is disposed in the vias. The sidewall of the first via is totally covered by the isolation layer while the sidewall of the second via is partially covered by the isolation layer. The redistribution layer is disposed below the isolation layer and fills the plurality of vias, and the packaging layer is disposed below the isolation layer. | 07-24-2014 |
20140306343 | CHIP PACKAGE AND METHOD FOR FABRICATING THE SAME - A chip package is provided, in which includes: a packaging substrate, a chip and a plurality solder balls interposed between the packaging substrate and the chip for bonding the packaging substrate and the chip, wherein the solder balls include a first portion of a first size and a second portion of a second size that is different from the first size. | 10-16-2014 |
20140332908 | CHIP PACKAGE AND METHOD FOR FORMING THE SAME - A chip package including a chip is provided. The chip includes a sensing region or device region adjacent to an upper surface of the chip. A sensing array is located in the sensing region or device region and includes a plurality of sensing units. A plurality of first openings is located in the chip and correspondingly exposes the sensing units. A plurality of conductive extending portions is disposed in the first openings and is electrically connected to the sensing units, wherein the conductive extending portions extend from the first openings onto the upper surface of the chip. A method for forming the chip package is also provided. | 11-13-2014 |
20140332968 | CHIP PACKAGE - A chip package is provided. The chip package includes a chip having an upper surface, a lower surface and a sidewall. The chip includes a sensing region or device region and a signal pad region adjacent to the upper surface. A shallow recess structure is located outside of the signal pad region and extends from the upper surface toward the lower surface along the sidewall. The shallow recess structure has at least a first recess and a second recess under the first recess. A redistribution layer is electrically connected to the signal pad region and extends into the shallow recess structure. A first end of a wire is located in the shallow recess structure and is electrically connected to the redistribution layer. A second end of the wire is used for external electrical connection. A method for forming the chip package is also provided. | 11-13-2014 |
20140332969 | CHIP PACKAGE AND METHOD FOR FORMING THE SAME - A chip package including a chip having an upper surface, a lower surface and a sidewall is provided. The chip includes a signal pad region adjacent to the upper surface. A first recess extends from the upper surface toward the lower surface along the sidewall. At least one second recess extends from a first bottom of the first recess toward the lower surface. The first and second recesses further laterally extend along a side of the upper surface, and a length of the first recess extending along the side is greater than that of the second recess extending along the side. A redistribution layer is electrically connected to the signal pad region and extends into the second recess. A method for forming the chip package is also provided. | 11-13-2014 |
20140332983 | STACKED CHIP PACKAGE AND METHOD FOR FORMING THE SAME - A stacked chip package including a device substrate having an upper surface, a lower surface and a sidewall is provided. The device substrate includes a sensing region or device region, a signal pad region and a shallow recess structure extending from the upper surface toward the lower surface along the sidewall. A redistribution layer is electrically connected to the signal pad region and extends into the shallow recess structure. A wire has a first end disposed in the shallow recess structure and electrically connected to the redistribution layer, and a second end electrically connected to a first substrate and/or a second substrate disposed under the lower surface. A method for forming the stacked chip package is also provided. | 11-13-2014 |
Yu-Lung Lin, Taipei TW
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20100312929 | UNIVERSAL SERIAL BUS DEVICE AND UNIVERSAL SERIAL BUS SYSTEM - A universal serial bus (USB) device and a USB system are provided. The USB device comprises an electrical physical layer (EPHY) module, a logical physical layer (LPHY) module and a link layer module. The EPHY module reads the voltages of first and second transmission lines of a USB cable to extract a recovery clock and data. The LPHY module detects the recovery clock and data to output an indication signal. When the recovery clock is not detected, the LPHY module sets the indication signal to a predetermined value. The link layer module determines whether the indication signal is at the predetermined value, and makes a state machine thereof leave a normal operation state when the indication signal has been maintained at the predetermined value over a predetermined time period. | 12-09-2010 |
20110099411 | USB Device and Correction Method Thereof - A universal serial bus (USB) device for receiving data from a link partner is provided. An electrical physical unit receives a series of data from the link partner via a cable and generates a symbol string corresponding to the series of data, wherein the symbol string includes a plurality of symbols. A correction unit receives the symbol string, determines whether each symbol of the received symbol string is a first type symbol and counts a quantity of the received first type symbol, wherein when the counted quantity is odd and a next received symbol is a second type symbol, the next received symbol is replaced with the first type symbol by the correction unit. | 04-28-2011 |
Yu-Lung Lin, New Taipei City TW
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20150043922 | OPTICAL TRANSCEIVER MODULES, OPTICAL TRANSMISSION DEVICES, AND OPTICAL TRANSMISSION METHODS - An optical transceiver module coupled to a device is provided. The optical transceiver module includes an electronic signal transmitting terminal coupled to a receiving terminal of the device, an electronic signal receiving terminal coupled to a transmitting terminal of the device, an optical signal receiving terminal coupled to the electronic signal transmitting terminal, and an optical signal transmitting terminal coupled to the electronic signal receiving terminal. When the optical transceiver module is at an normal operation state and the electronic signal receiving terminal does not receive any electronic signal over a first predetermined time period, the optical transceiver module enters a idle detection state to make the electronic signal transmitting terminal to perform a receiver termination detection to the device to determine whether the device is coupled to the optical transceiver module. At the idle detection state, the optical signal transmitting terminal transmits the optical signal continuously. | 02-12-2015 |
20150207568 | OPTICAL TRANSMISSION DEVICE AND OPTICAL TRANSCEIVER MODULE - An optical transmission device is provided. The optical transmission device is coupled between a first electronic device and a second electronic device, and includes a first optical transceiver module coupled to the first electronic device; a second optical transceiver module coupled to the second electronic device; and first and second optical fibers coupled between the first optical transceiver module and the second optical transceiver module, wherein the second optical transceiver module transmits an optical signal to the first optical transceiver module periodically when the second electronic device is idle for a first predetermined period. | 07-23-2015 |
Yu-Lung Lo, Banciao City TW
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20090141016 | LCD DRIVING APPARATUS AND METHOD - The invention discloses a driving apparatus for driving an LCD. The driving apparatus comprises a voltage control unit, an operating unit, a resistance unit, and a voltage selection unit. The operating unit comprises two sets of buffers formed by a plurality of operational amplifiers in negative feedback circuit. The two sets of buffers selectively receive positive polarity voltages and negative polarity voltages respectively. The voltage selection unit is provided with the positive polarity voltages and negative polarity voltages through the operating unit and the resistance unit. The voltage selection unit selectively provides the pixels of the LCD with the positive polarity voltage and the negative polarity voltage. Accordingly, each of the pixels is provided either with the positive polarity voltages or the negative polarity voltages by one of the two sets of buffers. | 06-04-2009 |
Yu-Lung Lo, Banqiao City TW
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20110069045 | Driving Circuit, Electronic Display Device Applying the Same and Driving Method Thereof - A driving circuit applied in an electronic display apparatus is provided. The driving circuit includes a first exchange circuit and a first buffer. The first buffer includes first and second input stages, a second exchange circuit and first and second output stages. The first exchange circuit selectively couples a first input signal and a first output signal outputted from the first output stage to one of the first and the second input stages; and selectively couples a second input signal and a second output signal outputted from the second output stage to the other of the first and the second input stages. The second exchange circuit selectively couples the first input stage to one of the first and the second output stages and selectively couples the second input stage to the other of the first and the second output stages. | 03-24-2011 |
20110122102 | Driving Circuit and Output Buffer - An output buffer including a first switch circuit and a buffer is provided. The first switch circuit receives first and second input signals. The buffer circuit includes first and second input stages, first and second output stages and a second switch circuit. The first and the second input stages are coupled to the first switch circuit. The first and the second output stages are coupled to the second switch circuit. The second switch circuit, coupled to the first and the second input stages and the first and the second output stages, selectively couples one of first and the second input stages to the first output stage and selectively couples the other to the second output stage. The first switch circuit further selectively provides one of the first and the second input signals to the first input stage and selectively provides the other to the second input stage. | 05-26-2011 |
Yu-Lung Sun, Kaohsiung TT
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20120279354 | METHOD FOR RECYCLING METALS FROM WASTE MOLYBDIC CATALYSTS - A method for recycling metals from waste molybdic catalysts, comprises steps of leaching, by soaking a waste molybdic catalyst into a highly oxidized acid and conducting a reaction between sulfur in the waste molybdic catalyst and the acid to obtain sulfide and vaporizer, wherein metals in the waste molybdic catalyst are dissolved and oxidized by the acid to obtain a first solution and dregs; and refining, by further dissolving metals in the dregs into a second solution, and extracting metals in the waste molybdic catalyst from the first and second solution; wherein, the vaporizer obtained from the step of leaching is converted into highly oxidized acid and recycled in the step of leaching. | 11-08-2012 |
Yu-Lung Tsai, Taipei City TW
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20100121909 | STORAGE APPARATUS AND ON-LINE CLIENT SERVICE SYSTEM, SOFTWARE AND METHOD THEREOF - An on-line client service method of a storage apparatus that includes detecting the current status of the storage apparatus when a link is established between a client host and the storage apparatus and determining whether or not a diagnostic event has occurred, and when the diagnostic event occurs, a diagnostic result is generated. In addition, the diagnostic result is transmitted to a far-end server to process the storage apparatus properly according to the diagnostic result. | 05-13-2010 |
Yu-Lung Tsai, Huatan Township TW
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20140263909 | PUMP DISPENSER BOTTLE HANGER - A pump dispenser bottle hanger that fits different pump dispenser bottle neck dimensions includes a hanging board and a fixing board. Two surfaces and two ends of the hanging board are defined as top and bottom surfaces and front and rear ends, respectively. The hanging board has a clamping slot that opens into the hanging board from the front end toward the rear end and penetrates the top and bottom surfaces. The clamping slot has front, middle, and rear segments arranged sequentially in a direction from the front end to the rear end. The rear segment has a stop edge. The middle segment has two opposing oblique edges connected to the stop edge. The oblique edges each extend from the junction of the oblique edge and the stop edge and in the direction of the front segment. The fixing board extends downward from the hanging board. | 09-18-2014 |
Yu-Lung Tung, Kaohsiung City TW
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20140035149 | METHOD OF PATTERNING A SEMICONDUCTOR DEVICE HAVING IMPROVED SPACING AND SHAPE CONTROL AND A SEMICONDUCTOR DEVICE - A semiconductor device includes a semiconductor substrate, a first active region in the semiconductor substrate, and a second active region in the semiconductor substrate. The semiconductor device further includes a first conductive line over the semiconductor substrate electrically connected to the first active region and having a first end face adjacent to the second active region, and the first end face having an image log slope of greater than 15 μm | 02-06-2014 |
Yu-Lung Wang, Taipei City TW
Yu-Lung Wang, Tainan City TW
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20150145806 | IN-CELL TOUCH DISPLAY PANEL AND AN OPERATION METHOD THEREOF - The invention relates to an in-cell touch display panel including a thin film transistor array substrate, a color filter substrate, a liquid crystal molecule layer, sensing driving electrodes and touch control sensing electrodes. The liquid crystal molecule layer is disposed between the thin film transistor substrate and the color filter substrate. The sensing driving electrodes are arranged in a first direction and disposed on the thin film transistor array substrate. The touch control sensing electrodes are arranged in a second direction and disposed on a surface of the color filter substrate farther away from the thin film transistor array. The data lines of a pixel array on the thin film transistor array are used as the sensing driving electrodes to cooperate with the touch control sensing electrodes to perform a touch sensing operation. | 05-28-2015 |
Yu-Lung Wu, Taipei TW
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20120231712 | METHOD OF MAKING A GRINDING DISK AND A GRINDING DISK - The invention relates to a method of making a grinding disk, comprising the steps of: providing a cap; providing an abrasive part; placing the cap on the abrasive part to form an assembly; holding the assembly and injecting a molding material into a space between the cap and the abrasive part and into the abrasive part to bond the cap and the abrasive part. A grinding disk made by the method is also disclosed. | 09-13-2012 |
Yu-Lung Wu, Bade City TW
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20100111860 | Radioactive material containing chitosan for inhibiting cancer and preparation method thereof - A radioactive material containing chitosan for inhibiting cancer and a preparation method thereof are revealed. The adioactive material containing chitosan is formed by using SOCTA chelating agent to connect chitosan and radionuclides such as | 05-06-2010 |
20100183508 | RADIOACTIVE MIXTURE AND MANUFACTURING METHOD THEREOF - A radioactive mixture and a manufacturing method thereof are disclosed. The radioactive mixture ( | 07-22-2010 |
Yu-Lung Wu, Taoyuan County TW
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20140017173 | Process of Evaluating Blood-Brain Barrier Permeability of Stroke Rat by Using Fluorescent Substance - A process of evaluating blood-brain barrier permeability of a stroke rat by using fluorescent substance is disclosed. This process uses an Evans blue dye having spontaneous fluorescence properties, in combination with the use of a new non-invasive in vivo imaging system (IVIS), to obtain fluorescent signals so as to assess the change in the blood-brain barrier permeability of rodents after a cerebral artery stroke model surgery. In operation, an Evans blue dye is injected into a stroke rat of middle cerebral artery occlusion model. A non-invasive in vivo imaging system is used to detect the fluorescence distribution of the whole brain, and obtain images combined by the fluorescence images and optical images for the whole brain tissue. Thereby, the change in the blood-brain barrier permeability of the stroke rat can be completely realized. | 01-16-2014 |
Yu-Lung Yang, Taichung City TW
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20130264308 | PLASMA PROCESS, FILM DEPOSITION METHOD AND SYSTEM USING ROTARY CHUCK - A chuck and a wafer supported thereon are rotated during a plasma process or a film deposition process to reduce thickness non-uniformity of a film processed or deposited on the wafer. | 10-10-2013 |