Patent application number | Description | Published |
20100117044 | PHASE CHANGE MEMORY DEVICE CAPABLE OF SATISFYING RESET CURRENT CHARACTERISTIC AND CONTACT RESISTANCE CHARACTERISTIC - A phase change memory device is presented that has a lower electrode contact that has a gradient resistance profile ranging from a lower resistive lower end to a higher resistive upper end. The phase change memory device includes a semiconductor substrate, a lower electrode contact, and a phase change pattern. The semiconductor substrate has a switching device. The lower electrode contact is formed on the switching device and has a specific resistance which gradually increases from a lower part to an upper part of the lower electrode contact. The phase change pattern layer is formed on the lower electrode contact. | 05-13-2010 |
20100163830 | PHASE-CHANGE RANDOM ACCESS MEMORY CAPABLE OF REDUCING THERMAL BUDGET AND METHOD OF MANUFACTURING THE SAME - A phase-change random access memory (PRAM) is presented which can ensure the integrity of the electrical characteristics of driving transistors even when the PRAM is with a high temperature SEG fabrication process because the fabrication time is minimized. A method of manufacturing the PRAM includes the following steps. After preparing a semiconductor substrate having a cell area and a peripheral area, a junction area is formed in the cell area. Then, a transistor having a gate electrode with a single conductive layer is formed in the peripheral area. Subsequently, a first interlayer dielectric layer is formed at an upper portion of the semiconductor substrate, and then a contact hole is formed by etching the first interlayer dielectric layer to expose a predetermined portion of the junction area. Next, an epitaxial layer is grown in the contact hole. | 07-01-2010 |
20100197111 | METHOD OF MANUFACTURING MEMORY DEVICE AND METHOD OF MANUFACTURING PHASE-CHANGE MEMORY DEVICE USING THE SAME - A method of manufacturing a memory device and a phase-change memory device is presented. The method of manufacturing the memory device includes performing Ge ion implantation on a top surface of a first layer. The method also includes performing a fast heat treatment on the ion-implanted first layer. The method also includes forming a second layer on a top of the fast heat-treated first layer. | 08-05-2010 |
20110073826 | PHASE CHANGE MEMORY DEVICE AND FABRICATION METHOD THEREOF - A phase change memory device is provided that includes a switching device, a bottom electrode contact in contact with the switching device and a porous spacer formed on the bottom electrode contact. | 03-31-2011 |
20120156851 | PHASE CHANGE MEMORY DEVICE AND FABRICATION METHOD THEREOF - A phase change memory device is provided that includes a switching device, a bottom electrode contact in contact with the switching device and a porous spacer formed on the bottom electrode contact. | 06-21-2012 |
20140054532 | ACCESS DEVICE, FABRICATION METHOD THEREOF, AND SEMICONDUCTOR MEMORY DEVICE HAVING THE SAME - An access device having a reduced height and capable of suppressing leakage current, a method of fabricating the same, and a semiconductor memory device including the same, are provided. The access device may include a stacked structure including a first-type semiconductor layer having a first dopant, a second-type semiconductor layer having a second dopant, and a third-type semiconductor layer. A first counter-doping layer, having a counter-dopant to the first dopant, is interposed between the first-type semiconductor layer and the third-type semiconductor layer. A second counter-doping layer, having a counter-dopant to the second dopant, is interposed between the third-type semiconductor layer and the second-type semiconductor layer. | 02-27-2014 |
Patent application number | Description | Published |
20090039334 | PHASE-CHANGE MEMORY DEVICE AND METHOD FOR MANUFACTURING THE SAME - A phase-change memory device and a fabrication method thereof, capable of reducing driving current while minimizing a size of a contact hole used for forming a PN diode in the phase-change memory device that employs the PN diode. The method of fabricating the phase-change memory device includes the steps of preparing a semiconductor substrate having a junction area formed with a dielectric layer, forming an interlayer dielectric layer having etching selectivity lower than that of the dielectric layer over an entire structure, and forming a contact hole by removing predetermined portions of the interlayer dielectric layer and the dielectric layer. The contact area between the PN diode and the semiconductor substrate is increased so that interfacial resistance is reduced. | 02-12-2009 |
20090045389 | PHASE CHANGE MEMORY DEVICE AND METHOD FOR MANUFACTURING THE SAME - A phase change memory device and a method for manufacturing the same. The method includes the steps of defining bottom electrode contact holes by removing portions of an insulation layer, to expose bottom electrodes, on a semiconductor substrate on which the bottom electrodes and the insulation layer are sequentially formed; forming amorphous silicon spacers on inner sidewalls of the bottom electrode contact holes; and forming bottom electrode contacts in the bottom electrode contact holes. | 02-19-2009 |
20090321705 | PHASE CHANGE MEMORY DEVICE AND METHOD FOR MANUFACTURING THE SAME - A phase change memory device includes a semiconductor substrate, a first conductive pattern formed on the semiconductor substrate, a second conductive pattern contacting an upper surface of the first conductive pattern and having a diameter less than a diameter of the first conductive pattern, and a phase change material layer contacting the second conductive pattern. | 12-31-2009 |
Patent application number | Description | Published |
20080242045 | METHOD FOR FABRICATING TRENCH DIELECTRIC LAYER IN SEMICONDUCTOR DEVICE - A method for fabricating a trench dielectric layer in a semiconductor device is provided. A trench is formed in a semiconductor substrate and a liner nitride layer is then formed on an inner wall of the trench. A liner oxide layer formed on the liner nitride layer is nitrified in order to protect the liner nitride layer from being exposed. Subsequently, the trench is filled with one or more dielectric layers. | 10-02-2008 |
20140287535 | ELECTRONIC DEVICE AND METHOD FOR FABRICATING THE SAME - An electronic device comprising a semiconductor memory unit that includes a resistance variable element formed over a substrate, and including stacked therein a bottom electrode, a variable resistance layer and a top electrode, and a barrier layer formed over the resistance variable element, and including an amorphous silicon layer which is doped with at least one kind of impurity. | 09-25-2014 |
20150069557 | MAGNETORESISTIVE ELEMENT AND METHOD OF MANUFACTURING THE SAME - According to one embodiment, a magnetoresistive element is disclosed. The magnetoresistive element includes a reference layer, a tunnel barrier layer, a storage layer. The storage layer includes a first region and a second region provided outside the first region to surround the first region, the second region including element included in the first region and another element being different from the element. The magnetoresistive element further includes a cap layer including a third region and a fourth region provided outside the third region to surround the third region, the fourth region including an element included in the third region and the another element. | 03-12-2015 |