Patent application number | Description | Published |
20080198235 | HIGH DYNAMIC RANGE IMAGE RECORDER - Methods and devices ( | 08-21-2008 |
20080266903 | EAVE LIGHT GUIDING DEVICE AND BACKLIGHT DEVICE USING THE SAME - The present invention provides a multi-block backlight device having light guiding to solve the problems met in the current backlight devices with high cost, difficult matching with the panels, and inefficient lighting area. The multi-block backlight device comprises a plurality of light guiding devices, the light guiding device comprises at least one incident portion, the incident portion comprises at least one light source and an incident area; at least one eave, and a diffusion portion with uniform thickness. The eave can increase effective lighting area of the multi-block backlight device, and the diffusion portion can make the multi-block backlight device easier to couple, therefore achieving cost decreasing and effective usage. | 10-30-2008 |
20100170725 | TOUCH SURFACE AND SYSTEM AND METHOD OF DETECTING TOUCH INPUT - A system and method for touch detection and a touch-responsive surface are provided. According to one embodiment, a “virtual” touch-sensitive surface in is provided in that a plurality of transmitter-sensor devices receive and calculate a touch by detecting position and movement on a touch surface. The touch surface includes a planar surface; a first transmitter-sensor device located at a first position proximate to the planar surface and a second transmitter-sensor device located at a second position proximate to the planar surface, wherein each of the transmitter-sensors includes a light beam emitter and a scanning micromirror to reflect the light beam across the planar surface. A processing unit is in operable communication with the first transmitter-sensor device and the second transmitter-sensor device, and the processing unit is configured to calculate the position of a touch on the planar surface based on one or more times of refection of the light beams. | 07-08-2010 |
20100277436 | Sensing System for a Touch Sensitive Device - A sensing system for sensing a touch input on a touch sensitive device, the system including: a sensing plane; a well-collimated light source for generating a plurality of light rays along one or more planes different from the sensing plane; and a reflecting means adjacent one edge of the sensing plane for transforming at least a subset of the light rays into substantially parallel light rays and redirecting the subset of light rays along the sensing plane, at least one of the light rays along the sensing plane being interruptable by the touch input thereby allowing the sensing system to determine a position coordinate of the touch input. A related method of sensing a touch input on a touch sensitive device is also provided. | 11-04-2010 |
Patent application number | Description | Published |
20090026567 | Image sensor package structure and method for fabricating the same - A method for fabricating an image sensor package is disclosed, comprising: providing a wafer having a plurality of image sensor integrated circuits, each of which has a photosensitive active region and at least one first bonding pad; joining a transparent protecting material to the wafer wherein the photosensitive active region of the image sensor integrated circuit is covered by the transparent protecting material; forming a plurality of through holes in the transparent protecting material, the through holes being correspondingly to the first bonding pad of the wafer to expose the first bonding pad; and dicing the wafer to form a plurality of image sensor integrated circuit components. The method for fabricating an image sensor package of the present invention decreases the defects of the photosensitive active region and reduces the size of the package structure. | 01-29-2009 |
20100112757 | ELECTRONIC DEVICE PACKAGE AND METHOD OF MANUFACTURING THE SAME - The present invention discloses an electronic device package and a method of the package. In particular, an electronic device package and a method of the package suitable for a bumpless electronic device package with enhanced electrical performance and heat-dissipation efficiency are disclosed. The method comprises: providing a substrate having a plurality of vias and a plurality of electronic devices; forming a gluing layer on a surface of the substrate and fixing the electronic devices on the gluing layer, wherein the electronic devices have I/O units aligned with the vias respectively; forming a plurality of fixing layers in the gaps between the electronic devices; trenching a plurality of openings aligned with the vias respectively in the fixing layer; forming a plurality of metallic conductive units in the vias, the openings and part of the surface of the substrate; and forming a passivation layer over the other surface of the substrate. | 05-06-2010 |
20120267765 | WAFER-LEVELED CHIP PACKAGING STRUCTURE AND METHOD THEREOF - A wafer-leveled chip packaging method, comprising the steps of: providing a wafer; attaching at least one first chip to the wafer; forming a first insulating layer on the wafer; forming a plurality of first conductive vias penetrating the first insulating layer, wherein parts of the first conductive vias are electrically connected with the first chip; forming a conductive pattern layer on the surface of the first insulating layer wherein the conductive pattern layer is electrically connected with the first conductive vias; forming a plurality of through holes penetrating the wafer; filling a second insulating layer in the through holes; and forming a plurality of second conductive vias in the second insulating layer, wherein the second conductive vias are electrically connected with the first conductive vias. | 10-25-2012 |
20140217587 | Wafer Leveled Chip Packaging Structure and Method Thereof - A wafer-leveled chip packaging method, comprising the steps of: providing a wafer; attaching at least one first chip to the wafer; forming a first insulating layer on the wafer; forming a plurality of first conductive vias penetrating the first insulating layer, wherein parts of the first conductive vias are electrically connected with the first chip; forming a conductive pattern layer on the surface of the first insulating layer wherein the conductive pattern layer is electrically connected with the first conductive vias; forming a plurality of through holes penetrating the wafer; filling a second insulating layer in the through holes; and forming a plurality of second conductive vias in the second insulating layer, wherein the second conductive vias are electrically connected with the first conductive vias. | 08-07-2014 |