Seung Wan
Seung Wan Han, Daejeon KR
Patent application number | Description | Published |
---|---|---|
20120124370 | PORTABLE INTEGRATED SECURITY STORAGE DEVICE AND SERVICE PROCESSING APPARATUS, AND SERVICE PROCESSING METHOD USING THE SAME - A portable integrated security storage device includes: a password generation module for generating a password; a universal authentication module for storing universal authentication information; a communication interface connected to an external system for transmitting and receiving data with the external system; and a memory for storing the received data received through communication with the external system. The password and universal authentication information are transmitted to the external system for user authentication and device authentication, and encrypted data and a service secret key are received from the external system and stored in the memory. | 05-17-2012 |
20120134578 | SYSTEM AND METHOD FOR DETECTING GLOBAL HARMFUL VIDEO - A system for detecting a global harmful video includes: a video determination policy generation unit for determining harmfulness of learning video segments from video learning information to analyze occurrence information of harmful learning video segments, and generating a global harmfulness determination policy based on the occurrence information; and a video determination policy execution unit for determining harmfulness of input video segments from information of an input video to analyze occurrence information of harmful input video segments, and determining whether the input video is harmful or not based on the occurrence information of the harmful input video segments and the global harmfulness determination policy. | 05-31-2012 |
20130117855 | APPARATUS FOR AUTOMATICALLY INSPECTING SECURITY OF APPLICATIONS AND METHOD THEREOF - An apparatus automatically inspects security of mobile applications. The apparatus includes a static analyzer to perform a static analysis by reversing an execution file of the mobile application, and an automatic execution processor to generate an automatic execution script used to automatically execute the execution file and execute the automatic execution script automatically to generate a log. The apparatus further includes a dynamic analyzer to analyze whether a pattern of malicious codes was executed in the execution file using the result of the static analysis and the log resulted from the automatic execution. | 05-09-2013 |
20140245448 | APPARATUS AND METHOD FOR ANALYZING PERMISSION OF APPLICATION FOR MOBILE DEVICES AND DETECTING RISK - An apparatus for analyzing a permission of an application for a mobile device, the apparatus comprising: an executable file acquisition unit; a file extraction module; and an execution permission analyzing module configured to detect a security risk which can be caused by the permission on the basis of the permission described in the extracted file, wherein the information related to the permission of the application comprises: information on permission that is declared in the application, permission that the application uses and a function that uses the permission of the application. | 08-28-2014 |
Seung Wan Kang, Seoul KR
Patent application number | Description | Published |
---|---|---|
20150351641 | BIO INFORMATION MEASUREMENT DEVICE AND BIO INFORMATION MEASUREMENT METHOD - A bio information measurement device and a bio information measurement method are provided. The bio information measurement device includes: a heart information acquisition unit for acquiring heart information; a brainwave information acquisition unit for acquiring brainwave information; a control unit for acquiring heart-brain synchronization information on the basis of the heart information and the brainwave information; and a display unit for displaying the heart-brain synchronization information. According to the present invention, it is possible to provide a health index reflecting the influence of both the automatic nervous system and the central nervous system. | 12-10-2015 |
Seung Wan Kang US
Patent application number | Description | Published |
---|---|---|
20150351641 | BIO INFORMATION MEASUREMENT DEVICE AND BIO INFORMATION MEASUREMENT METHOD - A bio information measurement device and a bio information measurement method are provided. The bio information measurement device includes: a heart information acquisition unit for acquiring heart information; a brainwave information acquisition unit for acquiring brainwave information; a control unit for acquiring heart-brain synchronization information on the basis of the heart information and the brainwave information; and a display unit for displaying the heart-brain synchronization information. According to the present invention, it is possible to provide a health index reflecting the influence of both the automatic nervous system and the central nervous system. | 12-10-2015 |
Seung Wan Kim, Icheon KR
Patent application number | Description | Published |
---|---|---|
20120007172 | SEMICONDUCTOR DEVICE AND METHOD FOR FORMING THE SAME - A semiconductor device and a method for forming the same are disclosed. The semiconductor device includes an active region formed to be sloped or tilted by α° (where 0°<α°<90°) from the bottom of a semiconductor substrate, at least one gate that is formed over the sloped active region and has a surface parallel to the bottom of the semiconductor substrate, and a landing plug that is coupled to the active region and is located between the gates. As a result, the area of the active region is increased thus increasing a channel width, so that the operation of the semiconductor device can be improved as the integration degree of the semiconductor device is rapidly increased. | 01-12-2012 |
20120286351 | CELL ARRAY - A semiconductor device includes a plurality of pillars disposed to protrude from a semiconductor substrate, bit lines surrounding perimeters of portions of the plurality of pillars and extending in a first direction, gates spaced apart from the bit lines, surrounding perimeters of portions of the plurality of pillars over the bit lines, and extending to a second direction perpendicular to the first direction, and separation layers separating the gates parallel to the second direction. Therefore, the semiconductor device suitable to the high integration of semiconductor devices can be implemented. | 11-15-2012 |
Seung Wan Kim, Seoul KR
Patent application number | Description | Published |
---|---|---|
20080200790 | Apparatus For Measuring Blood Sugar and Apparatus For Monitoring Blood Sugar Comprising the Same - There is provided an apparatus for measuring a blood sugar by using a microwave without withdrawing any blood while enhancing the reliability of measurement. The apparatus for measuring the blood sugar according to the present invention has a main body having a measurement surface configured to contact a measurement portion of a user, a probe part having a contact member exposed on the measurement surface so as to be in contact with the measurement portion, the probe part further having a probe disposed under the contact member for irradiating and receiving a microwave, a blood sugar measuring unit for supplying the microwave to the probe and measuring a blood sugar value from the received microwave, and a securing unit mounted on the main body for securing the measurement portion to the measurement surface. | 08-21-2008 |
20090011584 | Method for forming transistor of semiconductor device - A method for forming a transistor of a semiconductor device, includes forming a trench by etching a semiconductor substrate on which a pad oxide film and a pad nitride film are sequentially formed; forming a isolation oxide film by filling the trench with oxide; removing an upper portion of the isolation oxide film until an upper lateral portion of the semiconductor substrate is exposed; forming a barrier nitride film over the isolation oxide film, the semiconductor substrate, and the pad nitride film; forming a sacrificial oxide film over the barrier nitride film; performing a planarization process until the pad nitride film is exposed; performing a wet etching process until the active region is exposed; forming a photoresist pattern over the active region and the barrier nitride film; and performing a dry etching process by using the photoresist pattern as an etching mask, thereby forming a recessed gate trench. | 01-08-2009 |
20100116534 | Printed Circuit Board Having Flow Preventing Dam And Manufacturing Method Thereof - Disclosed is a printed circuit board having a flow preventing dam and a manufacturing method thereof The printed circuit board includes a base substrate having a solder pad, a solder bump formed on the solder pad of the base substrate, and a flow preventing dam formed on a peripheral area of the base substrate using a dry film resist. The flow preventing dam can prevent the outflow of an underfill solution and can be simply formed. | 05-13-2010 |
20120000067 | Method of manufacturing printed circuit board having flow preventing dam - A method of manufacturing a printed circuit board having a flow preventing dam, including: applying a dry film resist on a base substrate having a solder pad, and then primarily exposing the dry film resist to light; secondarily exposing the primarily exposed dry film resist formed on a peripheral area of the base substrate to light, thus forming a flow preventing dam; removing the unexposed dry film resist to expose the solder pad, thus forming an opening; printing the opening with a solder paste, and then forming a solder bump through a reflow process; and removing the primarily exposed dry film resist | 01-05-2012 |
Seung Wan Kim, Suwon KR
Patent application number | Description | Published |
---|---|---|
20140103098 | MASK FOR BUMPING SOLDER BALLS ON CIRCUIT BOARD AND SOLDER BALL BUMPING METHOD USING THE SAME - Disclosed herein are a mask for bumping solder balls on a circuit board and a solder ball bumping method using the same. The mask includes: a plurality of openings providing spaces into which the solder balls are inserted to thereby be seated on solder pads; and trenches providing introduction spaces for spreading a flux to portions at which the solder balls are seated on the solder pads and extended from at least one side of circumferences of the openings. | 04-17-2014 |
Seung Wan Lee, Seoul KR
Patent application number | Description | Published |
---|---|---|
20100235910 | SYSTEMS AND METHODS FOR DETECTING FALSE CODE - Systems and methods for detecting false code in web pages linked to a web site are provided. One system includes a web server for administering the web site and a surveillance server for collecting generated or updated web pages from among the web pages linked to the web site, selecting tags of a given tag type included in the collected web pages, determining whether the selected tags comprise false code, and providing the determination result to an administrator terminal such that an administrator can check the determination result. One method includes collecting web pages that were generated or updated within a set time period from among the web pages linked to the web site, determining whether tags included in the collected web pages comprise false code, and providing the determination result to an administrator terminal such that an administrator can check the determination result. | 09-16-2010 |
20100235917 | SYSTEM AND METHOD FOR DETECTING SERVER VULNERABILITY - Systems and methods for detecting vulnerability of a server are provided. One system includes: a check server for collecting response information with respect to at least one predetermined command from one or more service servers that provide service, and thus may be attacked from outside, and detecting and analyzing vulnerabilities of the service servers based on the collected response information; an administration terminal for displaying the results of detecting and analyzing the vulnerabilities of the service servers; and a database for storing and managing pattern information concerning the detected vulnerabilities. One method includes identifying a server that may be attacked by port scanning, receiving response information with respect to at least one predetermined command from the identified server, detecting and analyzing vulnerability of the server based on the response information, and reporting the result of the detection to an administration terminal. | 09-16-2010 |
Seung Wan Shin, Hwaseong KR
Patent application number | Description | Published |
---|---|---|
20110061911 | Interposer and method for manufacturing the same - An interposer includes: an insulation plate where a via is formed, the insulation plate including a resin or a ceramic; a first upper redistribution layer electrically connected to the via along a circuit pattern designed on the top surface of the insulation plate; a first upper protection layer laminated to expose a portion of the first upper redistribution layer and protecting the first upper redistribution layer; a second upper redistribution layer electrically connected to the first upper redistribution layer and laminated along a designed circuit pattern designed; a second upper protection layer laminated to expose a portion of the second upper redistribution layer and protecting the second upper redistribution layer; and an under bump metallization (UBM) formed at the exposed portion of the second upper redistribution layer. | 03-17-2011 |
20110176285 | Interconnection structure, interposer, semiconductor package, and method of manufacturing interconnection structure - There is provided an interconnection structure. An interconnection structure according to an aspect of the invention may include: a plurality of side portions provided on one surface of a substrate part and a plurality of cavities located between the side portions and located further inward than the side portions; and electrode pattern portions provided on surfaces of the side portions and the cavities. | 07-21-2011 |
20130029031 | METHOD FOR MANUFACTURING INTERPOSER - A method for manufacturing an interposer includes forming a via hole in an insulation plate including a resin or a ceramic; simultaneously forming resists for a first upper redistribution layer on the top surface of the insulation plate, and a resistor for a lower redistribution layer on the bottom surface of the insulation plate; plating copper to fill the via hole and simultaneously forming the first upper redistribution layer and the lower redistribution layer along a designed circuit pattern; and forming a first upper protection layer and a lower protection layer to expose a portion of the first upper redistribution layer and a portion of the lower redistribution layer. | 01-31-2013 |
Seung Wan Shin, Gyunggi-Do KR
Patent application number | Description | Published |
---|---|---|
20120084977 | METHOD OF MANUFACTURING BLOCK MODULE - Disclosed herein is a method of manufacturing a block module including: mounting an electronic part on a base substrate on which a ground terminal is formed; forming a lead frame to extend to the outside of the base substrate from the ground terminal; connecting a flexible printed circuit to a circuit layer on the base substrate; forming a mold to surround the base substrate; cutting the lead frame and exposing the cut surface of the lead frame to the outside of the mold; and forming a metal coating layer connected to the lead frame on the mold, whereby the metal coating layer is formed to surround the mold to interrupt the electromagnetic waves and the metal coating layer is connected to the ground terminal by the lead frame to make the process simple. | 04-12-2012 |
20120161323 | SUBSTRATE FOR PACKAGE AND METHOD FOR MANUFACTURING THE SAME - Disclosed herein are a substrate for a package and a method for manufacturing the same. The substrate for the package according to the present invention includes: a base substrate; a photosensitive insulating layer formed on one surface of the base substrate and having a roughness formed on a surface thereof; and a seed layer formed on one surface of the photosensitive insulating layer. | 06-28-2012 |
20130139753 | APPARATUS FOR MANUFACTURING SUBSTRATE - Disclosed herein is an apparatus for manufacturing a substrate. The apparatus for manufacturing a substrate includes: a reaction gas ejector ejecting reaction gas; a lift pin supporting the substrate and having a header contacting a rear surface of the substrate; and a support chuck having a lift pin insertion unit inserted with the lift pin and moving vertically and including a ring in a header insertion portion into which the header is inserted in the lift pin insertion unit. | 06-06-2013 |
Seung Wan Yang, Gunpo KR
Patent application number | Description | Published |
---|---|---|
20110078507 | OPERATIONAL SYSTEM TEST METHOD - The present invention features an operational system test method, comprising defining a fault model, inserting a test agent, hooking a test location, collecting test information, and removing the test agent. The invention also features an operational system test method, comprising defining a fault model, inserting a test agent, identifying a memory area according to a test location, hooking the identified memory area, collecting test information, and removing the test agent. | 03-31-2011 |
20130096880 | SYSTEM TEST METHOD - Disclosed is a test system and method that is configured to identify a position of a process control block, access the position of the process control block, and monitor performance factors related to the process control block. | 04-18-2013 |
Seung Wan Yang, Seoul KR
Patent application number | Description | Published |
---|---|---|
20100105362 | MOBILE TERMINAL AND INFORMATION PROCESSING METHOD THEREOF - A method of controlling a mobile terminal, and which includes acquiring channel information of a broadcasting program received by at least one other mobile terminal through a client program, arranging and displaying the acquired channel information according to a specific standard, receiving a selection signal corresponding to a selection at least one channel information item from the displayed channel information, and receiving and displaying the broadcasting program corresponding to the selected channel information item. | 04-29-2010 |
Seung Wan Yoo, Suwon-Si KR
Patent application number | Description | Published |
---|---|---|
20130026895 | WASHING MACHINE HAVING ENHANCED COUPLING STRUCTURE AND CONTROL METHOD OF THE SAME - A washing machine including a tub which is configured to accommodate water; a rotating tub which is disposed at the inside of the tub; at least one boss which is protruded from the tub and equipped with a coupling hole; a weight balance which is equipped with at least one insertion hole at which at least one boss is inserted; a pin body which is inserted at the coupling hole of the boss, and a pin which is equipped with a pin head which is extended from the pin body for preventing the weight balance from separating away, and the pin body includes at least one boss weld metal zone which is metal-welded at the inner surface of the coupling hole for the pin to be fixed to the boss. | 01-31-2013 |
Seung Wan Yu, Suwon KR
Patent application number | Description | Published |
---|---|---|
20140176289 | ELECTROMAGNETIC INTERFERENCE FILTER AND METHOD OF MANUFACTURING THE SAME - There are provided an electromagnetic interference filter and a method of manufacturing the same. The electromagnetic interference filter includes a base core including a first base core and a second base core facing the first base core, a leg core including first and second leg cores disposed between the first base core and the second base core, the first and second leg cores facing each other, a winding coil part including first and second winding coils wound around the first and second leg cores, respectively, and connected to a power supply, the first and second winding coils respectively providing magnetizing inductance and leakage inductance, and a central core disposed between the first and second cores to provide an inductance leakage path between the first and second base cores. | 06-26-2014 |
20150062983 | CHOKE COIL AND POWER SUPPLY DEVICE INCLUDING THE SAME - There is provided a choke coil, including: a core part having first and second legs; a winding part having a first coil wound around the first leg and a second coil wound around the second leg; and a sectioning wall partitioning the winding part into several winding regions. | 03-05-2015 |
Seung-Wan Hong, Seoul KR
Patent application number | Description | Published |
---|---|---|
20100173485 | Method of manufacturing a non-volatile memory device - A method of manufacturing a non-volatile memory device providing a semiconductor layer in which a cell region and a peripheral region are defined, sequentially forming a first insulating layer, a first conductive layer, a second insulating layer, and a second conductive layer on the cell region and the peripheral region, forming a trench for exposing a portion of the first conductive layer of the peripheral region, wherein the trench is formed by removing portions of the second conductive layer and the second insulating layer in the peripheral region, performing a trimming operation for removing portions of the second conductive layer and the second insulating layer of the cell region, forming a spacer on a side surface of the trench, and forming a silicide layer that is electrically connected to the first conductive layer, wherein the silicide layer is formed by performing a silicidation process on the spacer. | 07-08-2010 |
20120142177 | METHODS OF MANUFACTURING A WIRING STRUCTURE AND METHODS OF MANUFACTURING A SEMICONDUCTOR DEVICE - A method of manufacturing a wiring structure and a semiconductor device, the method of manufacturing a wiring structure including forming a first insulating interlayer on a substrate; forming a contact plug in an opening in the first insulating interlayer; forming a second insulating interlayer on the contact plug and the first insulating interlayer; removing a portion of the second insulating interlayer to form an opening therethrough such that the opening exposes the contact plug; filling a portion of the opening to form a wiring such that the wiring is electrically connected to the contact plug; and forming a diffusion barrier layer pattern on the wiring such that the diffusion barrier layer pattern fills a remaining portion of the opening. | 06-07-2012 |
Seung-Wan Kim, Yongin-Si KR
Patent application number | Description | Published |
---|---|---|
20140199602 | LITHIUM BATTERY - A lithium battery including: a positive electrode including an overlithiated lithium transition metal oxide having a layered structure; a negative electrode including a silicon-based negative active material; and an electrolyte between the positive electrode and the negative electrode, the electrolyte including an electrolytic solution including a fluorinated ether solvent in an amount of 3 vol % or more based on the total volume of the electrolytic solution. | 07-17-2014 |
20150228973 | POSITIVE ACTIVE MATERIAL, POSITIVE ELECTRODE, LITHIUM BATTERY INCLUDING THE SAME, AND METHOD OF MANUFACTURING THEREOF - Provided is a positive active material, a positive electrode including the positive active material, a lithium battery, and a manufacturing method of the same. The positive active material includes a core including a lithium nickel composite oxide and a coating layer formed on the core. The coating layer improves structural stability of the positive active material. Accordingly, lifespan properties of a lithium battery including the positive active material may be improved. | 08-13-2015 |
20150303456 | NEGATIVE ELECTRODE COMPOSITION, AND NEGATIVE ELECTRODE AND LITHIUM BATTERY CONTAINING THE SAME - Provided are a composition for a negative electrode, and a negative electrode and lithium battery including the composition. The composition includes a negative active material that contains one or more of a metal or a metalloid, an acrylate-based binder, and a guanidine carbonate. | 10-22-2015 |
Seung-Wan Kim, Suwon-Si KR
Patent application number | Description | Published |
---|---|---|
20090184420 | Post bump and method of forming the same - A post bump and a method of forming the post bump are disclosed. The method of forming the post bump can include: forming a resist layer, in which an aperture is formed in correspondence to a position of an electrode pad, over a substrate, on which the electrode pad is formed; forming a metal post by filling a part of the aperture with a metallic material; filling a remaining part of the aperture with solder; reflowing the solder by applying heat; and removing the resist layer. This method can be utilized to prevent deviations in the plated solder and prevent the unnecessary flowing of the solder over the sides of the metal post during reflowing, so that the amount of solder used can be minimized. | 07-23-2009 |
20100270067 | PRINTED CIRCUIT BOARD AND METHOD OF MANUFACTURING THE SAME - A printed circuit board and a method of manufacturing the printed circuit board are disclosed. In accordance with an embodiment of the present invention, the method includes providing a substrate having a pad formed thereon, forming a resist on the substrate, in which the resist has an opening formed therein such that the pad is exposed, forming a metal post inside the opening such that the metal post is electrically connected to the pad, forming a through-hole in the resist by removing a portion of the resist such that the through-hole surrounds the metal post, and forming a solder layer inside the through-hole and on an upper surface of the metal post so as to cover an exposed surface of the metal post. | 10-28-2010 |
20100271792 | ELECTRONIC COMPONENT PACKAGE AND METHOD OF MANUFACTURING THE SAME - An electronic component package and a method of manufacturing the same are disclosed. The method can include: providing a board, on which a multiple number of pads are formed; forming a solder resist layer, in which an opening superimposing over all of the pads is formed, on the board; forming metal posts over the pads, respectively; mounting an electronic component on the board by bonding the electrodes to the metal posts; and forming an underfill resin layer in the opening such that the underfill resin layer is interposed between the electronic component and the board. The solder resist layer may function as a dam that prevents the underfill resin layer from leaking in lateral directions during the subsequent underfill process so that the additional processes, such as dispensing, etc., that were required for forming a separate dam can be omitted, and the process time and costs can be reduced. | 10-28-2010 |
20110012261 | Post bump and method of forming the same - A post bump formed over an electrode pad of a substrate for electrically connecting to an external device, the post bump including a metal post formed over the electrode pad; and a solder formed over the metal post and shaped as a dome, the dome occupying a space defined by imaginary lines extending from a perimeter of the metal post along an axial direction of the metal post. | 01-20-2011 |
Seung-Wan Lee, Yongin-Si KR
Patent application number | Description | Published |
---|---|---|
20130070249 | NUMERICAL APERTURE (NA) CONTROLLING UNIT, VARIABLE OPTICAL PROBE INCLUDING THE NA CONTROLLING UNIT, AND DEPTH SCANNING METHOD USING THE NA CONTROLLING UNIT - A numerical aperture (NA) controlling unit and a variable optical probe including the same are provided. The NA controlling unit includes: an aperture adjustment unit which controls an aperture through which light is transmitted; and a focus control unit that is disposed in a predetermined position with respect to the aperture adjustment unit, that focuses light transmitted through the aperture, and that has an adjustable focal length. The variable optical probe includes: a light transmission unit; a collimator that collimates light transmitted through the light transmission unit into parallel light; an NA controlling unit that focuses light on a sample to be inspected; and a scanner that varies a path of light transmitted through the light transmission unit such that a predetermined region of the sample is scanned by light that passes through the NA controlling unit. | 03-21-2013 |
20130201436 | VARIFOCAL LENS - A varifocal lens including a first liquid crystal layer; a second liquid crystal layer disposed below the first liquid crystal layer; a common electrode disposed between the first liquid crystal layer and the second liquid crystal layer; a first electrode disposed above the first liquid crystal layer and having a curved shape; and a second electrode disposed below the second liquid crystal layer and having a curved shape. | 08-08-2013 |
Seung-Wan Song, Daejeon KR
Patent application number | Description | Published |
---|---|---|
20100233074 | SYNTHETIC METHOD OF TRANSITION METAL OXIDE NANO-PARTICLES - Provided is a method for preparing transition metal oxide nanoparticles from a transition metal as a reactant. The method includes dissolving the transition metal into aqueous hydrogen peroxide to provide peroxi-metallate solution, and then adding a reactive solution containing an alcohol, water and an acid thereto to perform hydrothermal reaction. | 09-16-2010 |
Seung-Wan Yoo, Seoul KR
Patent application number | Description | Published |
---|---|---|
20140086887 | ADULT STEM CELL LINE INTRODUCED WITH HEPATOCYTE GROWTH FACTOR GENE AND NEUROGENIC TRANSCRIPTION FACTOR GENE WITH BASIC HELIX-LOOP-HELIX MOTIF AND USES THEREOF - The present invention relates to an adult stem cell line introduced with an HGF gene and a neurogenic transcription factor gene of a bHLH family, a preparation method of the adult stem cell line, a composition for the prevention or treatment of neurological diseases comprising the adult stem cell line, and a method for treating neurological diseases comprising the step of administering the composition to a subject having neurological diseases or suspected of having neurological diseases. The adult stem cells according to the present invention, which are introduced with an HGF gene and a neurogenic transcription factor gene of a bHLH family, can be used to overcome chronic impairment caused by cell death following stroke. Thus, the adult stem cells can be developed as a novel therapeutic agent or widely used in clinical trial and research for cell replacement therapy and gene therapy that are applicable to neurological diseases including Parkinson's disease, Alzheimer disease, and spinal cord injury as well as stroke. | 03-27-2014 |