Patent application number | Description | Published |
20100101856 | ORGANIC LIGHT EMITTING DIODE DISPLAY - An organic light emitting diode (OLED) display is disclosed. One aspect includes a display panel assembly, a support member supporting edges of the display panel assembly and including an opening exposing a rear surface of the display panel assembly, and a buffer member attached to the rear surface of the display panel assembly exposed through the opening of the support member. | 04-29-2010 |
20100103641 | ORGANIC LIGHT EMITTING DIODE DISPLAY AND METHOD FOR MANUFACTURING THE SAME - An OLED display and a manufacturing method thereof. The OLED includes: a cover window; a guide frame disposed on the cover window; an adhesive layer disposed on the cover window, within the guide frame, and a display panel attached to the cover window, via the adhesive layer. | 04-29-2010 |
20100142172 | FLAT PANEL DISPLAY DEVICE - A flat panel display device having improved drop characteristics, that minimize a drop shock of the flat panel display device by controlling the size of a shock-absorbing tape, the flat panel display device including: a display panel having a display part to display an image and a pad part; a supporting member configured to support the display panel; and the shock-absorbing tape disposed between the display panel and the supporting member. The shock-absorbing tape is in contact with the display part of the display panel and ⅓ to ⅚ of the pad part of the display panel. | 06-10-2010 |
20110080695 | FLAT PANEL DISPLAY - A flat panel display device including a display panel, a bezel having a substrate to support the display panel and configured to receive the display panel, and a bonding agent disposed between the substrate of the bezel and the display panel. Further, the substrate of the bezel and the display panel may be bonded and fixed to each other. Therefore, it is possible to provide a flat panel display device having a small thickness and capable of improving strength against an external pressure. | 04-07-2011 |
20120099251 | DISPLAY DEVICE - A display device is disclosed. In one embodiment, the device includes a display panel displaying an image and an integrated receiving member supporting the display panel. The integrated receiving member includes a press molding portion including a bottom portion and a side wall portion bent and extended from the bottom portion and having a through-hole formed therein and an injection molding portion including a frame portion integrally attached to at least one side of the press molding portion, facing the display panel and a flange portion extended from the frame portion and protruding through the through-hole. The flange portion of the injection molding portion is wholly or partially separated from the side wall portion of the press molding portion within the through-hole. | 04-26-2012 |
20120170244 | Organic Light Emitting Diode Display - An organic light emitting diode display having a display panel comprising a first substrate and a second substrate disposed facing the first substrate, the first substrate comprising a display area and a pad area, a buffer member disposed on one surface of the first substrate, the buffering member having a buffer layer and an adhesive layer formed on at least one surface of the buffer layer, and a bezel or a case accommodating the display panel and buffer member. | 07-05-2012 |
20120212966 | ELECTRONIC DEVICE HAVING ORGANIC LIGHT EMITTING DIODE DISPLAY - An electronic device improves an impact-resistance characteristic of an organic light emitting diode (OLED) display. The electronic device includes an organic light emitting diode (OLED) display including a panel assembly for forming an organic light emitting element, and a housing including a housing main body for receiving the organic light emitting diode (OLED) display. The housing includes a housing main body including a first space for receiving the panel assembly and a second space for receiving a printed circuit board, an upper cover, and a lower cover. The housing main body includes a bottom formed to distinguish a first space and a second space in the housing, and also includes a bent unit on an edge, and a side wall in which the bent unit is buried to be combined with the edge of the bottom. | 08-23-2012 |
Patent application number | Description | Published |
20080291734 | NONVOLATILE MEMORY DEVICES AND METHODS OF CONTROLLING THE WORDLINE VOLTAGE OF THE SAME - A nonvolatile memory device includes an array of memory cells arranged in rows and columns, the array of memory cells having wordlines associated therewith. A wordline voltage controller determines the levels of wordline voltages to be supplied to the respective wordlines and a wordline voltage generator generates the wordline voltages at the determined levels. Related methods are also provided. | 11-27-2008 |
20090169792 | DISPLAY WINDOW HAVING A RECESS AND METHOD FOR PRODUCING THE SAME - Disclosed are a display window in which a recess having a smooth surface is formed and method of producing the same. A recess having a smooth surface, which may look visually convex, is formed in the window of the present invention. Therefore, an external appearance of the window is beautiful. Furthermore, the recess and the through-hole are formed at a location in which the speaker is installed. Accordingly, a mobile phone assembly process can be simplified and become efficient. Meanwhile, in the method of producing the window according to the present invention, the recess is formed to have a circular bite. It is therefore possible to obtain a recess having a smooth surface. Furthermore, since the recess is processed during the plate process, a window having a high hardness, a good transparency, and a variety of shapes can be fabricated. | 07-02-2009 |
20100039146 | High-Speed Multiplexer and Semiconductor Device Including the Same - High speed multiplexers include a first N-to-1 selection circuit, where N is an integer greater than one, a second N-to-1 selection circuit and an output driver. The first N-to-1 selection circuit is configured to route a true or complementary version of a selected first input signal (from amongst N input signals) to an output thereof in response to a first multi-bit selection signal, where N is an integer greater than one. The second N-to-1 selection circuit is configured to route a true or complementary version of the selected first input signal to an output thereof in response to a second multi-bit selection signal. The output driver includes a pull-up circuit, which is responsive to a signal generated at the output of the first N-to-1 selection circuit, and a pull-down circuit, which is responsive to a signal generated at the output of the second N-to-1 selection circuit. | 02-18-2010 |
20110075493 | NONVOLATILE MEMORY DEVICES AND METHODS OF CONTROLLING THE WORDLINE VOLTAGE OF THE SAME - A nonvolatile memory device includes an array of memory cells arranged in rows and columns, the array of memory cells having wordlines associated therewith. A wordline voltage controller determines the levels of wordline voltages to be supplied to the respective wordlines and a wordline voltage generator generates the wordline voltages at the determined levels. Related methods are also provided. | 03-31-2011 |
20120159048 | NON-VOLATILE MEMORY DEVICE - A non-volatile memory device includes a first bank including a plurality of first page buffers, a second bank including a plurality of second page buffers, and an address counter configured to count a first address and a second address in response to a clock before a first time in a period for performing a read operation and count the first address and the second address in response to a bank address after the first time, wherein data of the first page buffers are sequentially outputted in response to the first address, and data of the second page buffers are sequentially outputted in response to the second address. | 06-21-2012 |
20120170394 | COLUMN ADDRESS CIRCUIT OF SEMICONDUCTOR MEMORY DEVICE AND METHOD OF GENERATING COLUMN ADDRESSES - The column address circuit of a semiconductor memory device according to an aspect of the present disclosure includes a column address generation circuit configured to generate an internal dummy clock in response to a data output enable signal, generate an internal clock in response to a read enable signal, generate first count addresses in response to the internal dummy clock, and generate normal count addresses in response to the internal clock after the generation of the first count addresses, where the read enable signal is activated later than the data output enable signal, and a column address output circuit configured to store the first count addresses and the normal addresses and to generate column addresses by synchronizing the first count addresses and the normal addresses with output clocks, respectively. | 07-05-2012 |
20130088919 | NON-VOLATILE MEMORY DEVICE AND METHOD OF OPERATING THE SAME - A non-volatile memory device includes a memory cell block including a plurality of memory cells, a plurality of page buffer groups including a plurality of page buffers coupled to bit lines of the memory cell block, a pass/fail check circuit coupled to the plurality of page buffers and configured to perform a pass/fail check operation of comparing a total amount of current varying according to verify data sensed from the memory cells and stored in the page buffers with an amount of reference current corresponding to the number of allowed bits, and a control circuit configured to control the pass/fail check circuit by stopping, when a fail signal is generated during the pass/fail check operation currently being performed on a page buffer group among the plurality of page buffer groups, the pass/fail check operation on the remaining page buffer groups. | 04-11-2013 |
20130107636 | SEMICONDUCTOR MEMORY DEVICE | 05-02-2013 |
20130322146 | NONVOLATILE MEMORY APPARATUS - A nonvolatile memory apparatus includes a memory cell area including memory cells for storing data input from an external apparatus, a redundancy cell area including memory cells configured to substitute failed memory cells, and a flag cell area including memory cells for storing whether most significant bits of the memory cells have been programmed. The flag cell area is configured in a part of the redundancy cell area. | 12-05-2013 |
20140169094 | DATA TRANSMISSION CIRCUIT, MEMORY INCLUDING THE SAME, AND DATA TRANSMISSION METHOD - A data transmission circuit includes an input line selection unit configured to transfer data of a selected input line among a plurality of input lines to an output line, a data sensing unit connected to the plurality of input lines and configured to sense the data of the selected input line, and a data amplification unit configured to amplify data of the output line in response to a data sensing result of the data sensing unit. | 06-19-2014 |
20140254145 | TUBE-TYPE LED ILLUMINATION LAMP - A tube-type light-emitting diode (LED) illumination lamp is provided. The tube-type LED illumination lamp includes at least one printed circuit board on which at least one LED is placed, and a heat dissipation cover that has at least one seating surface on which the printed circuit board is mounted. The seating surface is obliquely formed such that each printed circuit board is mounted on each inclined surface. According to the present invention, since a light diffusion angle is increased by obliquely positioning the printed circuit board on which the LED is placed, illuminance quality of the tube-type LED illumination lamp can be improved. | 09-11-2014 |
Patent application number | Description | Published |
20080226222 | OPTO-ELECTRIC BUS MODULE AND METHOD OF MANUFACTURING THE SAME - Provided are an opto-electric bus module and a method of manufacturing the opto-electric bus module. The opto-electric bus module includes an opto-electric interconnection unit where a concave-shaped micro structure is formed on a lower surface of a polymer structure and an optical bench where a convex-shaped micro structure is formed in a position corresponding to the concave-shaped micro structure, at least one second electric interconnection for electric connection with a semiconductor chip is formed, and the semiconductor chip and an opto-electric device can be mounted. Thus, automatic, efficient, high-speed, and high-integration optical communication and electric communication between multi-chips can be completed at the same time by using the opto-bus module which provides low-speed electric communication while manually maintaining solid optical coupling. | 09-18-2008 |
20100172623 | COMPOUND CONTAINING CROSSLINKABLE MOIETIES, PREPOLYMER, BLEND AND POLYMER SHEET OBTAINED THEREFROM, AND WAVEGUIDE FOR OPTICAL INTERCONNECTION - A compound containing a crosslinkable moiety, a curable prepolymer, a blend, and a polymer sheet obtained therefrom, and an optical waveguide for optical interconnection. The compound is represented by the formula below: | 07-08-2010 |
20140219625 | Compound containing crosslinkable moieties, prepolymer, blend and polymer sheet obtained therefrom, and waveguide for optical interconnection - An optical waveguide for optical interconnection including a polymer sheet comprising a crosslinked product of a prepolymer, the prepolymer prepared by condensation reaction between a first compound represented by the formula Ar—H, where Ar comprises (a) a crosslinkable moiety at one end, (b) a moiety selected from the group consisting of —O—, —S—, —COO—, —CO—, —COS—, —SO | 08-07-2014 |
Patent application number | Description | Published |
20090040827 | Flash memory device for remapping bad blocks and bad block remapping method - Provided are a flash memory device and a bad block remapping method thereof. The flash memory device includes: an address storage block detecting whether a block address provided from the outside is identical to an already stored block address, and then generating a repair signal according to a detection result; and an encoder converting the repair signal into a block select signal in order to select the normal memory block. | 02-12-2009 |
20090122612 | WIRED-OR TYPED PAGE BUFFER HAVING CACHE FUNCTION IN A NONVOLATILE MEMORY DEVICE AND RELATED METHOD OF PROGRAMMING - Disclosed is a page buffer having a wired-OR type structure and a cache function which is adapted for use in a nonvolatile semiconductor memory device and a method of programming same. The page buffer embeds the cache latch block in relation to the cache function. Moreover, the nonvolatile semiconductor memory device includes an output driver enabling an internal output line to be unidirectional driven, thereby enabling a program-verifying operation using the wired-OR scheme. | 05-14-2009 |
20090174825 | Organic light emitting diode display - An OLED display includes a display panel having a display area and a pad area, a first bezel receiving the display panel, and a second bezel combined with the first bezel along a display panel side where the pad area is formed. | 07-09-2009 |
20090257181 | Organic light emitting diode display and method of manufacturing the same - An organic light emitting diode display that includes a display panel and a bezel to receive the display panel, the bezel including a first bezel and a second bezel, each of the first bezel and the second bezel including different materials and including a bottom portion and a skirt portion protruding from edges of the bottom portion. | 10-15-2009 |
20090303700 | AQUATIC LIGHT EMITTING DEVICE - An aquatic light emitting device comprising a plurality of point light emitting units and a plurality of linear light emitting units is disclosed. The point light emitting unit comprises a floating member part, a light source part, and a power supply part. The floating member includes a hollow body which has an internal space isolated from the outside so as to give buoyancy, one or more junction portions formed on an outer surface thereof, and has a light inlet opening formed on an upper part, and a string connected to a lower surface of the hollow body. The light source part is attached to the upper surface of the floating member, has an isolated internal space with light outlet openings provided at the upper and lower surfaces thereof, and a light source and a light source control circuit contained in the isolated internal space. The power supply part is located on the upper surface of the light source part and includes a solar cell. The linear light emitting unit comprises at least one optical fiber which is introduced into the hollow body through a hole formed at the junction portion, one end of which is arranged at the light inlet opening of the hollow body, and part of which extends outwards through the junction portion, and is surrounded by a transparent tube. | 12-10-2009 |
20100142178 | ORGANIC LIGHT EMITTING DIODE DISPLAY - An organic light emitting diode display includes a panel assembly having a display section and a pad section, and a bezel that couples with the panel assembly. The bezel includes a back on which the panel assembly is placed, side walls located at an edge of the back of the bezel, and a protrusion reinforcing portion formed at a region corresponding to the pad section and a vicinity of the pad section in the back of the bezel. | 06-10-2010 |
20140362889 | HEATING CONTROL METHOD AND ELECTRONIC DEVICE THEREOF - A method and apparatus for determining a control temperature to control a function of an electronic device by using an atmospheric temperature when controlling a temperature of the electronic device, and for controlling the function of the electronic device according to a control step of the determined control temperature are provided. A method of operating an electronic device includes measuring an atmospheric temperature, determining at least one control temperature corresponding to the measured atmospheric temperature, measuring an internal temperature of the electronic device, and controlling a function in accordance with the measured internal temperature of the electronic device and the determined at least one control temperature. | 12-11-2014 |
20150043364 | DYNAMIC ROUTING METHOD IN AD-HOC NETWORK AND NETWORK DEVICE THEREFOR - A dynamic routing method of a network device in an ad-hoc network is provided. The method includes (a) collecting a factor comprising at least one of the number of neighboring network devices, a moving speed and an amount of data traffic; (b) setting a routing information transmission mode based on a value of the collected factor; and (c) processing at least one of transmission and non-transmission of routing information according to the set routing information transmission mode, wherein in the step (b), when setting the routing information transmission mode, if the value of the factor is less than a preset threshold value, the routing information transmission mode is set to an active mode, and if the value of the factor exceeds the threshold, the routing information transmission mode is set to an inactive mode. | 02-12-2015 |