Patent application number | Description | Published |
20100091420 | CONTROL CIRCUIT WITH PROTECTION CIRCUIT FOR POWER SUPPLY - A control circuit with protection circuit for power supply according to the present invention comprises a peak-detection circuit and a protection circuit. The peak-detection circuit detects an AC input voltage and generates a peak-detection signal. The protection circuit generates a reset signal to reduce the output of the power supply in response to the peak-detection signal. The present invention can protect the power supply in response to the AC input voltage effectively through the peak-detection circuit. | 04-15-2010 |
20100309694 | Start-up Circuit to Discharge EMI Filter for Power Saving of Power Supplies - A start-up circuit to discharge EMI filter is developed for power saving. It includes a detection circuit detecting a power source for generating a sample signal. A sample circuit is coupled to the detection circuit for generating a reset signal in response to the sample signal. The reset signal is utilized for discharging a stored voltage of the EMI filter. | 12-09-2010 |
20110091603 | METHOD OF REDUCING THE PURINE CONTENT OF AN EDIBLE MATERIAL - Disclosed herein is a method of reducing the purine content of an edible material, including treating an edible material having a first level of purine content with a microorganism capable of digesting purine compounds, such that the thus treated edible material has a second level of purine content lower than the first level of purine content, wherein the microorganism is selected from | 04-21-2011 |
20120106205 | POWER SUPPLY WITH OPEN-LOOP PROTECTION AND SHORT-CIRCUIT PROTECTION - The power supply according to the present invention comprises a transformer, a power switch, a signal generating circuit, an on-time detection circuit, and a delay circuit. The transformer receives an input voltage and generates an output voltage. The power switch switches the transformer for regulating the output voltage. The signal generating circuit generates a switching signal for controlling switching of the power switch. The on-time detection circuit detects an on-time of the power switch and generates a short-circuit signal. The delay circuit counts to a first delay time or to a second delay time in response to a feedback signal of the power supply and the short-circuit signal to generate a turn off signal for controlling the signal generating circuit to latch the switching signal. | 05-03-2012 |
20130235627 | START-UP CIRCUIT TO DISCHARGE EMI FILTER FOR POWER SAVING OF POWER SUPPLIES - A start-up circuit to discharge EMI filter is developed for power saving. It includes a detection circuit detecting a power source for generating a sample signal. A sample circuit is coupled to the detection circuit for generating a reset signal in response to the sample signal. The reset signal is utilized for discharging a stored voltage of the EMI filter. | 09-12-2013 |
Patent application number | Description | Published |
20140043876 | ACTIVE FEEDBACK CONTROL INTEGRATED CIRCUIT APPLIED TO AN ALTERNATING CURRENT/DIRECT CURRENT CONVERTER AND OPERATION METHOD THEREOF - An active feedback control integrated circuit applied to an alternating current/direct current converter includes a feedback pin, an operation unit, a control unit, and a controlled-current generation unit. The feedback pin is used for receiving a feedback current of an output feedback unit of the alternating current/direct current converter. The operation unit is used for generating an operation signal according to the feedback current. The control unit is coupled to the operation unit for generating a current control signal. The controlled-current generation unit is coupled to the control unit for generating a controlled current to the feedback pin according to the current control signal. | 02-13-2014 |
20140098570 | CONTROLLER FOR CONTROLLING A POWER CONVERTER TO OUTPUT CONSTANT POWER AND RELATED METHOD THEREOF - A controller for controlling a power converter to output constant power includes a current sensing module, a voltage generation module, and a voltage regulation module. The current sensing module generates a sensing current according to an output current flowing through a secondary side of the power converter. The voltage generation module generates a set voltage corresponding to a reciprocal of the sensing current according to the sensing current. The voltage regulation module generates a regulation voltage to a feedback circuit of the secondary side of the power converter according to the set voltage and a sensing voltage corresponding to an output voltage of the secondary side of the power converter. The feedback circuit and a primary side of the power converter regulate the output voltage according to the regulation voltage, where a product of the output voltage and the output current is a constant value. | 04-10-2014 |
20140211511 | CONTROLLER FOR DETECTING AN OUTPUT CURRENT OF A POWER CONVERTER, DEVICE FOR DETECTING AN AVERAGE OUTPUT CURRENT OF A POWER CONVERTER, METHOD FOR DETECTING AN AVERAGE OUTPUT CURRENT OF A POWER CONVERTER, AND METHOD FOR DETECTING AN OUTPUT CURRENT OF A POWER CONVERTER - A device for detecting an average output current of a power converter includes a current generation unit, a first voltage generation unit, a first current mirror unit, and a second current mirror unit. The current generation unit generates a first charge current according to an intermediate voltage. The first voltage generation unit generates a first node voltage according to the first charge current, a first discharge current, a turning-on time, and an inverse turning-on time. The first current mirror unit generates a first current according to the first node voltage, and generates a second voltage corresponding to the average output current of a secondary side of the power converter according to the first current. The second current mirror unit generates the first discharge current according to the first current. | 07-31-2014 |
Patent application number | Description | Published |
20100032822 | CHIP PACKAGE STRUCTURE - A chip package structure including a first substrate, a chip, a second substrate, a plurality of conductive wires, a plurality of solder balls and a molding compound is provided. The chip is disposed on the first substrate. The second substrate disposed on the chip has an upper surface and a lower surface, in which a distance of the lower surface relative to the chip is smaller than that of the upper surface relative to the chip. The upper surface has a ball mounting surface and a wire bonding surface. A distance between the wire bonding surface and the first substrate is smaller than that between the ball mounting surface and the first substrate. The conductive wires connect the wire bonding surface to the first substrate. The solder balls are disposed on the ball mounting surface. The molding compound is disposed on the first substrate. | 02-11-2010 |
20110195545 | PACKAGE PROCESS - A package process is provided. The package process includes: disposing a semiconductor substrate on a carrier, wherein the semiconductor substrate has plural contacts at a side facing the carrier; thinning the semiconductor substrate from a back side of the semiconductor substrate and then forming plural through silicon vias in the thinned semiconductor substrate; forming plural first pads on the semiconductor substrate, wherein the first pads respectively connected to the through silicon vias; bonding plural chips to the semiconductor substrate, wherein the chips are electrically connected to the corresponding pads; forming a molding compound on the semiconductor substrate to cover the chips and the first pads; separating the semiconductor substrate and the carrier and then forming plural solder balls on the semiconductor substrate; and sawing the molding compound and the semiconductor substrate. | 08-11-2011 |
20140252547 | SEMICONDUCTOR DEVICE HAVING INTEGRATED PASSIVE DEVICE AND PROCESS FOR MANUFACTURING THE SAME - The present invention relates to a semiconductor device and a process for fabricating the same. In one embodiment, the semiconductor device includes a substrate and a plurality of integrated passive devices. The integrated passive devices are disposed on the substrate and include at least two capacitors which have different capacitance values. | 09-11-2014 |
Patent application number | Description | Published |
20080272486 | CHIP PACKAGE STRUCTURE - A chip package structure includes a carrier, an interposer, a plurality of electrically conductive elements, a first sealant, a chip, and a second sealant. The interposer is disposed on the carrier. The electrically conductive elements electrically connect the interposer and the carrier. The first sealant seals the electrically conductive elements. A plurality of bumps of the chip is connected to the interposer. The second sealant seals the bumps. A first glass transition temperature of the first sealant is higher than a second glass transition temperature of the second sealant. Since glass transition temperatures of the first sealant and the second sealant are different, and the first glass transition temperature of the first sealant is higher than the second glass transition temperature of the second sealant, the inner stress will be lowered and the yield is promoted. | 11-06-2008 |
20090046436 | MICRO-ELECTRO-MECHANICAL-SYSTEM PACKAGE AND METHOD FOR MANUFACTURING THE SAME - A MEMS package includes a first board, a second board and a laminate material. The first board includes a lower metallic trace, a metallic diaphragm and a through opening. The lower metallic trace is located on the lower surface of the first board, and the metallic diaphragm is disposed on the lower metallic trace. The second board includes an upper metallic trace and a metallic electrode. The upper metallic trace is located on the upper surface of the second board, the metallic electrode is disposed on the upper metallic trace, and the metallic electrode is corresponding to the metallic diaphragm. The laminate material is disposed between the lower and upper metallic traces, and includes a hollow portion for accommodating the metallic electrode and metallic diaphragm, wherein a sensing unit is formed by the metallic electrode, the hollow portion and the metallic diaphragm, and is corresponding to the through opening. | 02-19-2009 |
20090321916 | SEMICONDUCTOR STRUCTURE, METHOD FOR MANUFACTURING SEMICONDUCTOR STRUCTURE AND SEMICONDUCTOR PACKAGE - A semiconductor structure, a method for manufacturing a semiconductor structure and a semiconductor package are provided. The method for manufacturing a semiconductor structure includes the following steps. Firstly, a silicon substrate is provided. Next, a part of the silicon substrate is removed to form a ring hole and a silicon pillar surrounded by the silicon pillar. Then, a photosensitive material is disposed in the ring hole, wherein the photosensitive material is insulating. After that, the silicon pillar is removed, such that the ring hole forms a through hole and the photosensitive material covers a lateral wall of the through hole. Lastly, the conductive material is disposed in the through hole, wherein the outer surface of the conductive material is surrounded by the photosensitive material. | 12-31-2009 |
20110195568 | SEMICONDUCTOR STRUCTURE, METHOD FOR MANUFACTURING SEMICONDUCTOR STRUCTURE AND SEMICONDUCTOR PACKAGE - A semiconductor structure, a method for manufacturing a semiconductor structure and a semiconductor package are provided. The method for manufacturing a semiconductor structure includes the following steps. Firstly, a silicon substrate is provided. Next, a part of the silicon substrate is removed to form a ring hole and a silicon pillar surrounded by the silicon pillar. Then, a photosensitive material is disposed in the ring hole, wherein the photosensitive material is insulating. After that, the silicon pillar is removed, such that the ring hole forms a through hole and the photosensitive material covers a lateral wall of the through hole. Lastly, the conductive material is disposed in the through hole, wherein the outer surface of the conductive material is surrounded by the photosensitive material. | 08-11-2011 |
20120086131 | SEMICONDUCTOR ELEMENT HAVING CONDUCTIVE VIAS AND SEMICONDUCTOR PACKAGE HAVING A SEMICONDUCTOR ELEMENT WITH CONDUCTIVE VIAS AND METHOD FOR MAKING THE SAME - The present invention relates to a semiconductor element having conductive vias and a semiconductor package having a semiconductor element with conductive vias and a method for making the same. The semiconductor element having conductive vias includes a silicon substrate and at least one conductive via. The thickness of the silicon substrate is substantially in a range from 75 to 150 μm. The conductive via includes a first insulation layer and a conductive metal, and the thickness of the first insulation layer is substantially in a range from 5 to 19 μm. Using the semiconductor element and the semiconductor package of the present invention, the electrical connection between the conductive via and the other element can be ensured, and the electrical connection between the silicon substrate and the other semiconductor element can be ensured, so as to raise the yield rate of a product. Moreover, by employing the method of the present invention, warpage and shift of the silicon substrate can be avoided during the reflow process, so as to conduct the reflow process only a single time in the method of the present invention, thereby simplifying the subsequent process and reducing cost. | 04-12-2012 |