Patent application number | Description | Published |
20080238490 | SEMICONDUCTOR DEVICE AND METHOD FOR DRIVING THE SAME - A semiconductor device includes a control unit for outputting an oscillation enable signal in synchronization with transitions of an input clock and buffering the input clock to output a comparison clock corresponding to an activation timing of the oscillation enable signal. A reference frequency generating unit outputs a reference clock having a predetermined frequency based on the oscillation enable signal. First and second counting units count clocking numbers of the reference clock and the comparison clock respectively until a preset count value. A comparing unit compares the clocking number of the reference clock with that of the comparison clock to generate a comparison signal. | 10-02-2008 |
20090058510 | SEMICONDUCTOR MEMORY DEVICE - A semiconductor memory device includes a voltage detector configured to detect a voltage level of an external power supply voltage, a first core voltage generation driver configured to operate when the external power supply voltage is in a high level region and a second core voltage generation driver configured to operate when the external power supply voltage is in a low level region. | 03-05-2009 |
20090058513 | CORE VOLTAGE GENERATION CIRCUIT - A core voltage generation circuit includes a comparator configured to perform a differential comparison of a reference voltage and a feedback core voltage. An amplifier is configured to amplify the external power supply voltage in response to an output signal of the comparator to generate the core voltage. A control switch is configured to form a current path of the comparator using different switch units according to a voltage level of an external power supply voltage input to the core voltage generation circuit. | 03-05-2009 |
20090059681 | SEMICONDUCTOR MEMORY DEVICE - Semiconductor memory device includes a detection circuit configured to detect a voltage level of an external power supply voltage and a core voltage generation circuit configured to vary a voltage level of the core voltage according to an output signal of the detection circuit to generate a uniform core voltage. | 03-05-2009 |
20090121699 | BANDGAP REFERENCE VOLTAGE GENERATION CIRCUIT IN SEMICONDUCTOR MEMORY DEVICE - Bandgap reference voltage generation circuit in semiconductor memory device includes a first current generator configured to generate a first current proportional to a change of a temperature by using temperature characteristic of a diode-connected MOS transistor, a second current generator configured to generate a second current inversely proportional to the change of the temperature by using the temperature characteristic of a diode-connected MOS transistor and a summation unit configured to mirror and sum the output currents of the first current generator and the second current generator, and output a reference voltage. | 05-14-2009 |
20090167425 | SEMICONDUCTOR MEMORY DEVICE HAVING BACK-BIAS VOLTAGE IN STABLE RANGE - A back-bias voltage generating circuit controls the back-bias voltage in a predetermined range by detecting the back-bias voltage in case the back-bias voltage level decreases below a predetermined target level. The circuit includes first and second detecting units outputting respective detection signals, which detect a voltage level of the terminal based on respective higher first and lower second target levels. An oscillator generates an oscillation signal that oscillates at a predetermined frequency, in response to a detection signal of the first voltage detecting unit. A charge pumping unit drives the terminal by performing charge pumping in response to the oscillation signal. A voltage level control unit controls the voltage level of the terminal in response to the detection signals, whereby the terminal's voltage level is lower than the first target level and higher than the second target level. | 07-02-2009 |
20090168556 | SEMICONDUCTOR MEMORY DEVICE FOR GENERATING BACK-BIAS VOLTAGE WITH VARIABLE DRIVING FORCE - A semiconductor memory device is capable of maintaining a predetermined back-bias voltage level regardless of operation modes of the semiconductor memory device, by generating a back-bias voltage with driving force changed according to the operation modes. The semiconductor memory device includes an active pumping control signal generating unit for generating an active pumping control signal in response to a plurality of active signals, a voltage detecting unit for detecting a voltage level of a back-bias voltage terminal to output a detection signal, an oscillator for generating an oscillation signal oscillating at a predetermined frequency in response to the detection signal, and a charge pumping unit for performing a charge pumping operation in response to the oscillation signal by controlling a force of driving the back-bias voltage terminal in response to the active pumping control signal. | 07-02-2009 |
20090168561 | TEST ENTRY CIRCUIT AND METHOD FOR GENERATING TEST ENTRY SIGNAL - Test entry circuit and method for generating test entry signal including a first source signal generator configured to receive a test signal through a pad to generate a first mode source signal for a first test mode, a second source signal generator configured to count activation transitions of the test signal to generate a second mode source signal for a second test mode and an entry signal generator configured to receive the first and second mode source signals to generate a first test mode entry signal for entering the first test mode and a second test mode entry signal for entering the second test mode. | 07-02-2009 |
20090219080 | INTERNAL VOLTAGE GENERATION CIRCUIT - Internal voltage generation circuit including a reference oscillation signal generator for generating a reference oscillation signal according to a comparison result of a pumping voltage with a reference voltage, an oscillation signal generator for generating a plurality of oscillation signals with a predetermined phase difference and a pumping voltage generator for generating a pumping voltage through sequential charge pumping operations performed in response to the plurality of oscillation signals, respectively. | 09-03-2009 |
20100289557 | INTERNAL VOLTAGE GENERATION CIRCUIT - Internal voltage generation circuit including a reference oscillation signal generator for generating a reference oscillation signal according to a comparison result of a pumping voltage with a reference voltage, an oscillation signal generator for generating a plurality of oscillation signals with a predetermined phase difference and a pumping voltage generator for generating a pumping voltage through sequential charge pumping operations performed in response to the plurality of oscillation signals, respectively. | 11-18-2010 |