Patent application number | Description | Published |
20100201336 | Voltage mode switching regulator and control circuit and method therefor - The present invention discloses a voltage mode switching regulator with improved light load efficiency and mode transition characteristic, and a control circuit and a control method therefor. The switching regulator can switch between a pulse width modulation (PWM) mode and a pulse skipping mode. The control method for the switching regulator comprises: comparing a feedback signal relating to an output voltage with a reference signal, to generate an error amplification signal; generating a duty signal according to the error amplification signal and a ramp signal, to control the switching regulator; setting a threshold level of the error amplification signal and a threshold level of the pulse skipping mode according to the error amplification signal in a stable status; and when the error amplification signal is close or equal to the threshold level of the pulse skipping mode, generating a pulse skip signal to enter the pulse skipping mode. | 08-12-2010 |
20100301822 | Switching regulator and control circuit thereof, and method for determining on-time in switchng regulator - The present invention discloses a switching regulator and control method thereof, and a method for determining On-time in switching regulator. The switching regulator comprises: a power switch circuit including at least one power transistor switch which operates to convert an input voltage to an output voltage; a PWM generation circuit for generating a duty signal in a normal operation mode according to a feedback signal relating to the output voltage; a pulse skipping circuit for determining On-time in a pulse skipping mode according to a node with non-constant voltage level, the node being connected with the power transistor switch; and a driver circuit for driving the at least one power transistor switch according to one of the outputs from the PWM generation circuit and the pulse skipping circuit. | 12-02-2010 |
20110018514 | Dual-mode buck switching regulator and control circuit therefor - The present invention discloses a dual-mode buck switching regulator, comprising: a first power transistor having an end coupled to an input voltage and another end coupled to a common node; an inductor having an end coupled to the common node and another end coupled to the input voltage; a second power transistor having an end coupled to ground; a diode having an end coupled to ground; and a control circuit generating a first and a second switch control signals for controlling operations of the first and the second power transistors according to a feedback signal, and generating a mode selection signal according a mode control signal to select a synchronous or an asynchronous mode, wherein the second power transistor has another end which is coupled to the common node in the synchronous mode, and the diode has another end which is coupled to the common node in the asynchronous mode, and in the asynchronous mode: the another end of the second power transistor is not coupled to the common mode, or the second power transistor maintains off. The present invention also relates to a control circuit of the dual-mode buck switching regulator. | 01-27-2011 |
20110068761 | AVERAGE CURRENT REGULATOR AND DRIVER CIRCUIT THEREOF AND METHOD FOR REGULATING AVERAGE CURRENT - The present invention discloses an average current regulator, a driver circuit of an average current regulator, and a method for regulating an average current. The average current regulator includes: a power stage including at least one power transistor which switches according to a pulse width modulation (PWM) signal to convert an input voltage to an output current; a feedback circuit coupled to the power stage, for generating a feedback signal; an ON-time controller coupled to the feedback circuit, for receiving the feedback signal and generating an ON-time signal according to the feedback signal and an average reference signal relating to a target average current; and a PWM controller, for generating the PWM signal according to the ON-time signal to regulate the average of the output current to the target average current. | 03-24-2011 |
20110089854 | Circuit And Method for Controlling Light Emitting Device, And Integrated Circuit Therefor - The present invention discloses a circuit and a method for controlling a light emitting device, and an integrated circuit therefore. The circuit for controlling a light emitting device comprises: a power stage controller circuit controlling a power stage circuit to convert an input voltage to an output voltage, which is supplied to at least one light emitting device channel including at least one light emitting device; a transistor switch in the light emitting device channel; and a current source circuit controlling a current through the light emitting device channel, wherein the power stage controller circuit and the current source circuit are integrated in an integrated circuit which provides a control voltage to control a gate of the transistor switch. | 04-21-2011 |
20110109238 | Digital dimming device and digital dimming method - The present invention discloses a digital dimming device and a digital dimming method, for controlling a plurality of light emitting device channels. The method comprises: generating a corresponding plurality of driving signals to control the plurality of light emitting device channels; receiving a PWM input signal having a duty ratio, and phase shifting the PWM input signal to generate multiple PWM output signals with about the same duty ratio as the PWM input signal, but with respectively shifted phases; and enabling or disabling corresponding driving signals by the multiple PWM output signals, respectively. | 05-12-2011 |
20130038388 | AUTO-ZERO AMPLIFIER AND SENSOR MODULE USING SAME - An auto-zero amplifier is disclosed, having an amplifying circuit, a switch, and a difference signal generating circuit. The amplifying circuit receives a first input signal for generating a first output signal, and receives a second input signal for generating a second output signal. The switch is coupled between the amplifying circuit and a capacitor. The switch is conducted for charging or discharging the capacitor to a voltage with the first output signal, and the switch is not conducted for keeping the capacitor at the voltage. The difference signal generating circuit is coupled with the amplifying circuit and the capacitor for generating a difference signal of the first output signal and the second output signal, a multiple of the difference signal, a part of the difference signal, and/or a digital output value for the difference signal. | 02-14-2013 |
20130057237 | MULTI-PHASE SWITCHING REGULATOR AND DROOP CIRCUIT THEREFOR - The present invention discloses a multi-phase switching regulator and a droop circuit therefor. The droop circuit includes: multiple first resistors, which are coupled to corresponding phase nodes respectively to sense current through the phase nodes; a second resistor, which is coupled to the multiple first resistors; an error amplifier circuit, which has an inverting input end and a non-inverting input end, wherein the inverting input end is coupled to the second resistor and an output end of the error amplifier circuit, and the non-inverting input end is coupled to an output node; and a droop capacitor, which is coupled between the second resistor and the output node; wherein the droop circuit provides the droop signal according to a voltage drop across the second resistor or current through the second resistor. | 03-07-2013 |
20130113049 | FUSE CIRCUIT FOR FINAL TEST TRIMMING OF INTEGRATED CIRCUIT CHIP - The present invention discloses a fuse circuit for final test trimming of an integrated circuit (IC) chip. The fuse circuit includes at least one electrical fuse, at least one control switch corresponding to the electrical fuse, and a resistant device. The electrical fuse is connected with the control switch in series between a predetermined pin and a grounding pin. The control switch receives a control signal to determine whether a predetermined current flows through the corresponding electrical fuse and breaks the electrical fuse. The resistant device is coupled between a bulk terminal and a source terminal to increase a resistance of a parasitic channel, such that an electrostatic discharge (ESD) protection is enhanced, and errors of final test trimming of an IC chip are avoided. | 05-09-2013 |
20140055178 | ADAPTIVE PHASE-SHIFTED SYNCHRONIZATION CLOCK GENERATION CIRCUIT AND METHOD FOR GENERATING PHASE-SHIFTED SYNCHRONIZATION CLOCK - The present invention discloses an adaptive phase-shifted synchronization clock generation circuit and a method for generating phase-shifted synchronization clock. The adaptive phase-shifted synchronization clock generation circuit includes: a current source generating a current which flows through a node to generate a node voltage on the node; a reverse-proportional voltage generator coupled to the node for generating a voltage which is reverse-proportional to the node voltage; a ramp generator receiving a synchronization input signal and generating a ramp signal; a comparator comparing the reverse-proportional voltage to the ramp signal; and a pulse generator for generating a clock signal according to an output from the comparator. | 02-27-2014 |
20150069940 | MULTI-PHASE MOTOR CONTROL METHOD AND DEVICE USING THE SAME - A multi-phase motor control method controls a multi-phase motor which includes multiple nodes respectively receiving a corresponding number of driving voltage signals to control a rotation of a rotor. The motor control method includes: sensing a signal phase of a current signal corresponding to at least one node, for example by sensing a zero-crossing point of the current signal; determining a reference phase for the current signal; calculating a phase difference between the signal phase and the reference phase; and controlling a phase switching frequency of the stator according to the phase difference, such that the signal phase is close to or in phase with the reference phase, to thereby obtain an optimum rotation speed of the rotor corresponding to a given driving voltage. The present invention also provides a multi-phase motor control device using the motor control method. | 03-12-2015 |
Patent application number | Description | Published |
20100320844 | POWER OFF DELAY CIRCUIT AND METHOD, AND AUDIO SYSTEM WITH POWER OFF DELAY - A power off delay circuit includes a switch connected between an external power input terminal and an internal power supply terminal, a capacitor connected to the internal power supply terminal, and a hysteresis comparator to switch the switch according to the voltages of the external power input terminal and the internal power supply terminal. During on-time of the switch, the external power input terminal is connected to the internal power supply terminal and the capacitor can be charged by the external power source. When the switch is off, the capacitor provides electric power for an internal circuit. Application of the power off delay circuit to an audio system may eliminate the turn-off pops of the audio system. | 12-23-2010 |
20110069056 | HYSTERETIC MODE LED DRIVER WITH PRECISE AVERAGE CURRENT - A hysteretic mode LED driver for providing a driving current for an LED includes a hysteretic comparing circuit and a feedback loop. The hysteretic comparing circuit compares a driving current related sensing signal with a reference signal to control the average value of the driving current. The feedback loop senses the error between the average value of the driving current and a target value to adjust the reference signal or the offset of the hysteretic comparing circuit to adjust the average value of the driving current. | 03-24-2011 |
20110163785 | SIMPLE INTERLEAVED PHASE SHIFT CLOCK SYNCHRONIZATION FOR MASTER/SLAVE SCHEME - An apparatus for interleaved phase shift clock synchronization includes a master clock generator and at least one slave clock generator. The master clock generator provides a ramp signal or reset signal for each slave clock generator to generate a clock synchronized with the clock of the master clock generator, and the master and slave clock generators have different reference voltages for generating clocks. Therefore, the clocks generated will be synchronized and interleaved phase with each other. | 07-07-2011 |
20110260765 | PHASE INTERLEAVING CONTROL METHOD FOR A MULTI-CHANNEL REGULATOR SYSTEM - A multi-channel regulator system includes serially connected PWM integrated circuits, each of which determines a PWM signal for a respective channel to operate therewith, and individually controls its operation mode according to whether or not an external clock is detected. Therefore, each channel will not be limited to operate under a constant mode and could become a master channel or a slave channel. Additionally, each of the PWM integrated circuits generates a phase shifted synchronous clock for its next channel during it is enabled, and thus all the channels operate in a synchronous but phase interleaving manner. | 10-27-2011 |
20110261492 | PROTECTION TO AVOID ABNORMAL OPERATION CAUSED BY A SHORTED PARAMETER SETTING PIN OF AN INTEGRATED CIRCUIT - For a system to avoid abnormal operation caused by a shorted parameter setting pin of an integrated circuit, a protection apparatus and method apply a buffered reference voltage to the parameter setting pin to define an internal parameter of the integrated circuit by the buffered reference voltage and an external element connected to the parameter setting pin, and detect the rapid variation of the internal parameter to trigger a shutdown signal or slow down the speed of the variation of the internal parameter reflected to an adjustable signal of the integrated circuit. | 10-27-2011 |
20110267015 | REAL TIME ADJUSTABLE ZERO CURRENT DETECTION FOR A SWITCHING REGULATOR - A feedback loop is used to optimize a zero current threshold for a switching regulator. After the low side power switch of the switching regulator turns off, the switching node state is monitored to adjust the zero current threshold in a real time and thus the low-side power switch is prevented from turning off too early or too late. Thereby the efficiency in green mode is optimized. | 11-03-2011 |
20120025793 | OFFSET AND DELAY CANCELLATION CIRCUIT FOR A SWITCHING DC-DC POWER SUPPLY - A control circuit and method of a switching DC-DC power supply detects the error between the output voltage of the power supply and a design value of the output voltage and according to the error, determines an offset adjust signal to adjust the offset of an error comparator of the power supply to pull the output voltage toward the design value. | 02-02-2012 |
20120217941 | CONTROL CIRCUIT AND METHOD FOR A RIPPLE REGULATOR SYSTEM - A control circuit and method for a ripple regulator system generate a ripple signal in-phase and synchronous with an inductor current of the ripple regulator system, and extract a ripple information proportional to the amplitude of the ripple signal. The ripple signal is used for triggering control in PWM signal generation to make the ripple regulator system have small ripples and better loop stability simultaneously. The ripple information is used to improve the output offset of the ripple regulator system that is caused by the ripple signal. | 08-30-2012 |
20130342183 | SWITCHING REGULATOR CONTROL CIRCUIT WITH MULTIPLE CLOCK FREQUENCY SETTING MODES - A control circuit of a switching regulator includes a control pin for coupling with an external resistor; a resistor detecting circuit for detecting a resistance of the external resistor; a current generating module for generating a corresponding control current according to a detection result of the resistor detecting circuit; an oscillating circuit for generating a clock signal; and a mode-switching circuit. When the mode-switching circuit configures the oscillating circuit to operate in a resistor-controlled mode, the oscillating circuit generates the clock signal according to the control current so that the clock signal has a frequency corresponding to the resistance of the external resistor. When the mode-switching circuit configures the oscillating circuit to operate in a signal-controlled mode, the oscillating circuit generates the clock signal according to an external synchronous signal coupled with the control pin so that the clock signal is synchronized with the external synchronous signal. | 12-26-2013 |
Patent application number | Description | Published |
20080211581 | Amplifier circuit with internal zeros - An amplifier circuit with internal zeros provides a second pole in addition to a first pole and two zeros such that the second pole can prevent excessive gain at high frequency, so as to have high-frequency noise under control. | 09-04-2008 |
20090015069 | Mutual blanking for a multi-channel converter - A shutter circuit is provided for a multi-channel converter to blank the switching noise produced by the switching of the converter. The shutter circuit monitors the switching of the switches in the output stages of the converter, and when one channel performs switching, the shutter circuit will send a signal to other channels to block the current sensors thereof. The current sensors are so blocked for a period not to sense the switching noise. The mutual interference between the channels due to the switching noise of the converter is eliminated. | 01-15-2009 |
20090066399 | Level shift circuit - A level shift circuit includes an input stage and an output stage coupled to each other by two nodes. The input stage changes the voltages on the nodes according to an input signal, and the output stage determines an output signal according to the voltages on the two nodes. In a transition state, the input stage provides a large current to charge or discharge the first node or the second node so as to quickly change the voltage thereon. In a steady state, the input stage lowers the current so as to reduce power consumption. | 03-12-2009 |
20100026256 | Switching regulator and control method thereof - A switching regulator may operate in a synchronous mode or an asynchronous mode. When the load current is higher than a threshold, the switching regulator switches a pair of serially connected high side and low side switches with a pulse width modulation signal. When the load current is lower than the threshold, the pulse width modulation signal is blocked not to switch the low side switch, the switching regulator switches only the high side switch with the pulse width modulation signal, the low side switch remains off, and a diode serially connected to the high side switch acts as a rectifier. | 02-04-2010 |
20100033152 | PWM power converter using a multi-slope ramp signal to improve the transient response thereof - A ramp generator is provided to provide a multi-slope ramp signal for a PWM power converter. The ramp generator determines the slope turning points for the multi-slope ramp signal according to the error signal of the PWM power converter and thereby improve the transient response of the PWM power converter. Preferably, the slope turning point of the multi-slope ramp signal varies with the average of the error signal and is thus adaptive to the error signal and thereby the load condition. | 02-11-2010 |
20140139043 | Power Off Delay Circuit and Method, and Audio System with Power Off Delay - A power off delay circuit includes a switch connected between an external power input terminal and an internal power supply terminal, a capacitor connected to the internal power supply terminal, and a hysteresis comparator to switch the switch according to the voltages of the external power input terminal and the internal power supply terminal. During on-time of the switch, the external power input terminal is connected to the internal power supply terminal and the capacitor can be charged by the external power source. When the switch is off, the capacitor provides electric power for an internal circuit. Application of the power off delay circuit to an audio system may eliminate the turn-off pops of the audio system. | 05-22-2014 |