Patent application number | Description | Published |
20100085030 | Semiconductor Device and RFID Tag Using the Semiconductor Device - A semiconductor device monitors a voltage between a reference potential and an input potential and obtains a constant output potential regardless of a value of the voltage, after the voltage exceeds a predetermined threshold voltage in such a manner that the semiconductor device divides a voltage between the reference potential and the input potential using a plurality of first non-linear elements and at least one linear element to constantly generate a first bias voltage regardless of a value of the voltage, divides a voltage between the reference potential and the input potential using a plurality of second non-linear elements with reference to the first bias voltage to constantly generate a second bias voltage regardless of a value of the voltage, and determines the output potential with reference to the second bias voltage. | 04-08-2010 |
20100181985 | Regulator Circuit and RFID Tag Including the Same - One object of the present invention is to provide a regulator circuit with an improved noise margin. In a regulator circuit including a bias circuit generating a reference voltage on the basis of the potential difference between a first power supply terminal and a second power supply terminal, and a voltage regulator outputting a potential to an output terminal on the basis of a reference potential input from the bias circuit, a bypass capacitor is provided between a power supply terminal and a node to which a gate of a transistor included in the bias circuit is connected. | 07-22-2010 |
20110025287 | REGULATOR CIRCUIT - An object of the present invention is to reduce variations in the value of the output potential VDD of a regulator circuit including a bias circuit referring threshold voltage. The regulator circuit includes a bias circuit referring threshold voltage, an error amplifier, an output control circuit, and a feedback voltage divider. Further, the regulator circuit uses an n-type transistor and p-type transistor which offer small variations in the value obtained by Vthn+|Vthp|. The feedback voltage divider includes a diode-connected p-type transistor. The increase in the threshold voltage Vthn of n-type transistors leads to the increase in the threshold voltage Vthp of the p-type transistor. Therefore, the on resistance of the p-type transistor is reduced. As a result, the fluctuations in the output potential VDD is suppressed. | 02-03-2011 |
20110133706 | DC CONVERTER CIRCUIT AND POWER SUPPLY CIRCUIT - A DC converter circuit having high reliability is provided. The DC converter circuit includes: an inductor configured to generate electromotive force in accordance with a change in flowing current; a transistor including a gate, a source, and a drain, which is configured to control generation of the electromotive force in the inductor by being on or off; a rectifier in a conducting state when the transistor is off; and a control circuit configured to control on and off of the transistor. The transistor includes an oxide semiconductor layer whose hydrogen concentration is less than or equal to 5×10 | 06-09-2011 |
20110156028 | SEMICONDUCTOR DEVICE - The semiconductor device includes a source line, a bit line, a signal line, a word line, memory cells connected in parallel between the source line and the bit line, a first driver circuit electrically connected to the source line and the bit line through switching elements, a second driver circuit electrically connected to the source line through a switching element, a third driver circuit electrically connected to the signal line, and a fourth driver circuit electrically connected to the word line. The memory cell includes a first transistor including a first gate electrode, a first source electrode, and a first drain electrode, a second transistor including a second gate electrode, a second source electrode, and a second drain electrode, and a capacitor. The second transistor includes an oxide semiconductor material. | 06-30-2011 |
20110198593 | SEMICONDUCTOR DEVICE - A semiconductor device with a novel structure in which stored data can be held even when power is not supplied and there is no limitation on the number of times of writing. In the semiconductor device, a plurality of memory cells each including a first transistor, a second transistor, and a capacitor is provided in matrix and a wiring (also called a bit line) for connecting one memory cell to another memory cell and a source or drain electrode of the first transistor are electrically connected to each other through a source or drain electrode of the second transistor. Accordingly, the number of wirings can be smaller than that in the case where the source or drain electrode of the first transistor and the source or drain electrode of the second transistor are connected to different wirings. Thus, the degree of integration of the semiconductor device can be increased. | 08-18-2011 |
20110199807 | SEMICONDUCTOR DEVICE AND METHOD FOR DRIVING THE SAME - A semiconductor device includes a first signal line, a second signal line, a memory cell, and a potential converter circuit. The memory cell includes a first transistor including a first gate electrode, a first source electrode, a first drain electrode, and a first channel formation region; a second transistor including a second gate electrode, a second source electrode, a second drain electrode, and a second channel formation region; and a capacitor. The first channel formation region and the second channel formation region include different semiconductor materials. The second drain electrode, one electrode of the capacitor, and the first gate electrode are electrically connected to one another. The second gate electrode is electrically connected to the potential converter circuit through the second signal line. | 08-18-2011 |
20110199816 | SEMICONDUCTOR DEVICE AND DRIVING METHOD OF THE SAME - An object is to provide a semiconductor device with a novel structure in which stored data can be held even when power is not supplied, and the number of times of writing is not limited. The semiconductor device is formed using a wide gap semiconductor and includes a potential change circuit which selectively applies a potential either equal to or different from a potential of a bit line to a source line. Thus, power consumption of the semiconductor device can be sufficiently reduced. | 08-18-2011 |
20110205775 | SEMICONDUCTOR DEVICE - An object is to provide a semiconductor device with a novel structure, which can hold stored data even when not powered and which has an unlimited number of write cycles. A semiconductor device is formed using a material capable of sufficiently reducing the off-state current of a transistor, such as an oxide semiconductor material that is a widegap semiconductor. The use of a semiconductor material capable of sufficiently reducing the off-state current of a transistor allows data to be held for a long time. In addition, the timing of potential change in a signal line is delayed relative to the timing of potential change in a write word line. This makes it possible to prevent a data writing error. | 08-25-2011 |
20110205785 | SEMICONDUCTOR DEVICE AND DRIVING METHOD OF SEMICONDUCTOR DEVICE - An object is to provide a semiconductor device with a novel structure, which can hold stored data even when not powered and which has an unlimited number of write cycles. A semiconductor device includes a memory cell including a widegap semiconductor, for example, an oxide semiconductor and the semiconductor device includes a potential conversion circuit which functions to output a potential lower than a reference potential for reading data from the memory cell. With the use of a widegap semiconductor, a semiconductor device capable of sufficiently reducing the off-state current of a transistor included in a memory cell and capable of holding data for a long time can be provided. | 08-25-2011 |
20110227072 | SEMICONDUCTOR DEVICE - A semiconductor device including a nonvolatile memory cell including a writing transistor which includes an oxide semiconductor, a reading transistor which includes a semiconductor material different from that of the writing transistor, and a capacitor is provided. Data is written to the memory cell by turning on the writing transistor and supplying a potential to a node where a source electrode (or a drain electrode) of the writing transistor, one electrode of the capacitor, and a gate electrode of the reading transistor are electrically connected to each other, and then turning off the writing transistor so that a predetermined amount of charge is held at the node. Further, when a p-channel transistor is used as the reading transistor, a reading potential is a positive potential. | 09-22-2011 |
20130256771 | SEMICONDUCTOR DEVICE - The semiconductor device includes a source line, a bit line, a signal line, a word line, memory cells connected in parallel between the source line and the bit line, a first driver circuit electrically connected to the source line and the bit line through switching elements, a second driver circuit electrically connected to the source line through a switching element, a third driver circuit electrically connected to the signal line, and a fourth driver circuit electrically connected to the word line. The memory cell includes a first transistor including a first gate electrode, a first source electrode, and a first drain electrode, a second transistor including a second gate electrode, a second source electrode, and a second drain electrode, and a capacitor. The second transistor includes an oxide semiconductor material. | 10-03-2013 |
20130335056 | Regulator Circuit and RFID Tag Including the Same - One object of the present invention is to provide a regulator circuit with an improved noise margin. In a regulator circuit including a bias circuit generating a reference voltage on the basis of the potential difference between a first power supply terminal and a second power supply terminal, and a voltage regulator outputting a potential to an output terminal on the basis of a reference potential input from the bias circuit, a bypass capacitor is provided between a power supply terminal and a node to which a gate of a transistor included in the bias circuit is connected. | 12-19-2013 |
20150108959 | DC CONVERTER CIRCUIT AND POWER SUPPLY CIRCUIT - A DC converter circuit having high reliability is provided. The DC converter circuit includes: an inductor configured to generate electromotive force in accordance with a change in flowing current; a transistor including a gate, a source, and a drain, which is configured to control generation of the electromotive force in the inductor by being on or off; a rectifier in a conducting state when the transistor is off; and a control circuit configured to control on and off of the transistor. The transistor includes an oxide semiconductor layer whose hydrogen concentration is less than or equal to 5×10 | 04-23-2015 |
20150294693 | SEMICONDUCTOR DEVICE AND ELECTRONIC DEVICE - Provided is a semiconductor device which can achieve a reduction in its area, reduction in power consumption, and operation at a high speed. A semiconductor device | 10-15-2015 |
20150310906 | SEMICONDUCTOR DEVICE, ELECTRONIC COMPONENT, AND ELECTRONIC DEVICE - A highly reliable semiconductor device. In a configuration where a precharged source line is discharged to a bit line by establishing electrical continuity between the source line and the bit line through a transistor to read a potential retained at a gate of the transistor, the potential of the bit line is switched in accordance with a change in potential of the source line due to the discharge. With this configuration, the voltage between the source and drain of the transistor can be kept lower than a predetermined voltage by discharge. Accordingly, the source-drain voltage of the transistor can be kept lower than its breakdown voltage, so that the semiconductor device can have high reliability. | 10-29-2015 |
20150380450 | IMAGING DEVICE AND ELECTRONIC DEVICE - An imaging device with high productivity and improved dynamic range is provided. The imaging device includes a pixel driver circuit and a photoelectric conversion element including a p-type semiconductor, an n-type semiconductor, and an i-type semiconductor. In a plan view, the total area of a part of the i-type semiconductor overlapped with neither a metal material nor a semiconductor material constituting the pixel driver circuit is preferably greater than or equal to 65%, more preferably greater than or equal to 80%, and still more preferably greater than or equal to 90% of the area of the whole i-type semiconductor. Plural photoelectric conversion elements are provided in the same semiconductor, whereby a process for separating the photoelectric conversion elements can be omitted. The i-type semiconductors in the plural photoelectric conversion elements are separated from each other by the p-type semiconductor or the n-type semiconductor. | 12-31-2015 |
20160027784 | SEMICONDUCTOR DEVICE - The semiconductor device includes a source line, a bit line, a signal line, a word line, memory cells connected in parallel between the source line and the bit line, a first driver circuit electrically connected to the source line and the bit line through switching elements, a second driver circuit electrically connected to the source line through a switching element, a third driver circuit electrically connected to the signal line, and a fourth driver circuit electrically connected to the word line. The memory cell includes a first transistor including a first gate electrode, a first source electrode, and a first drain electrode, a second transistor including a second gate electrode, a second source electrode, and a second drain electrode, and a capacitor. The second transistor includes an oxide semiconductor material. | 01-28-2016 |
20160064383 | SEMICONDUCTOR DEVICE - A semiconductor device with a novel structure in which stored data can be held even when power is not supplied and there is no limitation on the number of times of writing. In the semiconductor device, a plurality of memory cells each including a first transistor, a second transistor, and a capacitor is provided in matrix and a wiring (also called a bit line) for connecting one memory cell to another memory cell and a source or drain electrode of the first transistor are electrically connected to each other through a source or drain electrode of the second transistor. Accordingly, the number of wirings can be smaller than that in the case where the source or drain electrode of the first transistor and the source or drain electrode of the second transistor are connected to different wirings. Thus, the degree of integration of the semiconductor device can be increased. | 03-03-2016 |
20160064443 | IMAGING DEVICE AND ELECTRONIC DEVICE - An imaging device capable of obtaining high-quality imaging data is provided. The imaging device includes a first circuit and a second circuit. The first circuit includes a photoelectric conversion element, a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a sixth transistor, a seventh transistor, a first capacitor, a second capacitor, and a third capacitor. The second circuit includes an eighth transistor. Variation in threshold voltage of an amplifier transistor (the fifth transistor) included in the first circuit can be compensated. | 03-03-2016 |
20160064444 | IMAGING DEVICE AND ELECTRONIC DEVICE - An imaging device capable of obtaining high-quality imaging data is provided. The imaging device includes a first circuit, a second circuit and a third circuit. The first circuit includes a photoelectric conversion element, a plurality of transistors including an amplifier transistor, and a plurality of capacitors. The second circuit includes a transistor. The third circuit includes a resistor and a transistor for controlling a current flowing in the resistor. The output signal of the imaging device is determined in accordance with the current flowing in the resistor. Variations in electrical characteristics of the amplifier transistor included in the first circuit can be compensated. | 03-03-2016 |
Patent application number | Description | Published |
20110175107 | SILICON CARBIDE SUBSTRATE - A base portion is made of silicon carbide and has a main surface. At least one silicon carbide layer is provided on the main surface of the base portion in a manner exposing a region of the main surface along an outer edge of the main surface. At least one protection layer is provided on this region of the main surface of the base portion along the outer edge of the main surface. Thus, a silicon carbide substrate can be polished with high in-plane uniformity. | 07-21-2011 |
20110175108 | LIGHT-EMITTING DEVICE - A silicon carbide substrate has a first layer facing a semiconductor layer and a second layer stacked on the first layer. Dislocation density of the second layer is higher than dislocation density of the first layer. Thus, quantum efficiency and power efficiency of a light-emitting device can both be high. | 07-21-2011 |
20110198027 | METHOD FOR MANUFACTURING SILICON CARBIDE SUBSTRATE - A base portion and first and second silicon carbide substrates are disposed in a processing chamber such that a first side surface of a first silicon carbide substrate and a side surface of a second silicon carbide substrate face each other. The processing chamber has an inner surface at least a portion of which is covered with an absorbing portion including Ta atoms and C atoms. In order to connect the first and second side surfaces to each other, a temperature in the processing chamber is increased to reach or exceed a temperature at which silicon carbide can sublime. In the step of increasing the temperature, at least a portion of the absorbing portion is carbonized. | 08-18-2011 |
20110233561 | SEMICONDUCTOR SUBSTRATE - A supporting portion is made of silicon carbide. At least one layer has first and second surfaces. The first surface is supported by the supporting portion. The at least one layer has first and second regions. The first region is made of silicon carbide of a single-crystal structure. The second region is made of graphite. The second surface has a surface formed by the first region. The first surface has a surface formed by the first region, and a surface formed by the second region. In this way, a semiconductor substrate can be provided which has a region made of silicon carbide having a single-crystal structure and a supporting portion made of silicon carbide and allows for reduced electric resistance of an interface therebetween. | 09-29-2011 |
20110262680 | SILICON CARBIDE SUBSTRATE AND METHOD FOR MANUFACTURING SILICON CARBIDE SUBSTRATE - A sublimation preventing layer is formed to cover a first region of a main surface of a material substrate. First and second single-crystal layers are arranged on the material substrate such that a gap between first and second side surfaces is located over the sublimation preventing layer. The material substrate and the first and second single-crystal layers are heated to sublimate silicon carbide from a second region of the main surface and recrystallize the sublimated silicon carbide on the first backside surface of the first single-crystal layer and the second backside surface of the second single-crystal layer, thereby forming a base substrate connected to each of the first and second backside surfaces. This can prevent formation of voids in a silicon carbide substrate having such a plurality of single-crystal layers. | 10-27-2011 |
20110262681 | SILICON CARBIDE SUBSTRATE AND METHOD FOR MANUFACTURING SILICON CARBIDE SUBSTRATE - A carbon layer is formed on a first region of a main surface of a material substrate. On the material substrate, first and second single-crystal layers are arranged such that each of a first backside surface of the first single-crystal layer and a second backside surface of the second single-crystal layer has a portion facing a second region of the main surface of the material substrate and such that a gap between a first side surface of the first single-crystal layer and a second side surface of the second single-crystal layer is located over the carbon layer. By heating the material substrate and the first and second single-crystal layers, a base substrate connected to each of the first and second backside surfaces is formed. In this way, voids can be prevented from being formed in the silicon carbide substrate having such a plurality of single-crystal layers. | 10-27-2011 |
20110272087 | METHOD FOR MANUFACTURING SILICON CARBIDE SUBSTRATE - Upon arranging a base portion and first and second silicon carbide layers such that each of a first backside surface of the first silicon carbide layer and a second backside surface of the second silicon carbide layer faces a first main surface of the base portion, at least one of the first and second silicon carbide layers is partially projected as a projection to outside the first main surface when viewed in a planar view. Each of the first and second backside surfaces and the first main surface are connected to each other by heating. This heating carbonizes at least a part of the projection, thereby forming a carbonized portion. When removing the projection, the carbonized portion is processed. In this way, the planar shape of a silicon carbide substrate can be readily adjusted. | 11-10-2011 |
20110275224 | METHOD FOR MANUFACTURING SILICON CARBIDE SUBSTRATE - A material substrate is prepared which has a first surface and a second surface opposite to each other in a thickness direction and is made of silicon carbide. The material substrate is partially carbonized to divide the material substrate into a carbonized portion made of a material obtained by carbonizing silicon carbide, and a silicon carbide portion made of silicon carbide. This step of partially carbonizing the material substrate is performed to partially carbonize the second surface. In order to adjust a shape of the material substrate when viewed in a planar view, a portion of the material substrate is removed. This step of removing the portion of the material substrate includes the step of processing the carbonized portion. Accordingly, a silicon carbide substrate having a desired planar shape can be obtained readily. | 11-10-2011 |
20110278593 | METHOD FOR MANUFACTURING SILICON CARBIDE SUBSTRATE, METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE, SILICON CARBIDE SUBSTRATE, AND SEMICONDUCTOR DEVICE - A method for manufacturing a silicon carbide substrate includes the steps of: preparing a SiC substrate made of single-crystal silicon carbide; disposing a base substrate in a crucible so as to face a main surface of the SiC substrate; and forming a base layer made of silicon carbide in contact with the main surface of the SiC substrate, by heating the base substrate in the crucible to fall within a range of temperature higher than a sublimation temperature of silicon carbide constituting the base substrate. In the step of forming the base layer, a gas containing silicon is introduced into the crucible. | 11-17-2011 |
20110278594 | METHOD FOR MANUFACTURING SILICON CARBIDE SUBSTRATE, METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE, SILICON CARBIDE SUBSTRATE, AND SEMICONDUCTOR DEVICE - A method for manufacturing a silicon carbide substrate includes the steps of: preparing a SiC substrate made of single-crystal silicon carbide; disposing a base substrate in a crucible so as to face a main surface of the SiC substrate; and forming a base layer made of silicon carbide in contact with the main surface of the SiC substrate by heating the base substrate in the crucible to fall within a range of temperature equal to or higher than a sublimation temperature of silicon carbide constituting the base substrate. The crucible has an inner wall at least a portion of which is provided with a coating layer made of silicon carbide. | 11-17-2011 |
20110278595 | METHOD FOR MANUFACTURING SILICON CARBIDE SUBSTRATE, METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE, SILICON CARBIDE SUBSTRATE, AND SEMICONDUCTOR DEVICE - A method for manufacturing a silicon carbide substrate includes the steps of: preparing a base substrate made of silicon carbide and a SiC substrate made of single-crystal silicon carbide; fabricating a stacked substrate by placing said SiC substrate on and in contact with a main surface of said base substrate; and connecting said base substrate and said SiC substrate to each other by heating said stacked substrate in a container to fall within a range of temperature equal to or greater than a sublimation temperature of silicon carbide constituting said base substrate. In the step of connecting said base substrate and said SiC substrate, a silicon carbide body made of silicon carbide and different from said base substrate and said SiC substrate is disposed in said container. | 11-17-2011 |
20120126251 | METHOD FOR MANUFACTURING SILICON CARBIDE SUBSTRATE, METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE, SILICON CARBIDE SUBSTRATE, AND SEMICONDUCTOR DEVICE - A method for manufacturing a silicon carbide substrate achieves reduced manufacturing cost. The method includes the steps of: preparing a base substrate and a SiC substrate; fabricating a stacked substrate by stacking the base substrate and the SiC substrate; fabricating a connected substrate by heating the stacked substrate; transferring a void, formed at a connection interface, in a thickness direction of the connected substrate by heating the connected substrate to cause the base substrate to have a temperature higher than that of the SiC substrate; and removing the void by removing a region including a main surface of the base substrate opposite to the SiC substrate. | 05-24-2012 |
20120161157 | SILICON CARBIDE SUBSTRATE - A silicon carbide substrate, which achieves restrained warpage even when a different-type material layer made of a material other than silicon carbide, includes: a base layer made of silicon carbide; and a plurality of SiC layers arranged side by side on the base layer when viewed in a planar view and each made of single-crystal silicon carbide. A gap is formed between end surfaces of adjacent SiC layers. | 06-28-2012 |
20120161158 | COMBINED SUBSTRATE HAVING SILICON CARBIDE SUBSTRATE - A first silicon carbide substrate has a first backside surface connected to a supporting portion, a first front-side surface opposite to the first backside surface, and a first side surface connecting the first backside surface and the first front-side surface to each other. A second silicon carbide substrate has a second backside surface connected to the supporting portion, a second front-side surface opposite to the second backside surface, and a second side surface connecting the second backside surface and the second front-side surface to each other and forming a gap between the first side surface and the second side surface. A closing portion closes the gap. Thereby, foreign matters can be prevented from remaining in a gap between a plurality of silicon carbide substrates provided in a combined substrate. | 06-28-2012 |
20120184113 | METHOD AND DEVICE FOR MANUFACTURING SILICON CARBIDE SUBSTRATE - A step of preparing a stack is performed to position each single-crystal substrate in a first single-crystal substrate group and a first base substrate face to face with each other, position each single-crystal substrate in a second single-crystal substrate group and a second base substrate face to face with each other, and stack the first single-crystal substrate group, the first base substrate, an insertion portion, the second single-crystal substrate group, and the second base substrate in one direction in this order. Next, the stack is heated so as to allow a temperature of the stack to reach a temperature at which silicon carbide can sublime and so as to form a temperature gradient in the stack with the temperature thereof getting increased in the above-described direction. In this way, silicon carbide substrates can be manufactured efficiently. | 07-19-2012 |
20120241741 | SILICON CARBIDE SUBSTRATE - A first single crystal substrate has a first side surface and it is composed of silicon carbide. A second single crystal substrate has a second side surface opposed to the first side surface and it is composed of silicon carbide. A bonding portion connects the first and second side surfaces to each other between the first and second side surfaces, and it is composed of silicon carbide. At least a part of the bonding portion has polycrystalline structure. Thus, a large-sized silicon carbide substrate allowing manufacturing of a semiconductor device with high yield can be provided. | 09-27-2012 |
20120244307 | SILICON CARBIDE SUBSTRATE - A silicon carbide substrate includes: a base substrate having a diameter of 70 mm or greater; and a plurality of SiC substrates made of single-crystal silicon carbide and arranged side by side on the base substrate when viewed in a planar view. In other words, the plurality of SiC substrates are arranged side by side on and along the main surface of the base substrate. Further, each of the SiC substrates has a main surface opposite to the base substrate and having an off angle of 20° or smaller relative to a {0001} plane. | 09-27-2012 |
20120273800 | COMPOSITE SUBSTRATE HAVING SINGLE-CRYSTAL SILICON CARBIDE SUBSTRATE - A first vertex of a first single-crystal silicon carbide substrate and a second vertex of a second single-crystal silicon carbide substrate abut each other such that a first side of the first single-crystal silicon carbide substrate and a second side of the second single-crystal silicon carbide substrate are aligned. In addition, at least a part of the first side and at least a part of the second side abut on a third side of a third single-crystal silicon carbide substrate. Thus, in manufacturing a semiconductor device including a composite substrate, process fluctuations caused by a gap between the single-crystal silicon carbide substrates can be suppressed. | 11-01-2012 |
20120276715 | METHOD FOR MANUFACTURING COMBINED SUBSTRATE HAVING SILICON CARBIDE SUBSTRATE - A connected substrate having a supporting portion and first and second silicon carbide substrates is prepared. The first silicon carbide substrate has a first backside surface connected to the supporting portion, a first front-side surface, and a first side surface connecting the first backside surface and the first front-side surface to each other. The second silicon carbide substrate has a second backside surface connected to the supporting portion, a second front-side surface, and a second side surface connecting the second backside surface and the second front-side surface to each other and forming a gap between the first side surface and the second side surface. A filling portion for filling the gap is formed. Then, the first and second front-side surfaces are polished. Then, the filling portion is removed. Then, a closing portion for closing the gap is formed. | 11-01-2012 |
20120295112 | SILICON CARBIDE POWDER AND METHOD FOR PRODUCING SILICON CARBIDE POWDER - There are provided a silicon carbide powder for silicon carbide crystal growth and a method for producing the silicon carbide powder. The silicon carbide powder is formed by heating a mixture of a silicon small piece and a carbon powder and thereafter pulverizing the mixture, and is substantially composed of silicon carbide. | 11-22-2012 |
20130026497 | SILICON CARBIDE SUBSTRATE MANUFACTURING METHOD AND SILICON CARBIDE SUBSTRATE - Silicon carbide single crystal is prepared. Using the silicon carbide single crystal as a material, a silicon carbide substrate having a first face and a second face located at a side opposite to the first face is formed. In the formation of the silicon carbide substrate, a first processed damage layer and a second processed damage layer are formed at the first face and second face, respectively. The first face is polished such that at least a portion of the first processed damage layer is removed and the surface roughness of the first face becomes less than or equal to 5 nm. At least a portion of the second processed damage layer is removed while maintaining the surface roughness of the second plane greater than or equal to 10 nm. | 01-31-2013 |
20130061801 | METHOD FOR MANUFACTURING SILICON CARBIDE CRYSTAL - Provided is a method for manufacturing a silicon carbide crystal, including the steps of: placing a seed substrate and a source material for the silicon carbide crystal within a growth container; and growing the silicon carbide crystal with a diameter of more than 4 inches on a surface of the seed substrate by a sublimation method, in the step of growing, a pressure within the growth container being changed from a predetermined pressure, at a predetermined change rate. | 03-14-2013 |
20130239881 | METHOD AND DEVICE FOR MANUFACTURING SILICON CARBIDE SINGLE-CRYSTAL - A method for manufacturing a silicon carbide single-crystal having a diameter of more than 100 mm and a maximum height of 20 mm or more using a sublimation method includes the following steps. That is, there are prepared a seed substrate made of silicon carbide and a silicon carbide source material. By sublimating the silicon carbide source material, the silicon carbide single-crystal is grown on a growth surface of the seed substrate. In the step of growing the silicon carbide single-crystal, a first carbon member provided at a position facing a side wall of the seed substrate is etched at a rate of 0.1 mm/hour or less. By suppressing a change in growth condition for the silicon carbide single-crystal in the crucible, there can be provided a method for manufacturing a silicon carbide single-crystal so as to stably grow the silicon carbide single-crystal. | 09-19-2013 |
20130255568 | METHOD FOR MANUFACTURING SILICON CARBIDE SINGLE CRYSTAL - A method for manufacturing silicon carbide single crystal having a diameter larger than 100 mm by sublimation includes the following steps. A seed substrate made of silicon carbide and silicon carbide raw material are prepared. Silicon carbide single crystal is grown on the growth face of the seed substrate by sublimating the silicon carbide raw material. In the step of growing silicon carbide single crystal, the maximum growing rate of the silicon carbide single crystal growing on the growth face of the seed substrate is greater than the maximum growing rate of the silicon carbide crystal growing on the surface of the silicon carbide raw material. Thus, there can be provided a method for manufacturing silicon carbide single crystal allowing a thick silicon carbide single crystal film to be obtained, when silicon carbide single crystal having a diameter larger than 100 mm is grown. | 10-03-2013 |
Patent application number | Description | Published |
20110224457 | PROCESS FOR PRODUCING ORGANOLITHIUM COMPOUND AND PROCESS FOR PRODUCING SUBSTITUTED AROMATIC COMPOUND - A method for producing an organolithium compound includes the step of reacting an aromatic compound or a halogenated unsaturated aliphatic compound and a lithiating agent in the presence of a coordinating compound containing three or more elements having a coordinating ability in a molecule, at least one thereof being a nitrogen element, or a coordinating compound containing three or more oxygen elements having a coordinating ability in a molecule, at least one of the groups containing the oxygen elements having a coordinating ability being a tertiary alkoxy group, at a temperature of −40° C. to 40° C. | 09-15-2011 |
20130005981 | PROCESS FOR PREPARATION OF t-BUTOXYCARBONYLAMINE COMPOUNDS - Provided is a process for the preparation of t-butoxycarbonylamine compounds, which comprises using phosgene or a phosgene equivalent, t-butanol, and an organic base. Even when applied to a primary or secondary amine compound having low nucleophilicity, the process enables highly selective preparation of a t-butoxycarbonylamine compound at a low cost. In the process, a t-butoxycarbonylamine compound is prepared using: phosgene or a phosgene equivalent; t-butanol; an organic base; and either a primary or secondary amine compound or a primary or secondary ammonium salt. | 01-03-2013 |
20130023664 | NITROGEN-CONTAINING HETEROCYCLIC COMPOUND AND METHOD FOR PRODUCING SAME - There are provided a nitrogen-containing heterocyclic compound such as a substituted amino-pyridine-N-oxide compound represented by formula (1), which is useful as a synthetic intermediate for an agrochemical and the like; and a method for producing the nitrogen-containing heterocyclic compound. (In formula (1), R | 01-24-2013 |
20140155616 | NITROGEN-CONTAINING HETEROCYCLIC COMPOUND AND METHOD FOR PRODUCING SAME - There are provided a nitrogen-containing heterocyclic compound such as a substituted amino-pyridine-N-oxide compound represented by formula (1), which is useful as a synthetic intermediate for an agrochemical and the like; and a method for producing the nitrogen-containing heterocyclic compound. (In formula (1), R | 06-05-2014 |
20140163235 | NITROGEN-CONTAINING HETEROCYCLIC COMPOUND AND METHOD FOR PRODUCING SAME - There are provided a nitrogen-containing heterocyclic compound such as a substituted amino-pyridine-N-oxide compound represented by formula (1), which is useful as a synthetic intermediate for an agrochemical and the like; and a method for producing the nitrogen-containing heterocyclic compound. (In formula (1), R | 06-12-2014 |
20140171651 | NITROGEN-CONTAINING HETEROCYCLIC COMPOUND AND METHOD FOR PRODUCING SAME - There are provided a nitrogen-containing heterocyclic compound such as a substituted amino-pyridine-N-oxide compound represented by formula (1), which is useful as a synthetic intermediate for an agrochemical and the like; and a method for producing the nitrogen-containing heterocyclic compound. (In formula (1), R | 06-19-2014 |
20140194629 | NITROGEN-CONTAINING HETEROCYCLIC COMPOUND AND METHOD FOR PRODUCING SAME - There are provided a nitrogen-containing heterocyclic compound such as a substituted amino-pyridine-N-oxide compound represented by formula (1), which is useful as a synthetic intermediate for an agrochemical and the like; and a method for producing the nitrogen-containing heterocyclic compound. (In formula (1), R | 07-10-2014 |
20150025276 | PROCESS FOR PRODUCING ORGANOLITHIUM COMPOUND AND PROCESS FOR PRODUCING SUBSTITUTED AROMATIC COMPOUND - A method for producing an organolithium compound includes the step of reacting an aromatic compound or a halogenated unsaturated aliphatic compound and a lithiating agent in the presence of a coordinating compound containing three or more elements having a coordinating ability in a molecule, at least one thereof being a nitrogen element, or a coordinating compound containing three or more oxygen elements having a coordinating ability in a molecule, at least one of the groups containing the oxygen elements having a coordinating ability being a tertiary alkoxy group, at a temperature of −40° C. to 40° C. | 01-22-2015 |
20150329472 | HALOGENATED ANILINE AND METHOD FOR PRODUCING SAME - The present invention provides a halogenated aniline represented by formula (I) (wherein each of X | 11-19-2015 |
Patent application number | Description | Published |
20110255325 | SEMICONDUCTOR DEVICE - An object is to provide a semiconductor device having a novel structure, which can hold stored data even when not powered and which has an unlimited number of write cycles. A semiconductor device includes a memory cell including a widegap semiconductor, for example, an oxide semiconductor. The memory cell includes a writing transistor, a reading transistor, and a selecting transistor. Using a widegap semiconductor, a semiconductor device capable of sufficiently reducing the off-state current of a transistor included in a memory cell and holding data for a long time can be provided. | 10-20-2011 |
20110280061 | SEMICONDUCTOR DEVICE - A semiconductor device includes a plurality of memory cells including a first transistor and a second transistor, a reading circuit including an amplifier circuit and a switch element, and a refresh control circuit. A first channel formation region and a second channel formation region contain different materials as their respective main components. A first gate electrode is electrically connected to one of a second source electrode and a second drain electrode. The other of the second source electrode and the second drain electrode is electrically connected to one of input terminals of the amplifier circuit. An output terminal of the amplifier circuit is connected to the other of the second source electrode and the second drain electrode through the switch element. The refresh control circuit is configured to control whether the switch element is turned on or off. | 11-17-2011 |
20120012845 | SEMICONDUCTOR DEVICE - A semiconductor device with a novel structure is provided, which can hold stored data even when no power is supplied and which has no limitations on the number of writing operations. A semiconductor device is formed using a material which enables off-state current of a transistor to be reduced significantly; e.g., an oxide semiconductor material which is a wide-gap semiconductor. With use of a semiconductor material which enables off-state current of a transistor to be reduced significantly, the semiconductor device can hold data for a long period. In a semiconductor device with a memory cell array, parasitic capacitances generated in the nodes of the first to the m-th memory cells connected in series are substantially equal, whereby the semiconductor device can operate stably. | 01-19-2012 |
20120014157 | SEMICONDUCTOR DEVICE - A plurality of memory cells included in a memory cell array are divided into a plurality of blocks every plural rows. A common bit line is electrically connected to the divided bit lines through selection transistors in the blocks. One of the memory cells includes a first transistor, a second transistor, and a capacitor. The first transistor includes a first channel formation region. The second transistor includes a second channel formation region. The first channel formation region includes a semiconductor material different from the semiconductor material of the second channel formation region. | 01-19-2012 |
20120033484 | SEMICONDUCTOR DEVICE AND DRIVING METHOD THEREOF - The semiconductor device is formed using a material which allows a sufficient reduction in off-state current of a transistor; for example, an oxide semiconductor material, which is a wide gap semiconductor, is used. When a semiconductor material which allows a sufficient reduction in off-state current of a transistor is used, the semiconductor device can hold data for a long period. In addition, the timing of potential change in a signal line is delayed relative to the timing of potential change in a write word line. This makes it possible to prevent a data writing error. | 02-09-2012 |
20120033485 | SEMICONDUCTOR DEVICE - In a semiconductor device which includes a bit line, m (m is a natural number of 3 or more) word lines, a source line, m signal lines, first to m-th memory cells, and a driver circuit, the memory cell includes a first transistor and a second transistor for storing electrical charge accumulated in a capacitor, and the second transistor includes a channel formed in an oxide semiconductor layer. In the semiconductor device, the driver circuit generates a signal to be output to a (j−1)th (j is a natural number of 3 or more) signal line with the use of a signal to be output to a j-th signal line. | 02-09-2012 |
20120033486 | SEMICONDUCTOR DEVICE AND METHOD FOR DRIVING SEMICONDUCTOR DEVICE - It is an object to provide a semiconductor device with a novel structure in which stored data can be held even when power is not supplied, and does not have a limitation on the number of writing operations. A semiconductor device includes a plurality of memory cells each including a transistor including a first semiconductor material, a transistor including a second semiconductor material that is different from the first semiconductor material, and a capacitor, and a potential switching circuit having a function of supplying a power supply potential to a source line in a writing period. Thus, power consumption of the semiconductor device can be sufficiently suppressed. | 02-09-2012 |
20120033487 | SEMICONDUCTOR DEVICE AND DRIVING METHOD THEREOF - A semiconductor device including a nonvolatile memory cell in which a writing transistor which includes an oxide semiconductor, a reading transistor which includes a semiconductor material different from that of the writing transistor, and a capacitor are included is provided. Data is written to the memory cell by turning on the writing transistor and applying a potential to a node where a source electrode (or a drain electrode) of the writing transistor, one electrode of the capacitor, and a gate electrode of the reading transistor are electrically connected, and then turning off the writing transistor, so that the predetermined amount of charge is held in the node. Further, when a p-channel transistor is used as the reading transistor, a reading potential is a positive potential. | 02-09-2012 |
20120033510 | SEMICONDUCTOR DEVICE - An object is to provide a semiconductor device with a novel structure, which can hold stored data even when power is not supplied and which has an unlimited number of write cycles. The semiconductor device is formed using a memory cell including a wide band gap semiconductor such as an oxide semiconductor. The semiconductor device includes a potential change circuit having a function of outputting a potential lower than a reference potential for reading data from the memory cell. When the wide band gap semiconductor which allows a sufficient reduction in of state current of a transistor included in the memory cell is used, a semiconductor device which can hold data for a long period can be provided. | 02-09-2012 |
20120056647 | SEMICONDUCTOR DEVICE AND DRIVING METHOD THEREOF - The semiconductor device includes a memory cell including a first transistor including a first channel formation region, a first gate electrode, and first source and drain regions; a second transistor including a second channel formation region provided so as to overlap with at least part of either of the first source region or the first drain region, a second source electrode, a second drain electrode electrically connected to the first gate electrode, and a second gate electrode; and an insulating layer provided between the first transistor and the second transistor. In a period during which the second transistor needs in an off state, at least when a positive potential is supplied to the first source region or the first drain region, a negative potential is supplied to the second gate electrode. | 03-08-2012 |
20120063205 | SEMICONDUCTOR DEVICE - A semiconductor device in which stored data can be held even when power is not supplied and there is no limitation on the number of writing operations is provided. A semiconductor device is formed using a material which can sufficiently reduce the off-state current of a transistor, such as an oxide semiconductor material that is a wide-gap semiconductor. When a semiconductor material which can sufficiently reduce the off-state current of a transistor is used, the semiconductor device can hold data for a long period. In addition, by providing a capacitor or a noise removal circuit electrically connected to a write word line, a signal such as a short pulse or a noise input to a memory cell can be reduced or removed. Accordingly, a malfunction in which data written into the memory cell is erased when a transistor in the memory cell is instantaneously turned on can be prevented. | 03-15-2012 |
20120294061 | WORD LINE DIVIDER AND STORAGE DEVICE - A word line divider which has a simplified circuit structure and can operate stably is provided. A storage device which has a simplified circuit structure and can operate stably is provided. A transistor whose leakage current is extremely low is connected in series with a portion between a word line and a sub word line so that the word line divider is constituted. The transistor can include an oxide semiconductor for a semiconductor layer in which a channel is formed. Such a word line divider whose circuit structure is simplified is used in the storage device. | 11-22-2012 |
20120294070 | METHOD FOR DRIVING SEMICONDUCTOR DEVICE - A semiconductor device includes a nonvolatile memory cell including a writing transistor including an oxide semiconductor, a reading transistor including a semiconductor material different from that of the writing transistor, and a capacitor. Data is written to the memory cell by turning on the writing transistor so that a potential is supplied to a node where a source electrode of the writing transistor, one electrode of the capacitor, and a gate electrode of the reading transistor are electrically connected, and then turning off the writing transistor so that a predetermined potential is held in the node. Data is read out from the memory cell by supplying a precharge potential to a bit line, stopping the supply of the potential to the bit line, and determining whether the potential of the bit line is kept at the precharge potential or decreased. | 11-22-2012 |
20130162306 | METHOD FOR DRIVING SEMICONDUCTOR DEVICE - Provided is a method for driving a semiconductor device, which allows a reduction in scale of a circuit, reduce the power consumption, and increase the speed of reading data. An H level (data “1”) potential or an L level (data “0”) potential is written to a node of a memory cell. Potentials of a source line and a bit line are set to the same potential at an M level (L level06-27-2013 | |
20130181216 | SEMICONDUCTOR DEVICE - A semiconductor device includes a plurality of memory cells including a first transistor and a second transistor, a reading circuit including an amplifier circuit and a switch element, and a refresh control circuit. A first channel formation region and a second channel formation region contain different materials as their respective main components. A first gate electrode is electrically connected to one of a second source electrode and a second drain electrode. The other of the second source electrode and the second drain electrode is electrically connected to one of input terminals of the amplifier circuit. An output terminal of the amplifier circuit is connected to the other of the second source electrode and the second drain electrode through the switch element. The refresh control circuit is configured to control whether the switch element is turned on or off. | 07-18-2013 |
20130228838 | SEMICONDUCTOR DEVICE AND DRIVING METHOD THEREOF - A semiconductor device including a nonvolatile memory cell in which a writing transistor which includes an oxide semiconductor, a reading transistor which includes a semiconductor material different from that of the writing transistor, and a capacitor are included is provided. Data is written to the memory cell by turning on the writing transistor and applying a potential to a node where a source electrode (or a drain electrode) of the writing transistor, one electrode of the capacitor, and a gate electrode of the reading transistor are electrically connected, and then turning off the writing transistor, so that the predetermined amount of charge is held in the node. Further, when a p-channel transistor is used as the reading transistor, a reading potential is a positive potential. | 09-05-2013 |
20130301367 | SEMICONDUCTOR DEVICE - An object is to provide a semiconductor device with a novel structure, which can hold stored data even when power is not supplied and which has an unlimited number of write cycles. The semiconductor device is formed using a memory cell including a wide band gap semiconductor such as an oxide semiconductor. The semiconductor device includes a potential change circuit having a function of outputting a potential lower than a reference potential for reading data from the memory cell. When the wide band gap semiconductor which allows a sufficient reduction in off-state current of a transistor included in the memory cell is used, a semiconductor device which can hold data for a long period can be provided. | 11-14-2013 |
20140027882 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE - In a semiconductor device including a digital circuit portion and an analog circuit portion having a capacitor portion provided over a substrate, the capacitor portion is provided with a first wiring, a second wiring and a plurality of blocks each having a plurality of capacitor elements. Further, each the plurality of capacitor elements provided in each block has a semiconductor film having a first impurity region and a plurality of second impurity regions provided apart with the first impurity region interposed therebetween, and a conductive film provided over the first impurity region with an insulating film therebetween. A capacitor is formed from the first impurity region, the insulating film, and the conductive film. | 01-30-2014 |
20140264521 | SEMICONDUCTOR DEVICE - A semiconductor device in which stored data can be held even when power is not supplied and there is no limitation on the number of writing operations is provided. A semiconductor device is formed using a material which can sufficiently reduce the off-state current of a transistor, such as an oxide semiconductor material that is a wide-gap semiconductor. When a semiconductor material which can sufficiently reduce the off-state current of a transistor is used, the semiconductor device can hold data for a long period. In addition, by providing a capacitor or a noise removal circuit electrically connected to a write word line, a signal such as a short pulse or a noise input to a memory cell can be reduced or removed. Accordingly, a malfunction in which data written into the memory cell is erased when a transistor in the memory cell is instantaneously turned on can be prevented. | 09-18-2014 |
20140266379 | SEMICONDUCTOR DEVICE - A sample-and-hold circuit including a transistor and a capacitor is connected to the differential circuit. The sample-and-hold circuit acquires voltage for correcting the offset voltage of the differential circuit by charging or discharging the capacitor through sampling operation. Then, it holds the potential of the capacitor through holding operation. In normal operation of the differential circuit, the output potential of the differential circuit is corrected by the potential held by the capacitor. The transistor in the sample-and-hold circuit is preferably a transistor whose channel is formed using an oxide semiconductor. An oxide semiconductor transistor has extremely low leakage current; thus, a change in the potential held in the capacitor of the sample-and-hold circuit can be minimized. | 09-18-2014 |
20140269063 | METHOD FOR DRIVING SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE - To read multilevel data from a memory cell having a transistor using silicon and a transistor using an oxide semiconductor, without switching a signal for reading the multilevel data in accordance with the number of the levels of the multilevel data. The electrical charge of a bit line is discharged, the potential of the bit line is charged via a transistor for writing data, and the potential of the bit line which is changed by the charging is read as multilevel data. With such a structure, the potential corresponding to data held in a gate of the transistor can be read by only one-time switching of a signal for reading data. | 09-18-2014 |
20140269099 | METHOD FOR DRIVING SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE - To read multilevel data from a memory cell having a transistor using silicon and a transistor using an oxide semiconductor, without switching a signal for reading the multilevel data in accordance with the number of the levels of the multilevel data. The potential of the bit line is precharged, the electrical charge of the bit line is discharged via a transistor for writing data, and the potential of the bit line which is changed by the discharging is read as multilevel data. With such a structure, the potential corresponding to data held in a gate of the transistor can be read by only one-time switching of a signal for reading data. | 09-18-2014 |
20140355339 | DRIVING METHOD OF SEMICONDUCTOR DEVICE - In a memory cell including first to third transistors, the potential of a bit line is set to VDD or GND when data is written through the first transistor. In a standby period, the potential of the bit line is set to GND. In reading operation, the bit line is brought into a floating state at GND, and a source line is set to a potential VDD−α, consequently, the third transistor is turned on. Then, the potential of the source line is output according to the potential of a gate of the second transistor. Note that α is set so that the second transistor is surely off even when the potential of the gate of the second transistor becomes lower from VDD by ΔV in the standby period. That is, Vth+ΔV<α is satisfied where Vth is the threshold value of the second transistor. | 12-04-2014 |
20150155289 | SEMICONDUCTOR DEVICE AND DRIVING METHOD THEREOF - A semiconductor device including a nonvolatile memory cell in which a writing transistor which includes an oxide semiconductor, a reading transistor which includes a semiconductor material different from that of the writing transistor, and a capacitor are included is provided. Data is written to the memory cell by turning on the writing transistor and applying a potential to a node where a source electrode (or a drain electrode) of the writing transistor, one electrode of the capacitor, and a gate electrode of the reading transistor are electrically connected, and then turning off the writing transistor, so that the predetermined amount of charge is held in the node. Further, when a p-channel transistor is used as the reading transistor, a reading potential is a positive potential. | 06-04-2015 |
20150311323 | SEMICONDUCTOR DEVICE AND DRIVING METHOD THEREOF - A semiconductor device including a nonvolatile memory cell in which a writing transistor which includes an oxide semiconductor, a reading transistor which includes a semiconductor material different from that of the writing transistor, and a capacitor are included is provided. Data is written to the memory cell by turning on the writing transistor and applying a potential to a node where a source electrode (or a drain electrode) of the writing transistor, one electrode of the capacitor, and a gate electrode of the reading transistor are electrically connected, and then turning off the writing transistor, so that the predetermined amount of charge is held in the node. Further, when a p-channel transistor is used as the reading transistor, a reading potential is a positive potential. | 10-29-2015 |