Patent application number | Description | Published |
20100073137 | SEMICONDUCTOR DEVICE - To provide a semiconductor device which can transmit/receive data to/from a reader/writer without interruption of operation by the reader/writer or the like. A semiconductor device capable of wireless communication includes an antenna circuit, a first demodulation signal generation circuit which demodulates a signal whose modulation factor is from 95% to 100%, both inclusive, a second demodulation signal generation circuit which demodulates a signal whose modulation factor is from 95% and 100%, both inclusive and from 10% and 30%, both inclusive and a logic circuit which selects one of a demodulation signal from the first circuit and a demodulation signal from the second circuit. When the antenna circuit receives an electromagnetic wave, the logic circuit selects the demodulation signal from the second circuit, and when the antenna circuit transmits an electromagnetic wave, the logic circuit selects the demodulation signal from the first circuit. | 03-25-2010 |
20100083207 | System for Designing Functional Circuit and Method for Designing Functional Circuit - A hierarchizing means | 04-01-2010 |
20110055463 | SEMICONDUCTOR DEVICE AND DRIVING METHOD THE SAME - It is an object to prevent miswriting by radio in a relatively easy way in a semiconductor device which is capable of data communication (reception/transmission) through wireless communication, in particular, in an RFID tag provided with an OTP memory or a write-once memory. Alternatively, it is an object to prevent data from being tampered. Further alternatively, it is an object to inhibit access to a memory in a relatively easy way and to inhibit reading of data in a semiconductor device which is capable of data communication (reception/transmission) through wireless communication. In a semiconductor device including a control circuit and an OTP memory, a memory includes at least a sector for preventing additional writing and an information sector. When data for preventing additional writing is written to the sector for preventing additional writing and information is written to the information sector which is electrically connected to the sector for preventing additional writing, additional writing to the information sector to which the information is written is impossible. | 03-03-2011 |
20110079650 | SEMICONDUCTOR DEVICE HAVING WIRELESS COMMUNICATION FUNCTION - A semiconductor device includes a memory portion, a logic portion, and a plurality of signal lines for electrically connecting the memory portion and the logic portion. In the case where a transfer rate between the semiconductor device and a communication device is α [bps], a first clock frequency generated in the logic portion is Kα [Hz] (K is an integer of 1 or more), the number of reading signal lines of the plurality of signal lines is n (n is an integer of 2 or more), and a second clock frequency generated in the logic portion is Lα/n [Hz] (L is any integer satisfying L/n04-07-2011 | |
20110102018 | LOGIC CIRCUIT AND SEMICONDUCTOR DEVICE - In a logic circuit where clock gating is performed, the standby power is reduced or malfunction is suppressed. The logic circuit includes a transistor which is in an off state where a potential difference exists between a source terminal and a drain terminal over a period during which a clock signal is not supplied. A channel formation region of the transistor is formed using an oxide semiconductor in which the hydrogen concentration is reduced. Specifically, the hydrogen concentration of the oxide semiconductor is 5x10 | 05-05-2011 |
20120287703 | SEMICONDUCTOR DEVICE - When a CPU provided with a latch memory is operated, a constant storage method or an end storage method is selected depending on what is processed by the CPU; thus, the CPU provided with a latch memory has low power consumption. When the CPU provided with a latch memory is operated, in the case where the number of times of turning on and off the power source is high, a constant storage method is employed and in the case where the number of times of turning on and off the power source is low, an end storage method is employed. Whether a constant storage method or an end storage method is selected is determined based on the threshold value set depending on power consumption. | 11-15-2012 |
20130002326 | LOGIC CIRCUIT AND SEMICONDUCTOR DEVICE - In a logic circuit where clock gating is performed, the standby power is reduced or malfunction is suppressed. The logic circuit includes a transistor which is in an off state where a potential difference exists between a source terminal and a drain terminal over a period during which a clock signal is not supplied. A channel formation region of the transistor is formed using an oxide semiconductor in which the hydrogen concentration is reduced. Specifically, the hydrogen concentration of the oxide semiconductor is 5×10 | 01-03-2013 |
20130147518 | LOGIC CIRCUIT AND SEMICONDUCTOR DEVICE - In a logic circuit where clock gating is performed, the standby power is reduced or malfunction is suppressed. The logic circuit includes a transistor which is in an off state where a potential difference exists between a source terminal and a drain terminal over a period during which a clock signal is not supplied. A channel formation region of the transistor is formed using an oxide semiconductor in which the hydrogen concentration is reduced. Specifically, the hydrogen concentration of the oxide semiconductor is 5×10 | 06-13-2013 |
Patent application number | Description | Published |
20110315780 | SEMICONDUCTOR DEVICE AND WIRELESS COMMUNICATION SYSTEM USING THE SAME - Initialization of a semiconductor device can be efficiently performed, which transmits and receives data through wireless communication. The semiconductor device includes an antenna, a power source circuit, a circuit which uses a DC voltage generated by the power source circuit as a power source voltage, and a resistor. The antenna includes a pair of terminals and receives a wireless signal (a modulated carrier wave). The power source circuit includes a first terminal and a second terminal and generates a DC voltage between the first terminal and the second terminal by using a received wireless signal (the modulated carrier wave). The resistor is connected between the first terminal and the second terminal. In this manner, the semiconductor device and the wireless communication system can transmit and receive data accurately. | 12-29-2011 |
20120195115 | SEMICONDUCTOR DEVICE - A first field-effect transistor provided over a substrate in which an insulating region is provided over a first semiconductor region and a second semiconductor region is provided over the insulating region; an insulating layer provided over the substrate; a second field-effect transistor that is provided one flat surface of the insulating layer and includes an oxide semiconductor layer; and a control terminal are provided. The control terminal is formed in the same step as a source and a drain of the second field-effect transistor, and a voltage for controlling a threshold voltage of the first field-effect transistor is supplied to the control terminal. | 08-02-2012 |
20120243340 | SIGNAL PROCESSING CIRCUIT - To provide a signal processing circuit including a nonvolatile memory circuit with a novel structure, the signal processing circuit includes an arithmetic portion, a memory, and a control portion for controlling the arithmetic portion and the memory. The control portion includes a set of a volatile memory circuit and a first nonvolatile memory circuit for storing data held in the volatile memory circuit, the memory includes a plurality of second nonvolatile memory circuits, and the first nonvolatile memory circuit and the second nonvolatile memory circuit each include a transistor having a channel in an oxide semiconductor layer and a capacitor in which one of a pair of electrodes is electrically connected to a node which is set in a floating state when the transistor is turned off. | 09-27-2012 |
20120262983 | SEMICONDUCTOR DEVICE AND DRIVING METHOD THEREOF - The circuit includes a first wiring for supplying a power supply potential to a signal processing circuit, a transistor for controlling electrical connection between the first wiring and a second wiring for supplying the a power supply potential, and a transistor for determining whether or not the first wiring is grounded. At least one of the two transistors is a transistor whose channel is formed in the oxide semiconductor layer. This makes it possible to reduce power consumption due to cutoff current of at least one of the two transistors. | 10-18-2012 |
20120268164 | PROGRAMMABLE LSI - A low-power programmable LSI that can perform dynamic configuration is provided. The programmable LSI includes a plurality of logic elements. The plurality of logic elements each include a configuration memory. Each of the plurality of logic elements performs different arithmetic processing and changes an electrical connection between the logic elements, in accordance with the configuration data stored in the configuration memory. The configuration memory includes a set of a volatile storage circuit and a nonvolatile storage circuit. The nonvolatile storage circuit includes a transistor whose channel is formed in an oxide semiconductor layer and a capacitor whose one of a pair of electrodes is electrically connected to a node that is set in a floating state when the transistor is turned off. | 10-25-2012 |
20120274379 | SEMICONDUCTOR STORAGE DEVICE - A semiconductor storage device which stops and resumes the supply of power supply voltage without the necessity of saving and returning a data signal between a volatile storage device and a nonvolatile storage device is provided. In the nonvolatile semiconductor storage device, the volatile storage device and the nonvolatile storage device are provided without separation. Specifically, in the semiconductor storage device, data is held in a data holding portion connected to a transistor including a semiconductor layer containing an oxide semiconductor and a capacitor. The potential of the data held in the data holding portion is controlled by a data potential holding circuit and a data potential control circuit. The data potential holding circuit can output data without leaking electric charge, and the data potential control circuit can control the potential of the data held in the data holding portion without leaking electric charge by capacitive coupling through the capacitor. | 11-01-2012 |
20120281469 | SEMICONDUCTOR DEVICE - Noise generated on a word line is reduced without increasing a load on the word line. A semiconductor device is provided in which a plurality of storage elements each including at least one switching element are provided in matrix; each of the plurality of storage elements is electrically connected to a word line and a bit line; the word line is connected to a gate (or a source and a drain) of a transistor in which minority carriers do not exist substantially; and capacitance of the transistor in which minority carriers do not exist substantially can be controlled by controlling a potential of a source and a drain (or a gate) the transistor in which minority carriers do not exist substantially. The transistor in which minority carriers do not exist substantially may include a wide band gap semiconductor. | 11-08-2012 |
20120292613 | SEMICONDUCTOR DEVICE - The data in a volatile memory may conventionally be lost even in case of a very short time power down or supply voltage drop such as an outage or sag. In view of the foregoing, an object is to extend data retention time even with a volatile memory for high-speed data processing. Data retention time can be extended by backing up the data content stored in the volatile memory in a memory including a capacitor and an oxide semiconductor transistor. | 11-22-2012 |
20120293201 | SEMICONDUCTOR DEVICE - An object is to provide a semiconductor device that can maintain the connection relation between logic circuit units or the circuit configuration of each of the logic circuit units even after supply of power supply voltage is stopped. Another object is to provide a semiconductor device in which the connection relation between logic circuit units or the circuit configuration of each of the logic circuit units can be changed at high speed. In a reconfigurable circuit, an oxide semiconductor is used for a semiconductor element that stores data on the circuit configuration, connection relation, or the like. Specifically, the oxide semiconductor is used for a channel formation region of the semiconductor element. | 11-22-2012 |
20120294060 | SEMICONDUCTOR DEVICE - A semiconductor device capable of assessing and rewriting data at a desired timing is provided. A semiconductor device includes a register circuit, a bit line, and a data line. The register circuit includes a flip-flop circuit, a selection circuit, and a nonvolatile memory circuit electrically connected to the flip-flop circuit through the selection circuit. The data line is electrically connected to the flip-flop circuit. The bit line is electrically connected to the nonvolatile memory circuit through the selection circuit. The selection circuit selectively stores data based on a potential of the data line or a potential of the bit line in the nonvolatile memory circuit. | 11-22-2012 |
20120294067 | SEMICONDUCTOR DEVICE AND METHOD FOR DRIVING THE SAME - In a semiconductor device performing pipeline processing with the use of a reading portion reading an instruction and an arithmetic portion performing an operation in accordance with the instruction, the instruction held in the reading portion is transmitted from the flip-flop to the memory when branch prediction turns out to be wrong. Note that the arithmetic portion controls transmission and reception of the instruction between the flip-flop and the memory which are included in the reading portion. This enables elimination of redundant operations in the reading portion in the case where an instruction read by the reading portion after the branch prediction turns out to be wrong is a subroutine, or the like. That is, the instruction held in the memory is transmitted back to the flip-flop without rereading of the same instruction by the reading portion, whereby the instruction can be output to the arithmetic portion. | 11-22-2012 |
20120294069 | SIGNAL PROCESSING CIRCUIT - A signal processing circuit includes a memory and a control portion configured to control the memory. The control portion includes a volatile memory circuit including data latch terminals, a first non-volatile memory circuit electrically connected to one of the data latch terminals, a second non-volatile memory circuit electrically connected to the other of the data latch terminals, and a precharge circuit having a function of supplying a potential that is a half of a high power supply potential to the one and the other of the data latch terminals. Each of the first non-volatile memory circuit and the second non-volatile memory circuit includes a transistor having a channel formation region including an oxide semiconductor and a capacitor connected to a node that is brought into a floating state by turning off the transistor. | 11-22-2012 |
20120311365 | PROGRAMMABLE LOGIC DEVICE - An object is to provide a programmable logic device configured to keep a connection state of logic circuits even while power supply voltage is stopped. The programmable logic device includes arithmetic circuits each of whose logic state can be changed; a configuration changing circuit changing the logic states of the arithmetic circuits; a power supply control circuit controlling supply of power supply voltage to the arithmetic circuits; a state memory circuit storing data on the logic states and data on states of the power supply voltage of the arithmetic circuits; and an arithmetic state control circuit controlling the configuration changing circuit and the power supply control circuit in accordance with the data stored in the state memory circuit. A transistor in which a channel formation region is formed in an oxide semiconductor layer is provided between the configuration changing circuit and each of the arithmetic circuits. | 12-06-2012 |
20120313762 | Communication Method and Communication System - A command sequence is restarted from the middle even when supply of power supply voltage to an internal circuit in a wireless tag is temporarily stopped (a power flicker occurs). A register or a cache memory included in a signal processing circuit in the wireless tag continues to retain data even after the supply of power supply voltage is stopped. After the power flicker occurs, the signal processing circuit in the wireless tag is returned to the state before the supply of power supply voltage is stopped and can restart signal processing. Consequently, the command sequence can be restarted from the middle. | 12-13-2012 |
20130322187 | SEMICONDUCTOR DEVICE AND PROCESSING UNIT - A semiconductor device in which the power consumption of a register is low is provided. Further, a processing unit whose operation speed is high and whose power consumption is low is provided. In the semiconductor device, a register operating at high speed and a nonvolatile FILO (first-in-last-out) register capable of reading and writing data from/to the register are provided. | 12-05-2013 |
20140068300 | MICROCONTROLLER - To provide a microcontroller that can operate in a low power consumption mode. The microcontroller includes a CPU, a memory, and a peripheral circuit such as a timer circuit. A register of the peripheral circuit is formed at an interface with a bus line. A power gate is provided for control of power supply, and the microcontroller can operate in the low power consumption mode where some circuits alone are active, in addition to in a normal operation mode where all circuits are active. A register with no power supply in the low power consumption mode, such as a register of the CPU, includes a volatile memory and a nonvolatile memory. | 03-06-2014 |
20140108836 | MICROCONTROLLER AND METHOD FOR MANUFACTURING THE SAME - A microcontroller which operates in a low power consumption mode is provided. A microcontroller includes a CPU, a memory, and a peripheral circuit such as a timer circuit. A register in the peripheral circuit is provided in an interface with a bus line. A power gate for controlling supply control is provided. The microcontroller can operate not only in a normal operation mode where all circuits are active, but also in a low power consumption mode where some of the circuits are active. A volatile memory and nonvolatile memory are provided in a register, such as a register of the CPU. Data in the volatile memory is backed up in the nonvolatile memory before the power supply is stopped. In the case where the operation mode returns to the normal mode, when power supply is started again, data in the nonvolatile memory is written back into the volatile memory. | 04-17-2014 |
20140121787 | CENTRAL CONTROL SYSTEM - Provided is a structure which is capable of central control of an electric device and a sensor device and a structure which can reduce power consumption of an electric device and a sensor device. A central control system includes at least a central control device, an output unit, and an electric device or a sensor device. The central control device performs arithmetic processing on information transmitted from the electric device or the sensor device and makes the output unit output information obtained by the arithmetic processing. It is possible to know the state of the electric device or the sensor device even apart from the electric device or the sensor device. The electric device or the sensor device includes a transistor which includes an activation layer using a semiconductor with the band gap wider than that of single crystal silicon. | 05-01-2014 |
20140247650 | SIGNAL PROCESSING CIRCUIT - To provide a signal processing circuit including a nonvolatile memory circuit with a novel structure, the signal processing circuit includes an arithmetic portion, a memory, and a control portion for controlling the arithmetic portion and the memory. The control portion includes a set of a volatile memory circuit and a first nonvolatile memory circuit for storing data held in the volatile memory circuit, the memory includes a plurality of second nonvolatile memory circuits, and the first nonvolatile memory circuit and the second nonvolatile memory circuit each include a transistor having a channel in an oxide semiconductor layer and a capacitor in which one of a pair of electrodes is electrically connected to a node which is set in a floating state when the transistor is turned off. | 09-04-2014 |
20140340127 | SEMICONDUCTOR DEVICE - A semiconductor device with short overhead time. The semiconductor device includes a first wiring supplied with a power supply potential, a second wiring, a switch for controlling electrical connection between the first wiring and the second wiring, a load electrically connected to the second wiring, a transistor whose source and drain are electrically connected to the second wiring, and a power management unit having functions of controlling the conduction state of the switch and controlling a gate potential of the transistor. A channel formation region of the transistor is included in an oxide semiconductor film. | 11-20-2014 |
20140367681 | SEMICONDUCTOR DEVICE - The data in a volatile memory may conventionally be lost even in case of a very short time power down or supply voltage drop such as an outage or sag. In view of the foregoing, an object is to extend data retention time even with a volatile memory for high-speed data processing. Data retention time can be extended by backing up the data content stored in the volatile memory in a memory including a capacitor and an oxide semiconductor transistor. | 12-18-2014 |
20150129873 | SEMICONDUCTOR DEVICE - A first field-effect transistor provided over a substrate in which an insulating region is provided over a first semiconductor region and a second semiconductor region is provided over the insulating region; an insulating layer provided over the substrate; a second field-effect transistor that is provided one flat surface of the insulating layer and includes an oxide semiconductor layer; and a control terminal are provided. The control terminal is formed in the same step as a source and a drain of the second field-effect transistor, and a voltage for controlling a threshold voltage of the first field-effect transistor is supplied to the control terminal. | 05-14-2015 |
20150263728 | Semiconductor Device - A dynamic logic circuit in which the number of elements is reduced, the layout area is reduced, the power loss is reduced, and the power consumption is reduced is provided. A semiconductor device including a dynamic logic circuit includes a first transistor in which a channel is formed in silicon and a second transistor in which a channel is formed in an oxide semiconductor. Here, a structure in which the second transistor is provided over the first transistor can be employed. A structure in which an insulating film is provided over the first transistor, and the second transistor is provided over the insulating film can be employed. A structure in which a top surface of the insulating film is planarized can be employed. A structure in which the second transistor has a region overlapping with the first transistor can be employed. | 09-17-2015 |
20150311886 | SEMICONDUCTOR DEVICE AND DRIVING METHOD THEREOF - The circuit includes a first wiring for supplying a power supply potential to a signal processing circuit, a transistor for controlling electrical connection between the first wiring and a second wiring for supplying the a power supply potential, and a transistor for determining whether or not the first wiring is grounded. At least one of the two transistors is a transistor whose channel is formed in the oxide semiconductor layer. This makes it possible to reduce power consumption due to cutoff current of at least one of the two transistors. | 10-29-2015 |
20150381169 | SEMICONDUCTOR DEVICE AND DRIVING METHOD THEREOF - A novel semiconductor device and a driving method thereof are provided. In the semiconductor device, a (volatile) node which holds data that is rewritten by arithmetic processing as appropriate and a node in which the data is stored are electrically connected through a source and a drain of a transistor whose channel is formed in an oxide semiconductor layer. The off-state current value of the transistor is extremely low. Therefore, electric charge scarcely leaks through the transistor from the latter node, and thus data can be held in the latter node even in a period during which supply of power source voltage is stopped. In the semiconductor device, a means of setting the potential of the latter node to a predetermined potential is provided. Specifically, a means of supplying a potential corresponding to “1” or “0” that is data stored in the latter node from the former node is provided. | 12-31-2015 |
20160027809 | SEMICONDUCTOR DEVICE - A semiconductor device capable of retaining data for a long time is provided. The semiconductor device includes first to third transistors, a fourth transistor including first and second gates, first to third nodes, a capacitor, and an input terminal. A source of the first transistor is connected to the input terminal. A drain of the first transistor and a source of the second transistor are connected to the first node. A gate of the second transistor, a drain of the second transistor, and a source of the third transistor are connected to the second node. A gate of the third transistor, a drain of the third transistor, the capacitor, and the second gate of the fourth transistor are connected to the third node. | 01-28-2016 |
20160054362 | SEMICONDUCTOR DEVICE AND METHOD FOR MEASURING CURRENT OF SEMICONDUCTOR DEVICE - A current measurement method with which an extremely low current can be measured is provided. In the method, a charge written to a first terminal of a capacitor through a transistor under test is retained, data on the correspondence between a potential V of the first terminal of the capacitor and Time t is generated, and a stretched exponential function represented by Formula (a1) is fitted to the data to determine parameters of Formula (a1). The derivative of Formula (a1) with respect to time gives a stretched exponential function describing an off-state current of the transistor under test. The potential of the first terminal of the capacitor is measured using an on-state current of a transistor whose gate is connected to the first terminal of the capacitor. | 02-25-2016 |
20160071463 | Semiconductor Device, Driver IC, Display Device, and Electronic Device - A semiconductor device including a test circuit is miniaturized. The semiconductor device includes r first input terminals (r is an integer of 2 or more), a second input terminal, r functional circuits, a demultiplexer, and a switch circuit. The demultiplexer is a pass transistor logic circuit. R output terminals of the demultiplexer are electrically connected to respective input terminals of the functional circuit and the input terminal is electrically connected to the second input teiminal. Input terminals of the r circuits are electrically connected to the respective first input terminals through the switch circuit. For example, a signal for verification is input to the first input terminal in verification of the functional circuit to operate the demultiplexer. One signal for verification is input to r functional circuits by the demultiplexer. | 03-10-2016 |
Patent application number | Description | Published |
20130308347 | RESONANT SWITCHING POWER SUPPLY DEVICE - A winding voltage arising in a first winding on the primary side of a transformer is detected in a winding voltage detector unit formed of a second winding, and current flowing through a resonant circuit is detected in a resonant current detector unit formed of an auxiliary capacitor and a resistor. The timing at which the polarity of the detected winding voltage is inverted is detected in a control and drive unit, and the time at which the polarity of the resonant current, whose phase is delayed with respect to that of the winding voltage, will be inverted is determined in advance. In the event that there is a switch in an on-state when the timing immediately before the inversion of the polarity of the resonant current is detected from the output of the resonant current detector unit, the control and drive unit forcibly turns off the switch. | 11-21-2013 |
20140376275 | SWITCHING POWER SUPPLY APPARATUS - A switching power supply apparatus includes: a dead time circuit that receives an output control signal and generates dead time signal to specify a time width when both first and second switching elements are turned OFF; an output signal generation circuit that generates first and second output signals which specify the ON time of the first and second switching elements respectively in accordance with the output control signal and the dead time signal; and a dead time adjustment circuit that adjusts the turn ON timings of the first and second switching elements by changing the time width of the dead time signal in accordance with the change of voltage of the DC input power or the change of the output voltage of the capacitor. | 12-25-2014 |
20140376281 | SWITCHING POWER SUPPLY DEVCE - A switching power supply device wherein an input voltage is stepped-up by first and second switching elements that are driven on and off in a complementary way, thus obtaining a stabilized output voltage. The switching power supply device includes a comparator that detects fluctuation in an operating reference potential of the second switching element accompanying fluctuation in the input voltage, and a drive signal generator circuit that carries out a logical operation on an output control signal, a dead time signal, and the output signal of the comparator, thus generating first and second drive signals that determine the on-state time of the first and second switching elements. | 12-25-2014 |
20150109831 | SWITCHING POWER SUPPLY DEVICE - A drive control circuit for a switching power supply device. The drive control circuit includes an output control circuit configured to generate an output control signal with a pulse width corresponding to an output voltage of the switching power supply device, a threshold setting circuit configured to determine a winding threshold voltage according to a direct current input voltage applied to the series resonant circuit formed of the leakage inductance of an isolation transformer and a capacitor of the switching power supply device, a winding detection circuit configured to compare a voltage generated in a tertiary winding of the isolation transformer with the winding threshold voltage and to accordingly output a winding detection signal, and a drive circuit configured to receive the winding detection signal and the output control signal, and to generate a pulse-width controlled drive signal for driving a first switching element of the switching power supply device. | 04-23-2015 |
20150372672 | POWER DEVICE DRIVE CIRCUIT - A power device drive circuit reduces the short-circuit resistance of a power device that switches an input voltage. The power device drive circuit includes an output amplifier that applies a control voltage to a control terminal of the power device so as to be turned on and off, and an internal power supply circuit that generates a drive voltage of the output amplifier in accordance with a change in the input voltage, thereby causing the control voltage to change. In particular, the internal power supply circuit reduces the drive voltage of the output amplifier when the input voltage rises, thereby reducing the short-circuit current of the power device. | 12-24-2015 |
20160036315 | DRIVE CIRCUIT AND SEMICONDUCTOR DEVICE - Malfunction can be reliably avoided even when a signal that drives a high side power device is not normally transmitted in a level shift circuit. In a drive circuit, a pulse generator circuit generates a set signal and reset signal that causes a high side power device to be turned on or off. The pulse generator circuit provides set and reset signals, via a level shift circuit, to a high side drive circuit. A high side potential (a high side reference potential or a high side power supply potential) is detected by a high side potential detector circuit. A high side potential determination circuit determines a change in potential that impedes the transmission of the set signal or reset signal in the level shift circuit, and causes the pulse generator circuit to regenerate the set signal or reset signal when the timing of the detection coincides with the timing at which the set signal or reset signal is generated. | 02-04-2016 |