Patent application number | Description | Published |
20080237887 | SEMICONDUCTOR DIE STACK HAVING HEIGHTENED CONTACT FOR WIRE BOND - A semiconductor device is disclosed including die bond pads which are heightened to allow wire bonding of offset stacked die even in tight offset configurations. After a first die is affixed to a substrate, one or more layers of an electrical conductor may be provided on some or all of the die bond pads of the first substrate to raise the height of the bond pads. The conductive layers may for example be conductive balls deposited on the die bond pads of the first substrate using a known wire bond capillary. Thereafter, a second die may be added, and wire bonding of the first die may be accomplished using a known wire bond capillary mounting a wire bond ball on a raised surface of a first semiconductor die bond pad. | 10-02-2008 |
20080242076 | METHOD OF MAKING SEMICONDUCTOR DIE STACK HAVING HEIGHTENED CONTACT FOR WIRE BOND - A method of making a semiconductor device is disclosed including die bond pads which are heightened to allow wire bonding of offset stacked die even in tight offset configurations. After a first die is affixed to a substrate, one or more layers of an electrical conductor may be provided on some or all of the die bond pads of the first substrate to raise the height of the bond pads. The conductive layers may for example be conductive balls deposited on the die bond pads of the first substrate using a known wire bond capillary. Thereafter, a second die may be added, and wire bonding of the first die may be accomplished using a known wire bond capillary mounting a wire bond ball on a raised surface of a first semiconductor die bond pad. | 10-02-2008 |
20090134502 | LEADFRAME BASED FLASH MEMORY CARDS - A leadframe design for forming leadframe-based semiconductor packages having curvilinear shapes is disclosed. The leadframes may each include one or more curvilinear slots corresponding to curvilinear edges in the finished and singulated semiconductor package. After encapsulation, the integrated circuit packages on the panel may be singulated by cutting the integrated circuits from the leadframe panel into a plurality of individual integrated circuit packages. The slots in the leadframe advantageously allow each leadframe to be singulated using a saw blade making only straight cuts. | 05-28-2009 |
20090166820 | TSOP LEADFRAME STRIP OF MULTIPLY ENCAPSULATED PACKAGES - A method of fabricating a semiconductor leadframe package from a strip including multiply encapsulated leadframe packages, and a leadframe package formed thereby are disclosed. An entire row or column of leadframes gets encapsulated together. Encapsulating an entire row or column reduces the keep-out area between adjacent leadframe packages, which allows the internal leads of each leadframe and the semiconductor die coupled thereto to be lengthened. | 07-02-2009 |
20090321950 | STACKED SEMICONDUCTOR PACKAGE WITH LOCALIZED CAVITIES FOR WIRE BONDING - A semiconductor die and a low profile semiconductor package formed therefrom are disclosed. The semiconductor package may include at least first and second stacked semiconductor die mounted to a substrate. The first and/or second semiconductor die may be fabricated with localized cavities through a bottom surface of the semiconductor die, along a side edge of the semiconductor die. The one or more localized cavities in a side take up less than the entire side. Thus, the localized cavities allow low height stacking of semiconductor die while providing each die with a high degree of structural integrity to prevent cracking or breaking of the die edge during fabrication. | 12-31-2009 |
20090321951 | STACKED WIRE BONDED SEMICONDUCTOR PACKAGE WITH LOW PROFILE BOND LINE - A low profile semiconductor package is disclosed including at least first and second stacked semiconductor die mounted to a substrate. The first and/or second semiconductor die may be fabricated with a plurality of redistribution pads formed over and electrically coupled to a plurality of bond pads. After the semiconductor die are formed and diced from the wafer, the die may be mounted to the substrate using a low profile reverse wire bond according to the present invention. In particular, a wedge bond may be formed between the wire and the redistribution pad without having to use a second wire bond ball on the die bond pad as in conventional reverse ball bonding processes. | 12-31-2009 |
20090325342 | METHOD OF FABRICATING STACKED SEMICONDUCTOR PACKAGE WITH LOCALIZED CAVITIES FOR WIRE BONDING - A method of fabricating a semiconductor die and a low profile semiconductor package are disclosed. The semiconductor package may include at least first and second stacked semiconductor die mounted to a substrate. The first and/or second semiconductor die may be fabricated with localized cavities through a bottom surface of the semiconductor die, along a side edge of the semiconductor die. The one or more localized cavities in a side take up less than the entire side. Thus, the localized cavities allow low height stacking of semiconductor die while providing each die with a high degree of structural integrity to prevent cracking or breaking of the die edge during fabrication. | 12-31-2009 |
20090325344 | METHOD OF FABRICATING STACKED WIRE BONDED SEMICONDUCTOR PACKAGE WITH LOW PROFILE BOND LINE - A method of fabricating a low profile semiconductor package is disclosed including at least first and second stacked semiconductor die mounted to a substrate. The first and/or second semiconductor die may be fabricated with a plurality of redistribution pads formed over and electrically coupled to a plurality of bond pads. After the semiconductor die are formed and diced from the wafer, the die may be mounted to the substrate using a low profile reverse wire bond according to the present invention. In particular, a wedge bond may be formed between the wire and the redistribution pad without having to use a second wire bond ball on the die bond pad as in conventional reverse ball bonding processes. | 12-31-2009 |
20110024881 | SEMICONDUCTOR DEVICE HAVING UNDER-FILLED DIE IN A DIE STACK - A semiconductor device including a semiconductor die in a die stack under-filled with a film. Once the semiconductor die are formed, they may be stacked and interconnected. The interconnection may leave a small space between semiconductor die in the die stack. This space is advantageously completely filled using a vapor deposition process where a coating is deposited as a vapor which flows over all surfaces of the die stack, including into the spaces between the die in the stack. The vapor then deposits on the surfaces between and around the die and forms a film which completely fills the spaces between the die in the die stack. The material used in the vapor deposition under-fill process may for example be a member of the parylene family of polymers, and in embodiments, may be parylene-N. | 02-03-2011 |
20120007226 | SYSTEM-IN-A-PACKAGE BASED FLASH MEMORY CARD - A system-in-a-package based flash memory card including an integrated circuit package occupying a small overall area within the card and cut to conform to the shape of a lid for the card. An integrated circuit may be cut from a panel into a shape that fits within and conforms to the shape of lids for a finished memory card, such as for example an SD Card. The integrated circuit package may be a system-in-a-package, a multi-chip module, or other arrangement where a complete electronic system is formed in a single package. | 01-12-2012 |
20120009732 | SYSTEM-IN-A-PACKAGE BASED FLASH MEMORY CARD - A system-in-a-package based flash memory card including an integrated circuit package occupying a small overall area within the card and cut to conform to the shape of a lid for the card. An integrated circuit may be cut from a panel into a shape that fits within and conforms to the shape of lids for a finished memory card, such as for example an SD Card. The integrated circuit package may be a system-in-a-package, a multi-chip module, or other arrangement where a complete electronic system is formed in a single package. | 01-12-2012 |
20120279651 | EPOXY COATING ON SUBSTRATE FOR DIE ATTACH - A system and method are disclosed for applying a die attach epoxy to substrates on a panel of substrates. The system includes a window clamp having one or more windows through which the epoxy may be applied onto the substrate panel. The size and shape of the one or more windows correspond to the size and shape of the area on the substrate to receive the die attach epoxy. Once the die attach epoxy is sprayed onto the substrate through the windows of the window clamp, the die may be affixed to the substrate and the epoxy cured in one or more curing steps. The system may further include a clean-up follower for cleaning epoxy off of the window clamp, and a window cleaning mechanism for cleaning epoxy off of the sidewalls of the windows of the window clamp. | 11-08-2012 |