Patent application number | Description | Published |
20080237816 | INTEGRATED CIRCUIT PACKAGE SYSTEM WITH ENCAPSULATING FEATURES - An integrated circuit package system is provided including forming a lead frame includes forming a mold gate, providing a first surface, and providing a second surface opposite the first surface; and forming angled gate sides facing each other in the mold gate between the first surface and the second surface. | 10-02-2008 |
20080251901 | STACKED INTEGRATED CIRCUIT PACKAGE SYSTEM - A stacked integrated circuit package system is provided providing a lead frame having a die paddle, attaching a first integrated circuit on the die paddle of the lead frame, connecting first electrical interconnects between the first integrated circuit and the lead frame, encapsulating the first integrated circuit and the first electrical interconnects with the lead frame directly on a bottom mold and clamped by a top mold, attaching a second integrated circuit on the die paddle of the first integrated circuit, connecting second electrical interconnects between the second integrated circuit and the lead frame, and encapsulating the second integrated circuit and the second electrical interconnects. | 10-16-2008 |
20080290485 | INTEGRATED CIRCUIT PACKAGE SYSTEM WITH RELIEF - An integrated circuit package system including: providing a die pad with a top, sides, and a bottom, the bottom having a relief with a flat surface and defining a wall and a center pad; mounting a barrier under the bottom of the die pad; mounting an integrated circuit die on the top of the die pad; encapsulating the integrated circuit die and the top and sides of the die pad with the wall preventing encapsulation from flowing along the barrier to reach the center pad; and mounting an external interconnect on the center pad. | 11-27-2008 |
20080303123 | INTEGRATED CIRCUIT PACKAGE SYSTEM WITH LEADFINGER - An integrated circuit package system includes: providing a lead terminal; forming a dummy lead near the lead terminal; positioning a base integrated circuit adjacent the lead terminal and the dummy lead; connecting a die connector to the base integrated circuit and the dummy lead; mounting a stackable integrated circuit over the base integrated circuit; and connecting another of the die connector to the stackable integrated circuit and the dummy lead. | 12-11-2008 |
20090001563 | INTEGRATED CIRCUIT PACKAGE IN PACKAGE SYSTEM WITH ADHESIVELESS PACKAGE ATTACH - An integrated circuit package in package system includes a package in package lead with a package in package lead surface substantially planar, attaching a first integrated circuit package having a first encapsulant surface substantially coplanar with the package in package lead surface, attaching a second integrated circuit near the first integrated circuit package, and forming a package in package encapsulant over the first integrated circuit package and the second integrated circuit. | 01-01-2009 |
20090002961 | PACKAGING SYSTEM WITH HOLLOW PACKAGE - A packaging system comprising: forming terminal leads; configuring a cavity by partially encapsulating the terminal leads with a compound; attaching an integrated circuit device, a micro-electromechanical system, a micro-mechanical system, or a combination thereof in the cavity; and bonding a cover to the terminal leads for enclosing the cavity. | 01-01-2009 |
20090008761 | INTEGRATED CIRCUIT PACKAGE SYSTEM WITH FLEX BUMP - An integrated circuit package system includes: forming a flex bump over an integrated circuit device structure, the flex bump having both a base portion and an offset portion over the base portion; forming a first ball bond of a first internal interconnect over the offset portion; and encapsulating the integrated circuit device structure, the flex bump, and the first internal interconnect. | 01-08-2009 |
20090014849 | INTEGRATED CIRCUIT PACKAGE SYSTEM WITH MULTIPLE MOLDING - An integrated circuit package system is provided forming a lead from a padless lead frame, and encapsulating the lead for supporting an integrated circuit die with a first molding compound for encapsulation with a second molding compound. | 01-15-2009 |
20090072363 | INTEGRATED CIRCUIT PACKAGE-IN-PACKAGE SYSTEM WITH LEADS - An integrated circuit package-in-package system includes: forming an integrated circuit package system including: connecting a first integrated circuit die and a lead, and forming an inner encapsulation covering the first integrated circuit die and a portion of the lead; mounting a second integrated circuit die to the integrated circuit package system; connecting the second integrated circuit die and the lead; and forming a package encapsulation covering the integrated circuit package system and the second integrated circuit die with the lead exposed. | 03-19-2009 |
20090072364 | INTEGRATED CIRCUIT PACKAGE SYSTEM WITH LEADS SEPARATED FROM A DIE PADDLE - An integrated circuit package system is provided including forming a leadframe having a frame and a die paddle having leads thereon. The leads are held with respect to the die paddle. The leads are separated from the die paddle, and a die is attached to the die paddle. Bond wires are bonded between the leads and the die. The die and bond wires are encapsulated. The leadframe is singulated to separate the frame and the die paddle. | 03-19-2009 |
20090072366 | INTEGRATED CIRCUIT PACKAGE SYSTEM WITH DUAL CONNECTIVITY - An integrated circuit package system includes: forming a die-attach paddle, a terminal pad, and an external interconnect with the external interconnect below the terminal pad; connecting an integrated circuit die with the terminal pad and the external interconnect; and forming an encapsulation, having a first side and a second side at an opposing side to the first side, surrounding the integrated circuit die with the terminal pad exposed at the first side and the external interconnect extending below the second side. | 03-19-2009 |
20090072412 | INTEGRATED CIRCUIT PACKAGE SYSTEM WITH PACKAGE ENCAPSULATION HAVING RECESS - An integrated circuit package system includes: forming an external interconnect; connecting an integrated circuit die and the external interconnect; forming a package encapsulation, having a recess, covering the integrated circuit die with a portion of the external interconnect exposed by the recess; and connecting an integrated circuit device and the external interconnect in the recess. | 03-19-2009 |
20090079096 | INTEGRATED CIRCUIT PACKAGE SYSTEM WITH MULTIPLE DEVICE UNITS - An integrated circuit package system comprising forming a first device unit, having a first external interconnect, and a second device unit, having a second external interconnect, in an array configuration; mounting an integrated circuit die over the first device unit; connecting the integrated circuit die and the first external interconnect; and encapsulating the integrated circuit die, the first device unit, and the second device unit with both the first external interconnect and the second external interconnect partially exposed. | 03-26-2009 |
20090085177 | INTEGRATED CIRCUIT PACKAGE SYSTEM WITH LEADFRAME ARRAY - An integrated circuit package system includes providing an integrated circuit die; attaching the integrated circuit die over a lead grid having lead blocks; and connecting a die interconnect to the integrated circuit die and the lead blocks. | 04-02-2009 |
20090085178 | INTEGRATED CIRCUIT PACKAGING SYSTEM WITH BASE STRUCTURE DEVICE - An integrated circuit packaging system including: forming a base structure, having an opening; mounting a base structure device in the opening; attaching an integrated circuit device over the base structure device; and molding an encapsulant on the base structure, the base structure device, and the integrated circuit device. | 04-02-2009 |
20090179314 | INTEGRATED CIRCUIT PACKAGE SYSTEM WITH LEADFINGER SUPPORT - An integrated circuit package system including forming a leadframe having a lead with a leadfinger support of a predetermined height, and attaching an integrated circuit die with an electrical interconnect at a predetermined collapse height determined by the predetermined height of the leadfinger support. | 07-16-2009 |
20090250798 | INTEGRATED CIRCUIT PACKAGE SYSTEM WITH INTERCONNECT SUPPORT - An integrated circuit package system with interconnect support is provided including providing an integrated circuit, forming an electrical interconnect on the integrated circuit, forming a contact pad having a chip support, and coupling the integrated circuit to the contact pad by the electrical interconnect, with the integrated circuit on the chip support. | 10-08-2009 |
20100072599 | Semiconductor Device and Method of Forming a Wafer Level Package with Top and Bottom Solder Bump Interconnection - A semiconductor device is made by forming solder bumps over a copper carrier. Solder capture indentations are formed in the copper carrier to receive the solder bumps. A semiconductor die is mounted to the copper carrier using a die attach adhesive. The semiconductor die has contact pads formed over its active surface. An encapsulant is deposited over the copper carrier, solder bumps, and semiconductor die. A portion of the encapsulant is removed to expose the solder bumps and contact pads. A conductive layer is formed over the encapsulant to connect the solder bumps and contact pads. The conductive layer operates as a redistribution layer to route electrical signals from the solder bumps to the contact pads. The copper carrier is removed. An insulating layer is formed over the conductive layer and encapsulant. A plurality of semiconductor devices can be stacked and electrically connected through the solder bumps. | 03-25-2010 |
20100072618 | Semiconductor Device and Method of Forming a Wafer Level Package with Bump Interconnection - A semiconductor device is made by providing a metal substrate for supporting the semiconductor device. Solder bumps are connected to the substrate. In one embodiment, a conductive material is deposited over the substrate and is reflowed to form the solder bumps. A semiconductor die is mounted to the substrate using a die attach adhesive. The semiconductor die has a plurality of contact pads formed over a surface of the semiconductor die. An encapsulant material is deposited over the solder bumps and the semiconductor die. The encapsulant is etched to expose the contact pads of the semiconductor die. A first redistribution layer (RDL) is formed over the encapsulant to connect each contact pad of the semiconductor die to one of the solder bumps. The substrate is removed to expose the die attach adhesive and a bottom surface of the solder bumps. | 03-25-2010 |
20100140764 | WIRE-ON-LEAD PACKAGE SYSTEM AND METHOD OF MANUFACTURE THEREOF - A method of manufacture of a wire-on-lead package system includes: providing a die attach paddle with paddle extensions distributed along the periphery of the die attach paddle, providing leadfingers surrounding the die attach paddle, attaching a semiconductor die to the die attach paddle wherein the semiconductor die is larger than the die attach paddle, and connecting bond wires between the semiconductor die and the leadfingers and between the semiconductor die and the paddle extensions. | 06-10-2010 |
20100140766 | LARGE DIE PACKAGE STRUCTURES AND FABRICATION METHOD THEREFOR - A method for fabricating large die package structures is provided wherein at least portions of the leadtips of at least a plurality of leadfingers of a leadframe are electrically insulated. A die is positioned on the electrically insulated leadtips. The die is electrically connected to at least a plurality of the leadfingers. | 06-10-2010 |
20100244273 | INTEGRATED CIRCUIT PACKAGE SYSTEM WITH MULTIPLE DEVICE UNITS AND METHOD FOR MANUFACTURING THEREOF - A method for manufacturing an integrated circuit package system includes: forming a first device unit, having first external interconnects arranged along a perimeter of the first device unit, and a second device unit, having second external interconnects arranged along a perimeter of the second device unit, in an array configuration; mounting an integrated circuit die over the first device unit; connecting the integrated circuit die and the first external interconnects; encapsulating with an encapsulation covering the integrated circuit die, the first device unit, and the second device unit with both the first external interconnects and the second external interconnects partially exposed; and forming a partial encapsulation cut in the encapsulation electrically isolating the first external interconnects and the second electrical interconnects. | 09-30-2010 |
20100264529 | INTEGRATED CIRCUIT PACKAGE SYSTEM WITH INTEGRAL INNER LEAD AND PADDLE AND METHOD OF MANUFACTURE THEREOF - A method of manufacture of an integrated circuit package system includes: forming a paddle, an outer lead, and an inner lead between the paddle and the outer lead; forming a non-vertical paddle edge of the paddle and a non-vertical lead edge of the inner lead facing the non-vertical paddle edge; and encapsulating an integrated circuit die over the paddle. | 10-21-2010 |
20110079888 | INTEGRATED CIRCUIT PACKAGING SYSTEM WITH PROTECTIVE COATING AND METHOD OF MANUFACTURE THEREOF - A method of manufacture of an integrated circuit packaging system includes: forming a lead-frame having a die attach paddle and a contact pad connected by a link; mounting an integrated circuit die over the die attach paddle; molding a package body on the lead-frame and the integrated circuit die including leaving portions of the die attach paddle, the contact pad, and the link exposed from the package body; forming an exposed edge by etching away the link between the contact pad, and the die attach paddle; and depositing a solder-resistant layer on the exposed edge. | 04-07-2011 |
20110101524 | Semiconductor Device with Bump Interconnection - A semiconductor device includes a semiconductor die having contact pads disposed over a surface of the semiconductor die, a die attach adhesive layer disposed under the semiconductor die, and an encapsulant material disposed around and over the semiconductor die. The semiconductor device further includes bumps disposed in the encapsulant material around a perimeter of the semiconductor die. The bumps are partially enclosed by the encapsulant material. The semiconductor device further comprises first vias disposed in the encapsulant. The first vias expose surfaces of the contact pads. The semiconductor device further includes a first redistribution layer (RDL) disposed over the encapsulant and in the first vias, and a second RDL disposed under the encapsulant material and the die attach adhesive layer. The first RDL electrically connects each contact pad of the semiconductor die to one of the bumps, and the second RDL is electrically connected to one of the bumps. | 05-05-2011 |
20110204501 | INTEGRATED CIRCUIT PACKAGING SYSTEM INCLUDING NON-LEADED PACKAGE - An integrated circuit packaging system includes: a plurality of leads with a predetermined thickness and a predetermined interval gap between each of the plurality of leads; each one of the plurality of leads includes first terminal ends disposed adjacent an integrated circuit and second terminal ends disposed along a periphery of a package; and a lead-to-lead gap formed between the second terminal ends of alternating leads in excess of the predetermined interval gap. | 08-25-2011 |
20110284842 | INTEGRATED CIRCUIT PACKAGE SYSTEM WITH LAMINATE BASE - An integrated circuit package system with laminate base includes: a base package including: a laminate substrate strip, an integrated circuit on the laminate substrate strip, a molded cover over the integrated circuit and the laminate substrate strip, and a strip test of the base package; a bare die on the base package; the bare die electrically connected to the laminate substrate strip; and the bare die and the base package encapsulated. | 11-24-2011 |
20110298108 | NON-LEADED INTEGRATED CIRCUIT PACKAGE SYSTEM WITH MULTIPLE GROUND SITES - A non-leaded integrated circuit package system includes: a die paddle of a lead frame; a dual row of terminals including an outer terminal and an inner terminal; and an inner terminal and an adjacent inner terminal to form a fused lead. | 12-08-2011 |
20130341789 | Semiconductor Device and Method of Forming a Wafer Level Package with Top and Bottom Solder Bump Interconnection - A semiconductor device is made by forming solder bumps over a copper carrier. Solder capture indentations are formed in the copper carrier to receive the solder bumps. A semiconductor die is mounted to the copper carrier using a die attach adhesive. The semiconductor die has contact pads formed over its active surface. An encapsulant is deposited over the copper carrier, solder bumps, and semiconductor die. A portion of the encapsulant is removed to expose the solder bumps and contact pads. A conductive layer is formed over the encapsulant to connect the solder bumps and contact pads. The conductive layer operates as a redistribution layer to route electrical signals from the solder bumps to the contact pads. The copper carrier is removed. An insulating layer is formed over the conductive layer and encapsulant. A plurality of semiconductor devices can be stacked and electrically connected through the solder bumps. | 12-26-2013 |