Patent application number | Description | Published |
20080316076 | Direct RF D-to-A Conversion - A modulator described herein provides digital modulation and direct digital-to-analog conversion capable of achieving 12-bit resolution or higher for high frequency signals. The modulator comprises a digital modulator, conversion circuit, and multiplexer. The digital modulator generates a plurality of sample streams at a plurality of different sample phases that collectively represent a desired modulated digital carrier waveform modulated by a digital input signal. The conversion circuit converts the sample streams into a plurality of continuous analog signals. The multiplexer multiplexes the analog signals together to generate a modulated analog carrier signal representative of the desired modulated digital carrier waveform. | 12-25-2008 |
20090088085 | Apparatus and Methods for Frequency Control in a Multi-Output Frequency Synthesizer - Methods and circuits for synthesizing two or more signals phase-locked to a common reference frequency signal are disclosed. In one embodiment, a method comprises generating first and second output signals phase-locked to a reference clock signal, using first and second phase-locked loop circuits. In response to a detected frequency error in the first output signal, the first output signal is corrected by adjusting a frequency-division ratio in the first phase-locked loop circuit. The second output signal is corrected, separately from the correction to the first output signal, by adjusting a frequency-division ratio in the second phase-locked loop circuit, using an adjustment parameter calculated from the detected frequency error. In another exemplary method, first and second output signals are generated as described above, using first and second phase-locked loop circuits. The first output signal is corrected by adjusting a frequency-division ratio in the first phase-locked loop circuit and generating a control signal to adjust the frequency of the reference clock signal, in response to detected frequency error in the first output signal. Because the second output signal is derived from the common reference clock signal, adjustments to the reference clock frequency will also adjust the frequency of the second output signal. Additional adjustments to the second output signal may be applied in some embodiments by adjusting a frequency-division ratio in the second phase-locked loop circuits. Circuits for implementing the described methods are also disclosed. | 04-02-2009 |
20090088194 | Single Multi-Mode Clock Source for Wireless Devices - The wireless device described herein uses a single crystal oscillator to generate the high and low frequency clock signals required by the wireless device during both active and inactive radio communications. An exemplary multi-mode clock unit comprises a single crystal oscillator operable in a normal power mode and a reduced power mode, and a control unit that selectively switches the crystal oscillator between the first and second power modes based on a current clock signal quality requirement. The control unit may selectively switch between the first and second power modes by selectively varying a capacitive load of the crystal oscillator and/or by varying a drive signal of the crystal oscillator. For example, the control unit may select the normal power mode when a cellular transceiver is active, and a reduced power mode when the cellular transceiver is inactive to reduce power consumption during the inactive state. | 04-02-2009 |
20110151800 | Delay, Gain and Phase Estimation for Measurement Receivers - Phase and gain of a transmit signal are measured at a transmitter by determining a first time delay having a first resolution at a measurement receiver between a reference signal from which the transmit signal is generated and a measured signal derived from the transmit signal by comparing amplitudes of the reference signal and the measured signal. A second time delay having a second resolution finer than the first resolution is determined at the measurement receiver between the reference signal and the measured signal based on the first time delay. The reference signal and the measured signal are time aligned at the measurement receiver based on the second time delay and the phase and gain of the transmit signal are estimated after the reference signal and the measured signal are time aligned. | 06-23-2011 |
Patent application number | Description | Published |
20150333698 | Method and Apparatus Having Enhanced Oscillator Phase Noise Using High Vt MOS Devices - A voltage-controlled oscillator (VCO), includes a resonator circuit connected to receive an input voltage and having a first output node and a second output node; and at least one cross-coupled switching circuit portion, each cross-coupled switching circuit portion comprising a first transistor having a drain connected to the first output node and a second transistor having a drain connected to the second output node, the first transistor having a gate connected between the drain of the second transistor and the second output node and the second transistor having a gate connected between the drain of the first transistor and the first output node, each of the first and second transistors having a threshold voltage that is determined to be the highest threshold voltage available for the process used to create the VCO. | 11-19-2015 |
20160036486 | PHASE ROTATOR FOR COMPENSATING TRANSCEIVER IMPAIRMENTS - A phase rotator corrects the IQ imbalance in a wireless transceiver. The phase rotator is a part of a compensation system that detects and separates reception impairment images from transmission impairment images. The disclosed phase rotator introduces a phase shift between the transmission channel and the reception channel without perturbing the phase mismatch and the gain mismatch in the reception path. The phase rotator includes a first local oscillation (LO) circuit that generates a first LO signal at a first carrier frequency and a second LO circuit that generates a second LO signal at a second carrier frequency that deviates from the first carrier frequency for a phase rotation period. The phase rotation period is sufficiently long such that the frequency deviation can introduce a prescribed phase shift between the first LO signal and the second LO signal. | 02-04-2016 |
20160043697 | FRONT-END MATCHING AMPLIFIER - A front-end receiver includes an amplifier that has a steady gain over a wide frequency range. The disclosed amplifier adopts an architecture in which a common-source (CS) circuit stacks against a common-gate (CG) circuit. The CG circuit provides the input impedance matching while the CS circuit boosts the amplification gain. As a result, the disclosed amplifier allows the front-end receiver to break free from a tradeoff between input impedance matching and gain boosting. Moreover, the disclosed amplifier achieves power saving and noise reduction by having the CS circuit to share the same bias current with the CG circuit. | 02-11-2016 |
20160043768 | FRONT-END TRANSCEIVERS WITH MULTIPLE RECEPTION CHANNELS - A front-end receiver includes a first mixer of a first channel, a second mixer of a second channel, and a switching circuit that is configured to select the first mixer or the second mixer during a particular time period. Upon being selected, one of the first mixer or the second mixer is configured to deliver a down-converted signal that down-converts a respective RF signal of either the first or second reception channel. As the tasks of down-conversion and multiplexing are combined at the mixer level, the first and second reception channels may share a baseband circuit while being able to provide a well-balanced metrics of channel isolation, low noise figure, and linearity. | 02-11-2016 |
20160048470 | MASTER-SLAVE SYSTEM WITH TRIGGERED REMOTE FUNCTION CALLS - Triggered remote function calls can be used in master-slave systems to trigger slave-side software functions pre-loaded by a master into slave MCU memory, with associated parameters pre-loaded into a slave function interface memory. A master issues trigger-function signals (such as rising/falling edges or signal levels) over a trigger-function signal line. The slave includes a trigger conditioning block that in response issues a trigger-function request to the slave MCU, which calls/executes the associated software function, including accessing the associated trigger-function parameters from function interface memory. A slave can include a hardware function block with functionality configurable by a pre-loaded software configuration function (with associated parameters). A master can include a hardware function block configured to issue trigger-function signals. The slave (trigger conditioning block) can be configured to service trigger-function signals as an IRQ (interrupt request) to the MCU, which executes an ISR (interrupt service routine) as a triggered function call. | 02-18-2016 |
20160050035 | WIRELESS RECEIVER WITH SIGNAL PROFILER MONITORING SIGNAL POWER PER FREQUENCY BAND - A signal profiler generates and monitors a signal profile corresponding to signal power (absolute or relative) per frequency band. The signal profiler includes a signal profile generator and a signal profile monitor. The signal profile generator processes a received signal in pre-defined frequency bands, and captures frequency-band signal power information into frequency bins, this frequency-binned signal power information constituting a signal profile. The signal profile monitor monitors the signal profile, including variations in the signal profile based on pre-defined criteria, and output corresponding profile-variation information (such as flags or interrupt requests). The signal profile generator is an FFT engine. The signal profile monitor is an FSM (finite state machine). An example application is use in a direct conversion wireless receiver to monitor relative image channel power as a signal profile variation that can be used to invoke QMC compensation/configuration. | 02-18-2016 |
Patent application number | Description | Published |
20150013946 | METHOD FOR FABRICATING PATTERNED GRADIENT HEAT SINKS - The embodiments disclose at least one predetermined patterned layer configured to eliminate a physical path of lateral thermal bloom in a recording device, at least one gradient layer coupled to the patterned layer and configured to use materials with predetermined thermal conductivity for controlling a rate of dissipation and a path coupled to the gradient layer and configured to create a path of least thermal conduction resistance for directing dissipation along the path, wherein the path substantially regulates and prevents lateral thermal bloom. | 01-15-2015 |
20150016237 | METHOD FOR FABRICATING A PATTERNED COMPOSITE STRUCTURE - The embodiments disclose a patterned composite magnetic layer structure configured to use magnetic materials having differing temperature and magnetization characteristics in a recording device, wherein the patterned composite magnetic layer structure includes magnetic layers, at least one first magnetic material configured to be used in a particular order to reduce a recording temperature and configured to control and regulate coupling and decoupling of the magnetic layers and at least one second magnetic material with differing temperature characteristics is configured to control recording and erasing of data. | 01-15-2015 |
20150016774 | METHOD FOR REGULATING PATTERNED PLASMONIC UNDERLAYER - The embodiments disclose a stack feature of a stack configured to confine optical fields within and to a patterned plasmonic underlayer in the stack configured to guide light from a light source to regulate optical coupling. | 01-15-2015 |
20150017482 | METHOD FOR FABRICATING PLASMONIC CLADDING - The embodiments disclose a plasmonic cladding structure including at least one conformal plasmonic cladding structure wrapped around plural stack features of a recording device, wherein the conformal plasmonic cladding structure is configured to create a near-field transducer in close proximity to a recording head of the recording device, at least one conformal plasmonic cladding structure with substantially removed top surfaces of the stack features with exposed magnetic layer materials and a thermally insulating filler configured to be located between the stack features. | 01-15-2015 |
20150093598 | MAGNETIC STACK INCLUDING MgO-Ti(ON) INTERLAYER - A stack includes a substrate and a magnetic recording layer. Disposed between the substrate and magnetic recording layer is an MgO—Ti(ON) layer. | 04-02-2015 |
20150154995 | METHOD FOR FABRICATING A PATTERNED COMPOSITE STRUCTURE - Provided herein is an apparatus comprising a substrate; a continuous layer over the substrate comprising a first heat sink layer; and a plurality of features over the continuous layer comprising a second heat sink layer, a first magnetic layer over the second heat sink layer, and a second magnetic layer, wherein the first and second magnetic layers are configured to provide a temperature-dependent, exchange spring mechanism. | 06-04-2015 |
Patent application number | Description | Published |
20080254322 | Apparatus With Increased Magnetic Anisotropy And Related Method - An apparatus includes a thermally insulating substrate, an energy absorbing layer on the thermally insulating substrate, and a flash annealed magnetic layer on the energy absorbing layer. The flash annealed magnetic layer may be configured for data storage. A method includes providing a thermally insulating substrate, depositing an energy absorbing layer on the thermally insulating substrate, depositing a magnetic layer on the energy absorbing layer, and flash annealing the magnetic layer. | 10-16-2008 |
20090135518 | DISCRETE TRACK MAGNETIC MEDIA WITH DOMAIN WALL PINNING SITES - A magnetic recording medium with domain wall pinning sites including a substrate, a soft magnetic underlayer, and a magnetic recording layer overlying the soft magnetic underlayer. In one embodiment the magnetic recording layer has at least two grooves providing a track having first and second sidewalls formed by the grooves. The sidewalls provide a plurality of pinning sites formed between the sidewalls for pinning magnetic domain walls in the track. At least one of the pinning sites includes a first indentation in the first sidewall and a paired second indentation in the second sidewall. In one embodiment data can be stored within the magnetic recording layer by positioning a write head adjacent the track and inducing at least two magnetic domains defining a domain wall. The domain wall migrates to one of the pinning sites in the track. | 05-28-2009 |
20120113541 | Magneto-Elastic Anisotropy Assisted Thin Film Structure - A method includes activating a stress-effecting layer of a thin film structure, having the stress effecting layer adjacent to a magnetic layer, to induce a magneto-elastic anisotropy in the magnetic layer. | 05-10-2012 |