Oh, CA
Albert Sejean Oh, San Jose, CA US
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20080211633 | METHOD AND APPARATUS FOR VERIFYING IDENTIFICATION OF RADIO FREQUENCY IDENTIFICATION TAG - A method and apparatus for verifying an identification of an RFID tag that can verify whether all the information is identified from a plurality of RFID tags attached to a plurality of objects is provided. The method includes: reading object data and the weight data from the plurality of RFID tag attached to the plurality of objects; measuring actual total weight of the plurality of objects; comparing the measured actual total weight with calculated total weight corresponding to a sum of the read weight data; and verifying the automatic identification result about the plurality of objects through the comparison between the measured actual total weight and the calculated total weight. | 09-04-2008 |
Andy Oh, Hercules, CA US
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20120167017 | SYSTEMS AND METHODS FOR ADAPTIVE GESTURE RECOGNITION - Systems and methods are described for adaptively recognizing gestures indicated by user inputs received from a touchpad, touchscreen, directional pad, mouse or other multi-directional input device. If a user's movement does not indicate a gesture using current gesture recognition parameters, additional processing can be performed to recognize the gesture using other factors. The gesture recognition parameters can then be adapted so that subsequent user inputs that are similar to the previously-rejected inputs will appropriately trigger gesture commands as desired by the user. Gestural data or parameters may be locally or remotely stored for further processing. | 06-28-2012 |
Byong Hyop Oh, San Jose, CA US
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20110089405 | SYSTEMS AND METHODS FOR FABRICATION OF SUPERCONDUCTING INTEGRATED CIRCUITS - Various techniques and apparatus permit fabrication of superconductive circuits and structures, for instance Josephson junctions, which may, for example be useful in quantum computers. For instance, a low magnetic flux noise trilayer structure may be fabricated having a dielectric structure or layer interposed between two elements or layers capable of superconducting. A superconducting via may directly overlie a Josephson junction. A structure, for instance a Josephson junction, may be carried on a planarized dielectric layer. A fin may be employed to remove heat from the structure. A via capable of superconducting may have a width that is less than about 1 micrometer. The structure may be coupled to a resistor, for example by vias and/or a strap connector. | 04-21-2011 |
Byong Mok Oh, San Jose, CA US
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20130317976 | Proxy Shopper Payments - Methods and systems are provided for facilitating payment by one person for products purchased by another person. For example, payment can be authorized, such a by a payment provider, when the purchaser is authorized to make the purchase, the product purchased is authorized for purchase, and the store at which the product was purchased is authorized for such purchasing by the other person. | 11-28-2013 |
20130325663 | Proxy Shopping Registry - Methods and systems are provided for facilitating purchases by one person for another person. A user can take advantage of one or more social networks to facilitate purchases by proxy shoppers for the user. For example, the user can designate what products can be purchased by a proxy shopper and what stores can be used by the proxy shopper to make the purchases. The products can be listed in a registry on the user's social network. When the proxy shopper is in a designated store, the proxy shopper can purchase a designated products for the user. | 12-05-2013 |
20140006280 | PAYMENT AUTHORIZATION SYSTEM | 01-02-2014 |
Byung Tae Oh, Los Angeles, CA US
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20090185747 | SYSTEMS AND METHODS FOR TEXTURE SYNTHESIS FOR VIDEO CODING WITH SIDE INFORMATION - A method for texture synthesis for video coding with side information may be implemented by a decoder device. The method may include receiving seed texture at high fidelity. The method may also include receiving remaining portions of synthesized regions at low fidelity. The method may also include receiving marking of regions to synthesize. The method may further include synthesizing the marked regions based on the high-fidelity seed texture and the low-fidelity portions of the synthesized regions. | 07-23-2009 |
Chang Hyun Oh, Glendale, CA US
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20090071492 | Extension hair production - The present invention comprises various hair extension methods for implementing without glue. Our system does not require heat or chemicals for attachment or strong solvents for removal. Anyone familiar with the hair industry knows what damage that these harsh chemicals can cause. This invention looks and feels completely natural and are easy to wash and style and also can be colored or permed. Our system is so gentle that it can be used on the most sensitive and difficult areas such as the top area of head. It is as light as feather, you won't even know that you're wearing it. | 03-19-2009 |
20130255707 | Extension hair attachment - This invention aims to offer extension hair with multiple knots and its manufacturing method that fixes down the connecting string and the extension hair using the knot method of tying the connecting string on the extension hair, and maintains the knot for long periods of time without the extension hair attached in natural hair slipping by creating the knot using the above connecting string. | 10-03-2013 |
Chulwoo Oh, Los Angeles, CA US
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20100225856 | MULTI-LAYER ACHROMATIC LIQUID CRYSTAL POLARIZATION GRATINGS AND RELATED FABRICATION METHODS - A multi-layer polarization grating includes a first polarization grating layer, a second polarization grating layer on the first polarization grating layer, and a third polarization grating layer on the second polarization grating layer, such that the second polarization grating layer is between the first and third polarization grating layers. The second polarization grating layer has a periodic molecular structure that is offset relative to that of the first polarization grating layer along an interface therebetween. The third polarization grating layer may also have a periodic molecular structure that is offset relative to that of the second polarization grating layer along an interface therebetween. As such, the periodic molecular structures of the first and second polarization orating layers may be out of phase by a first relative angular shift, and the periodic molecular structures of the second and third polarization grating layers may be out of phase by a second relative angular shift. Related fabrication methods are also discussed. | 09-09-2010 |
20100225876 | LOW-TWIST CHIRAL LIQUID CRYSTAL POLARIZATION GRATINGS AND RELATED FABRICATION METHODS - A polarization grating includes a substrate and a first polarization grating layer on the substrate. The first polarization grating layer includes a molecular structure that is twisted according to a first twist sense over a first thickness defined between opposing faces of the first polarization grating layer. Some embodiments may include a second polarization grating layer on the first polarization grating layer. The second polarization grating layer includes a molecular structure that is twisted according to a second twist sense that is opposite the first twist sense over a second thickness defined between opposing faces of the second polarization grating layer. Also, a switchable polarization grating includes a liquid crystal layer between first and second substrates. The liquid crystal layer includes liquid crystal molecules having respective relative orientations that are rotated over a thickness defined between opposing faces thereof by a twist angle that is different from a relative phase angle between respective first and second periodic alignment conditions of the first and second substrates. Related devices and fabrication methods are also discussed. | 09-09-2010 |
20130077040 | LOW-TWIST CHIRAL OPTICAL LAYERS AND RELATED FABRICATION METHODS - An optical element includes a first and second stacked birefringent layers. The first birefringent layer includes local anisotropy patterns having respective relative orientations that vary over a first thickness between opposing faces of the first birefringent layer to define a first twist angle. The second birefringent layer includes local anisotropy patterns having respective relative orientations that vary over a second thickness between opposing faces of the second birefringent layer to define a second twist angle different than the first twist angle. Related devices and fabrication methods are also discussed. | 03-28-2013 |
20130335683 | POLARIZATION-INDEPENDENT LIQUID CRYSTAL DISPLAY DEVICES INCLUDING MULTIPLE POLARIZING GRATING ARRANGEMENTS AND RELATED DEVICES - A liquid crystal device includes a first polarization grating, a second polarization grating, and a liquid crystal layer. The first polarization grating is configured to polarize and diffract incident light into first and second beams having different polarizations and different directions of propagation relative to that of the incident light. The liquid crystal layer is configured to receive the first and second beams from the first polarization grating. The liquid crystal layer is configured to be switched between a first state that does not substantially affect respective polarizations of the first and second beams traveling therethrough, and a second state that alters the respective polarizations of the first and second beams traveling therethrough. The second polarization grating is configured to analyze and diffract the first and second beams from the liquid crystal layer to alter the different directions of propagation thereof in response to the state of the liquid crystal layer. Related devices are also discussed. | 12-19-2013 |
Da Young Oh, La Jolla, CA US
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20120295975 | METHODS OF TREATING INFLAMMATORY CONDITIONS - The present invention provides methods of treating a β-arrestin2 mediated and/or GPR120 mediated response in a subject. The β-arrestin2 mediated and/or GPR120 mediated response can be inflammation, including diabetes, inflammation associated with obesity and obesity. The methods can comprise administering to a subject a therapeutically effective amount of a compound predicted to bind a β-arrestin2 molecule and/or GPR120, wherein the compound selectively activates a β-arrestin2-dependent signaling pathway of GPR120. | 11-22-2012 |
Dong Yoon Oh, Pasadena, CA US
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20120153260 | CHEMICALLY-ETCHED NANOSTRUCTURES AND RELATED DEVICES - A method of etching active quantum nanostructures provides the step of laterally etching of an intermediate active quantum nanostructure layer interposed between cladding layers. The lateral etching can be carried out on at least one side of the intermediate active quantum nanostructure layer selectively, with respect to the cladding layers to define at least one lateral recess or spacing in the intermediate active quantum nanostructure layer and respective lateral protrusions of cladding layers protruding with respect to the intermediate active quantum nanostructure layer. This method can be applied to create devices including active quantum nanostructures such as, for example, three-dimensional photonic crystals, a photonic crystal double-slab and a photonic crystal laser. | 06-21-2012 |
Esther H. Oh, San Diego, CA US
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20100317022 | METHODS OF DIAGNOSING TISSUE FIBROSIS - The present invention provides a method of diagnosing the presence or severity of tissue fibrosis in an individual by detecting α2-macroglobulin (α2-MG) in a sample from the individual; detecting hyaluronic acid (HA) in a sample from the individual; detecting tissue inhibitor of metalloproteinases-1 (TIMP-1) in a sample from the individual; and diagnosing the presence or severity of tissue fibrosis in the individual based on the presence or level of α2-MG, HA and TIMP-1. | 12-16-2010 |
Hyuk Oh, Woodland Hills, CA US
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20110289799 | SHOE OUTSOLE HAVING TUBES - A shoe sole structure includes an outsole having a plurality of cushioning members formed with the bottom surface of the outsole that can extend at least partially between the lateral edge and the medial edge of the shoe and also around a heel end of the shoe. One or more of the cushioning members can differ in size, location, orientation, length and/or material from one or more of the remaining cushioning members. | 12-01-2011 |
Hyung Gyu Oh, Los Angeles, CA US
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20130203499 | LOCATION-BASED ONLINE GAMES FOR MOBILE DEVICES AND IN-GAME ADVERTISING - Providing a location-based online game for a plurality of mobile devices, including: assigning a force field around a player corresponding to each mobile device of the plurality of mobile devices, wherein a radius of the force field is proportional to a score or experience point of the player in the online game; determining a location of said each mobile device; calculating colliding forces among the plurality of mobile devices and virtual environment created in the online game; and providing a forum to enable a battle among the plurality of mobile devices and the virtual environment which are calculated as being in the colliding forces. | 08-08-2013 |
20140342832 | LOCATION-BASED ONLINE GAMES FOR MOBILE DEVICES AND IN-GAME ADVERTISING - Providing a location-based online game for a plurality of mobile devices, including: assigning a force field around a player corresponding to each mobile device of the plurality of mobile devices, wherein a radius of the force field is proportional to a score or experience point of the player in the online game; determining a location of said each mobile device; calculating colliding forces among the plurality of mobile devices and virtual environment created in the online game; and providing a forum to enable a battle among the plurality of mobile devices and the virtual environment which are calculated as being in the colliding forces. | 11-20-2014 |
Inhwan Oh, Cupertino, CA US
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20130049626 | METHOD AND APPARATUS FOR LED LIGHTING - Aspects of the disclosure provide a circuit. The circuit includes a first switch, a second switch and a controller. The first switch is switched on and off to allow a boost circuit to transfer electric energy from an input power supply to a capacitor to generate an intermediate power supply having a higher voltage than the input power supply. The second switch is switched on and off to allow a buck circuit to provide a driving voltage based on the intermediate power supply to drive a load device, and to regulate a current to the load device. The controller is configured to provide a first signal to the first switch and a second signal to the second switch to switch on and off the first switch and the second switch. | 02-28-2013 |
20130162156 | METHOD AND APPARATUS FOR CURRENT CONTROL WITH LED DRIVER - Aspects of the disclosure provide a circuit that includes a detection circuit and a controller. The detection circuit is configured to detect a starting of a conduction in a power supply provided via an electronic transformer. The controller is configured to control a current regulating circuit to pull a current from the electronic transformer at a pre-determined level during a time duration following the starting of the conduction, and pull the current at a reduced level according to a pre-determined profile after the time duration. | 06-27-2013 |
20140140113 | AC-DC RESONANT CONVERTER THAT PROVIDES HIGH EFFICIENCY AND HIGH POWER DENSITY - The disclosed embodiments provide an AC/DC power converter that converts an AC input voltage into a DC output voltage. This AC/DC power converter includes an input rectifier stage which rectifies an AC input voltage into a first rectified voltage of a first constant polarity and a first amplitude. The AC/DC power converter also includes a switching resonant stage which is directly coupled to the output of the input rectifier stage. This switching resonant stage converts the rectified voltage into a second rectified voltage of a second constant polarity and a second amplitude. The AC/DC power converter additionally includes an output rectifier stage coupled to the output of the switching resonant stage, wherein the output rectifier stage rectifies the second rectified voltage into a DC voltage output. | 05-22-2014 |
20140160805 | HYSTERETIC-MODE PULSE FREQUENCY MODULATED (HM-PFM) RESONANT AC TO DC CONVERTER - The disclosed embodiments provide an AC/DC power converter that converts an AC input voltage into a DC output voltage. This AC/DC power converter includes an input rectifier stage which rectifies an AC input voltage into a first rectified voltage. The AC/DC power converter also includes a switching resonant stage which is directly coupled to the output of the input rectifier stage. The switching resonant stage converts the rectified voltage into a first high frequency AC voltage of a first amplitude. This AC/DC power converter additionally includes a transformer which is coupled to the output of the switching resonant stage and is configured to down-convert the first high frequency AC voltage into a second high frequency AC voltage of a second amplitude. Furthermore, the AC/DC power converter includes an output rectifier stage which is coupled to the output of the transformer, wherein the output rectifier stage rectifies the second high frequency AC voltage into a DC output voltage. | 06-12-2014 |
Jaewon Oh, Cupertino, CA US
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20110106748 | TECHNIQUE FOR FAST POWER ESTIMATION USING PROBABILISTIC ANALYSIS OF COMBINATIONAL LOGIC - A method for computing power consumption includes querying a software database for a key node and a gate comprising an input port, connected to the key node, and an output port. The software database is created from a net list associated with a design. The method includes calculating a probability of activity level at the output port based on a predetermined activity level at the key node, and querying the software database for next gate comprising a next input port, connected to the previous output port, and a next output port. The method includes calculating a probability of activity level at the next output port based on the probability of activity level at the previous output port. The method includes computing a sub-circuit gate power by sum of power of all the gates based on the probability of activity level at output ports of the gates. | 05-05-2011 |
Jeong Oh, Thousand Oaks, CA US
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20080299104 | METHODS FOR DETECTING AGENTS INVOLVED IN NEURONAL APOPTOSIS AND COMPOSITIONS THEREOF - The invention provides methods of detecting and identifying agents which moduclate the expression or activity of synGAP, a brain-specific Ras/Rap GTPase activating protein. In vivo studies using knock-out and conditional knock-out transgenic animals show that the level of apoptosis in neurons correlates inversely with the level of synGAP protein, indicating that neuronal apoptosis is enhanced by reduction of synGAP. The invention also describes that synGAP is capable of modulating signal transduction pathways associated with the NMDA receptor and triggering apoptosis, including activation of Ras-GAP. Phosphorylation of synGAP by CaMKII increases its Ras GTPase-activating activity by about 70-95%. Moreover, when these and other phosphorylation sites in the synGAP carboxyl tail are mutated, stimulation of GAP activity after phosphorylation is reduced to about 21±5% as compared to about 70-95% for the wild type protein. Also, phosphosite-specific antibodies used to determine levels of synGAP phosphorylation are described herein. | 12-04-2008 |
Jeong Wook Oh, Irvine, CA US
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20100037317 | MEHTOD AND SYSTEM FOR SECURITY MONITORING OF THE INTERFACE BETWEEN A BROWSER AND AN EXTERNAL BROWSER MODULE - A method for detecting attacks that exploit vulnerabilities in an external module of a primary application is disclosed. The method begins with receiving from the primary application an external module method call that includes a module identifier and a module parameter. Thereafter, the external module method call is intercepted prior to the instantiation of the external module. The external module method call, which may include various data, is compared to the signature rules that are correlated to an attack attempt. If there is a match, then a resulting action part defined in the signature rule is evaluated. Otherwise, the external module is invoked. | 02-11-2010 |
Jieun Oh, Stanford, CA US
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20120174736 | SYSTEM AND METHOD FOR CAPTURE AND RENDERING OF PERFORMANCE ON SYNTHETIC STRING INSTRUMENT - Synthetic multi-string musical instruments have been developed for capturing and rendering musical performances on handheld or other portable devices in which a multi-touch sensitive display provides one of the input vectors for an expressive performance by a user or musician. Visual cues may be provided on the multi-touch sensitive display to guide the user in a performance based on a musical score. Alternatively, or in addition, uncued freestyle modes of operation may be provided. In either case, it is not the musical score that drives digital synthesis and audible rendering of the synthetic multi-string musical instrument. Rather, it is the stream of user gestures captured at least in part using the multi-touch sensitive display that drives the digital synthesis and audible rendering. | 07-12-2012 |
20140318347 | SYSTEM AND METHOD FOR CAPTURE AND RENDERING OF PERFORMANCE ON SYNTHETIC STRING INSTRUMENT - Synthetic multi-string musical instruments have been developed for capturing and rendering musical performances on handheld or other portable devices in which a multi-touch sensitive display provides one of the input vectors for an expressive performance by a user or musician. Visual cues may be provided on the multi-touch sensitive display to guide the user in a performance based on a musical score. Alternatively, or in addition, uncued freestyle modes of operation may be provided. In either case, it is not the musical score that drives digital synthesis and audible rendering of the synthetic multi-string musical instrument. Rather, it is the stream of user gestures captured at least in part using the multi-touch sensitive display that drives the digital synthesis and audible rendering. | 10-30-2014 |
Jonathan Oh, San Jose, CA US
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20110021326 | CLAPPING MARTIAL ARTS STRIKING TARGET - Embodiments of the invention described herein pertain to a martial arts training device including a first paddle and a second paddle. Each of the first and second paddles have a proximal end and a distal end, the first and second paddles being coupled together at the proximal ends for forming a handle and being separated at the distal ends so that a recess is provided between the distal ends of the first and second paddles. The training device produces a clapping noise when a user strikes the distal end of at least one of the first and second paddles, and a noise enhancement mechanism is disposed in the recess to enhance the clapping noise. A reinforcing member is disposed between the top edges or the bottom edges of the first and second paddles for supporting the recess. The interior surfaces of the distal ends of the first and second paddles include radial supporting ribs extending from an outer region of the interior surfaces towards an inner region of the interior surfaces and protruding from the interior surfaces towards the recess. | 01-27-2011 |
Jong Dae Oh, Folsom, CA US
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20110149151 | METHODS AND SYSTEMS FOR SHORT RANGE MOTION COMPENSATION DE-INTERLACING - Systems and methods for choosing whether to select either a spatial interpolation value or a motion compensation interpolation value for deinterlacing an interlaced frame. A minimal sum of absolute differences (SAD) may be determined for a current pixel. Depending on the magnitude of the minimal SAD relative to two threshold values, different checks may be applied. The outcome of the checks may determine whether the spatial interpolation value or the motion compensation interpolation value may be used in deinterlacing. Generally, the magnitude of the minimal SAD may determine the reliability of the SAD and the consequent trustworthiness of the associated motion vector (MV). Greater reliability of the minimal SAD may suggest that the motion compensation interpolation value may be used for purposes of deinterlacing. Less reliability in the minimal SAD may motivate additional checks to further evaluate whether the motion compensation interpolation value should be used. A less reliable minimal SAD and/or failure of some of the checks may suggest that the motion compensation interpolation value should not be used. | 06-23-2011 |
20120257104 | Detecting Video Formats - The format of telecined video may be determined including a bottom field first cadence. In addition, video using 2:3:3:2 top field first can be identified. Moreover, mixed cadence videos can also be detected. In some embodiments, mixed cadence videos may be detected by calculating variances of different areas within a frame. | 10-11-2012 |
Joon Hak Oh, Palo Alto, CA US
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20090078312 | VERFAHREN ZUR HERSTELLUNG VON MIT RYLENTETRACARBONSAEUREDIIMIDEN BESCHICHTETEN SUBSTRATEN - The present invention relates to a process for producing a substrate coated with rylenetetracarboximides, in which a substrate is treated with an N,N′-bisubstituted rylenetetracarboximide and the treated substrate is heated to a temperature at which the N,N′-bisubstituted rylenetetracarboximide is converted to the corresponding N,N′-unsubstituted compound. The present invention further relates to semiconductor units, organic solar cells, excitonic solar cells and organic light-emitting diodes which comprise a substrate produced by this process. The present invention further relates to a process for preparing N,N′-unsubstituted rylenetetracarboximides, in which the corresponding N,N′-bisubstituted rylenetetracarboximides are provided and heated to a temperature at which these compounds are converted to the corresponding N,N′-unsubstituted compounds. | 03-26-2009 |
20090236591 | N,N'-BIS(FLUOROPHENYLALKYL)-SUBSTITUTED PERYLENE-3,4:9,10-TETRACARBOXIMIDES, AND THE PREPARATION AND USE THEREOF - The present invention relates to N,N′-bis(fluorophenylalkyl)-substituted perylene-3,4:9,10-tetracarboximides, their preparation and their use as charge transport materials, exciton transport materials or emitter materials. | 09-24-2009 |
20100171108 | USE OF N,N'-BIS(1,1-DIHYDROPERFLUORO-C3-C5-ALKYL)-PERYLENE-3,4:9,10- TETRACARBOXYLIC DIIMIDES - The present invention relates to the use of N,N′-bis(1,1-dihydroperfluoro-C | 07-08-2010 |
Joon Hak Oh, Irvine, CA US
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20110248267 | AIR-STABLE N-CHANNEL ORGANIC ELECTRONIC DEVICES - In connection with various example embodiments, an organic electronic device is provided with an organic material that is susceptible to decreased mobility due to the trapping of electron charge carriers in response to exposure to air. The organic material is doped with an n-type dopant that, when combined with the organic material, effects air stability for the doped organic material (e.g., exhibits a mobility that facilitates stable operation in air, such as may be similar to operation in inert environments). Other embodiments are directed to organic electronic devices n-doped and exhibiting such air stability. | 10-13-2011 |
Kenneth J. Oh, San Diego, CA US
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20110293725 | CHIMERIC THERAPEUTICS, COMPOSITIONS, AND METHODS FOR USING SAME - Chimeric therapeutics are disclosed that include a modified viral core protein and a nucleic acid bound to the modified viral core protein. The nucleic acid may be substantially homologous to a specific gene target. In some embodiments, the nucleic acid bound to the modified viral core protein is substantially non-immunogenic. Also disclosed are particles and compositions that include disclosec chimeric therapeutics. | 12-01-2011 |
20110293726 | CHIMERIC THERAPEUTICS, COMPOSITIONS, AND METHODS FOR USING SAME - Chimeric therapeutics are disclosed that include a modified viral core protein and a nucleic acid bound to the modified viral core protein. The nucleic acid may be substantially homologous to a specific gene target. In some embodiments, the nucleic acid bound to the modified viral core protein is substantially non-immunogenic. Also disclosed are particles and compositions that include disclosed chimeric therapeutics. | 12-01-2011 |
20110293727 | CHIMERIC THERAPEUTICS, COMPOSITIONS, AND METHODS FOR USING SAME - Chimeric therapeutics are disclosed that include a modified viral core protein and a nucleic acid bound to the modified viral core protein. The nucleic acid may be substantially homologous to a specific gene target. In some embodiments, the nucleic acid bound to the modified viral core protein is substantially non-immunogenic. Also disclosed are particles and compositions that include disclosec chimeric therapeutics. | 12-01-2011 |
20110293733 | SELF-ASSEMBLING NANOPARTICLE DRUG DELIVERY SYSTEM - A self-assembling nanoparticle drug delivery system for the delivery of drugs including peptides, proteins, nucleic acids or synthetic chemical drugs is provided. The self-assembling nanoparticle drug delivery system described herein includes viral capsid proteins, such as Hepatitis B Virus core protein, encapsulating the drug, a lipid bi-layer envelope and targeting or facilitating molecules anchored in the lipid bilayer. A method for construction of the self-assembling nanoparticle drug delivery system is also provided. | 12-01-2011 |
20120315335 | SELF-ASSEMBLING NANOPARTICLE DRUG DELIVERY SYSTEM - A self-assembling nanoparticle drug delivery system for the delivery of drugs including peptides, proteins, nucleic acids or synthetic chemical drugs is provided. The self-assembling nanoparticle drug delivery system described herein includes viral capsid proteins, such as Hepatitis B Virus core protein, encapsulating the drug, a lipid bi-layer envelope and targeting or facilitating molecules anchored in the lipid bilayer. A method for construction of the self-assembling nanoparticle drug delivery system is also provided. | 12-13-2012 |
20140010885 | SELF-ASSEMBLING NANOPARTICLE DRUG DELIVERY SYSTEM - A self-assembling nanoparticle drug delivery system for the delivery of various bioactive agents including peptides, proteins, nucleic acids or synthetic chemical drugs is provided. The self-assembling nanoparticle drug delivery system described herein includes viral capsid proteins, such as Hepatitis B Virus core protein, encapsulating the bioactive agent, a lipid layer or lipid/cholesterol layer coat and targeting or facilitating molecules anchored in the lipid layer. A method for construction of the self-assembling nanoparticle drug delivery system is also provided. | 01-09-2014 |
Kenneth J. Oh, Pleasant Hill, CA US
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20130156818 | METHODS AND COMPOSITIONS FOR CONTROLLING ASSEMBLY OF VIRAL PROTEINS - Provided herein are methods and compositions for controlling assembly of modified viral core proteins, for example, into a viral capsid or a nanocage. In some embodiments, the disclosed modified viral core proteins comprise at least one mutation or modification that can substantially prevent assembly of the viral core proteins until assembly is desired. In some embodiments, assembly of the viral core proteins may be triggered, for example, by contacting the viral core proteins with a reducing agent and/or by reducing the concentration of a denaturant. The viral core proteins may self-assemble to form a viral capsid or nanocage. | 06-20-2013 |
Kwang Oh, La Crescenta, CA US
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20100096510 | Strut Clamp - A clamp for a construction strut that allows a pipe to be clamped to the construction strut in which the clamp has a fastener that is not exposed above the clamp curvature and in which the fastener head is easily accessible. Also the clamp has a retaining tab and a neck portion such that it can be installed either on the open side of the construction strut or on the closed side using slots in the closed side by straight-in passing the retaining tab past the inturned flanges on the top of the construction strut. | 04-22-2010 |
Kyoung Cheol Oh, San Diego, CA US
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20100128652 | METHODS AND SYSTEMS FOR PERFORMING HARQ ACK WITH SCANNING AND SLEEP IN WIMAX SYSTEMS - Embodiments of the present disclosure provide techniques for processing a HARQ data burst and/or a HARQ ACK message in the event a HARQ ACK message falls within a scanning or an unavailable interval of an MS. For certain embodiments, a HARQ ACK message may be postponed if it falls within the scanning or the unavailable interval of the mobile station. For certain embodiments, the HARQ data burst transmission may be postponed if the corresponding HARQ ACK message falls within a scanning or an unavailable interval of the mobile station. For certain embodiments, the HARQ ACK may be transmitted or received even if it falls within the scanning or the unavailable interval of the mobile station. However, the HARQ ACK message may not be processed during the scanning/unavailable interval. | 05-27-2010 |
Kyoung Cheol Oh, Santa Clara, CA US
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20130095840 | ENHANCEMENT OF DEDICATED RANGING IN RESPONSE TO PAGE MESSAGES FOR A MOBILE STATION - Certain embodiments of the present disclosure present methods and apparatuses for enhancing the dedicated ranging procedure. Certain embodiments improve probability of correct reception of a ranging code from a mobile station by accumulating two or more copies of the ranging code received from the MS on two or more different frames in a transmit opportunity. Certain aspects improve probability of correct reception of the ranging code by modifying timing of uplink transmission. | 04-18-2013 |
Kyoung Cheol Oh, Danville, CA US
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20100177709 | METHODS AND SYSTEMS FOR UPLINK SCHEDULING USING WEIGHTED QOS PARAMETERS - Certain embodiments of the present disclosure proposes a flexible method for scheduling of an uplink transmission simultaneously considering all active connections of a mobile station. A decision on scheduling priority can be made based on a metric that comprises QoS parameters and current traffic measurements. The weight factors may be applied for every QoS parameter per schedule type providing flexibility of the scheduling algorithm. The proposed scheduling algorithm may be applied to satisfy different QoS requirements for each service provider and application by changing weight factors if required. | 07-15-2010 |
20100278151 | METHODS AND SYSTEMS USING EFFICIENT RANGING MESSAGE TRANSMISSION DURING INITIAL RANGING - Techniques for efficient transmission of messages in a ranging procedure between a mobile station (MS) and a base station (BS) are provided. The techniques may allow efficient bandwidth allocation for the ranging procedure. | 11-04-2010 |
20120183099 | DYNAMIC DC-OFFSET DETERMINATION FOR PROXIMITY SENSING - The subject matter disclosed herein relates to dynamically determining DC-offset used for proximity sensing of a mobile device | 07-19-2012 |
20140111187 | DYNAMIC DC-OFFSET DETERMINATION FOR PROXIMITY SENSING - The subject matter disclosed herein relates to dynamically determining DC-offset used for proximity sensing of a mobile device. | 04-24-2014 |
Kyoung Cheol Oh, Pleasanton, CA US
Patent application number | Description | Published |
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20090312073 | METHODS AND SYSTEMS FOR POWER SAVINGS USING A MESSAGE INDICATION HEADER - Techniques for signaling a mobile communications device in a special operating state that data bursts contain messages relevant to the special operating state. The signaling may be implemented using one or more bits in a frame control header (FCH). As a result, the mobile communication device may be decode the FCH first and decode data bursts only if there is an indication the data bursts contain a relevant message. Power savings may be achieved at the mobile communications device by avoiding decoding data bursts with no relevant messages. | 12-17-2009 |
20130279389 | METHODS AND SYSTEMS FOR POWER SAVINGS USING A MESSAGE INDICATION HEADER - Techniques for signaling a mobile communications device in a special operating state that data bursts contain messages relevant to the special operating state. The signaling may be implemented using one or more bits in a frame control header (FCH). As a result, the mobile communication device may be decode the FCH first and decode data bursts only if there is an indication the data bursts contain a relevant message. Power savings may be achieved at the mobile communications device by avoiding decoding data bursts with no relevant messages. | 10-24-2013 |
Kyung Ja Oh, Los Angeles, CA US
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20090235688 | Earring for stimulating spots on the body suitable for acupuncture - This invention is about wearing earring that stimulates the acupoints of the ear and provides easy wearing with beautiful feature. In detail, it is consisted of a pair of parts formed to press a specific part of the ear; a connecting part that links above-mentioned parts together; a decoration for the surfaces of a pair of above-mentioned parts or connecting part; a stimulating protrusion part combined with at least a part of above-mentioned pairs to stimulate acupoints. | 09-24-2009 |
Kyung S. Oh, Campbell, CA US
Patent application number | Description | Published |
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20100027356 | Dynamic On-Die Termination of Address and Command Signals - A system includes a plurality of memory devices arranged in a fly-by topology, each of the memory devices having on-die termination (ODT) circuitry for connection to an address and control (RQ) bus. The ODT circuitry has at least one input for controlling termination of one or more signal lines of the RQ bus. Application of a first logic level to the at least one input enables termination of the one or more signal lines. Application of a second logic level to the at least one input disables termination of the one or more signal lines. | 02-04-2010 |
Kyung Suk Oh, Campbell, CA US
Patent application number | Description | Published |
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20080315916 | CONTROLLING MEMORY DEVICES THAT HAVE ON-DIE TERMINATION - A memory controller for controlling integrated circuit memory devices that have on-die termination. The memory controller includes an output driver to output a first data signal onto a data line, and termination control circuitry to output termination control signals to integrated circuit memory devices coupled to the data line. The termination control signals control coupling and decoupling of termination elements to the data line according to which of the plurality of integrated circuit memory devices is selected to receive the first data signal. In particular, the termination control signals specify coupling a termination element having an impedance indicated by a first termination value to the data line within one of the plurality of integrated circuit memory devices selected to receive the first data signal, and wherein the termination control signals further specify coupling a termination element having an impedance indicated by a second termination value to the data line within at least one other of the plurality of integrated circuit memory devices. | 12-25-2008 |
20090284281 | MEMORY-MODULE BUFFER WITH ON-DIE TERMINATION - In memory module having multiple data inputs to couple to signal lines of an external data path, multiple memory integrated-circuits (ICs) and a buffer IC, the buffer IC includes respective interfaces coupled to the data inputs and the memory ICs, a first termination circuit having a first load element and a first switch element to switchably couple the first load element to a first data input of the data inputs and a second termination circuit having a second load element and a second switch element to switchably couple the second load element to the first data input. The buffer IC further includes a configuration circuit to store, in response to control information from a memory controller, a first digital value and a second digital value, the first digital value being supplied to the first termination circuit to control an impedance of the first load element and the second digital value being supplied to the second termination circuit to control an impedance of the second load element. | 11-19-2009 |
20100135378 | Receiver with Clock Recovery Circuit and Adaptive Sample and Equalizer Timing - A receiver is equipped with an adaptive phase-offset controller and associated timing-calibration circuitry that together shift the timing for a data sampler and a digital equalizer. The sample and equalizer timing is shifted to a position with less residual inter-symbol interference (ISI) energy relative to the current symbol. The shifted position may be calculated using a measure of signal quality, such as a receiver bit-error rate or a comparison of filter-tap values, to optimize the timing of data recovery. | 06-03-2010 |
20100315122 | MEMORY CONTROLLER THAT CONTROLS TERMINATION IN A MEMORY DEVICE - A memory controller that controls termination in a memory device. The memory controller includes a data interface, command/address interface and termination control output. The data interface outputs write data onto a data line coupled to a data input of the memory device, and the command/address interfaces outputs, onto a command/address path coupled to the memory device, information that indicates whether the write data is to be received within the memory device. The termination control output asserts a first termination control signal on a termination control signal line coupled to the memory device to cause the memory device to either (i) couple a first termination impedance to the data line while the write data is present at the data input of the memory device if the information indicates that the write data is to be received within the memory device, or (ii) couple a second termination impedance to the data line while the write data is present at the data input of the memory device if the information indicates that the write data is not to be received within the memory device. | 12-16-2010 |
20110119425 | DETACHABLE INTERCONNECT FOR CONFIGURABLE WIDTH MEMORY SYSTEM - The disclosure relates to a detachable signalling interconnect apparatus that provides connectivity between two or more components of a memory system in conjunction with different modes of operation of the components. The memory system comprises: a first socket to receive a first memory module; a second socket to receive a second memory module; a detachable signal-interconnect; and a memory controller coupled to the detachable signal-interconnect and configured to define a first mode of operation and a second mode of operation, wherein in the first mode of operation the detachable signal-interconnect is to couple the memory-controller to the first memory module and in the second mode of operation the detachable signal-interconnect is to couple the memory controller to the first memory module and the second memory module. | 05-19-2011 |
20110156750 | INTEGRATED CIRCUIT DEVICE WITH DYNAMICALLY SELECTED ON-DIE TERMINATION - In an integrated circuit device having dynamically selected on-die termination, a set of data inputs are coupled respectively to a set of termination circuits, each termination circuit having multiple controllable termination impedance configurations. A termination control signal input is provided to receive an indication that the integrated circuit device is to apply one of the controllable termination impedance configurations at each of the data inputs, and a logic circuit applies one of a first and a second of the controllable termination impedance configurations at the data inputs based on the indication received at the termination control signal input and an internal state of the memory device, such that during a first internal state corresponding to the reception of write data on the data inputs, the first of the controllable termination impedance configurations is applied at each of the data inputs, and during a second internal state following the first internal state, the second of the controllable termination impedance configurations is applied at each of the data inputs. | 06-30-2011 |
20110241727 | DYNAMIC ON-DIE TERMINATION SELECTION - In an integrated circuit device having dynamically selected on-die termination, a set of data inputs are coupled respectively to a set of termination circuits, each termination circuit having multiple controllable termination impedance configurations. A termination control signal input is provided to receive an indication that the integrated circuit device is to apply one of the controllable termination impedance configurations at each of the data inputs, and a logic circuit applies one of a first and a second of the controllable termination impedance configurations at the data inputs based on the indication received at the termination control signal input and an internal state of the memory device, such that during a first internal state corresponding to the reception of write data on the data inputs, the first of the controllable termination impedance configurations is applied at each of the data inputs, and during a second internal state following the first internal state, the second of the controllable termination impedance configurations is applied at each of the data inputs. | 10-06-2011 |
20110267101 | CONTROLLING DYNAMIC SELECTION OF ON-DIE TERMINATION - A control component outputs to an integrated circuit device an indication to apply one of a plurality of controllable termination impedance configurations at a data input of the integrated circuit device. The indication causes the integrated circuit device to apply a first of the controllable termination impedance configurations at the data input during a first internal state of the integrated circuit device corresponding to the reception of write data on the data input, and causes the integrated circuit device to apply a second of the controllable termination impedance configurations at the data input during a second internal state of the integrated circuit device that follows the first internal state. | 11-03-2011 |
20120265930 | CONTROLLING ON-DIE TERMINATION IN A DYNAMIC RANDOM ACCESS MEMORY DEVICE - An integrated circuit device transmits, to a dynamic random access memory device (DRAM), a write command indicating that write data is to be sampled by a data interface of the DRAM, and a plurality of commands that specify programming a plurality of control values into a plurality of corresponding registers in the DRAM. The plurality of control values include first and second control values that indicate respective first and second terminations that the DRAM is to apply to the data interface during a time interval that begins a predetermined amount of time after the DRAM receives the write command, the first termination to be applied during a first portion of the time interval while the data interface is sampling the write data and the second termination to be applied during a second portion of the time interval after the write data is sampled. | 10-18-2012 |
Kyung Suk Oh, Cupertino, CA US
Patent application number | Description | Published |
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20100073023 | SIGNAL LINES WITH INTERNAL AND EXTERNAL TERMINATION - Embodiments of a memory controller are described. This memory controller communicates signals to a memory device via a signal line, which can be a data signal line or a command/address signal line. Termination of the signal line is divided between an external impedance outside of the memory controller and an internal impedance within the memory controller. The memory controller does not activate the external impedance prior to communicating the signals and, therefore, does not deactivate the external impedance after communicating the signals. The internal impedance of the memory controller can be enabled or disabled in order to reduce interface power consumption. Moreover, the internal impedance may be implemented using a passive component, an active component or both. For example, the internal impedance may include either or both an on-die termination and at least one driver. | 03-25-2010 |
20100309964 | ASYMMETRIC COMMUNICATION ON SHARED LINKS - Embodiments of a system that communicates bidirectional data between two devices via shared links is described. In this system, data is transmitted on the shared links by one of the devices using single-ended drivers, and corresponding symbols are received on the shared links by the other device using differential comparison circuits. The data may be encoded as a series of parallel codewords prior to transmission. Each shared link may communicate a respective symbol in each codeword, which can have one of two possible logical values (e.g., a logic 0 or a logic 1). The corresponding symbols received by the other device may comprise a parallel symbol set, and each of the differential comparison circuits may compare symbols received on pairs of the shared links. A decoder in the other device may decode a respective parallel symbol set from the outputs of the differential comparison circuits to recover the encoded data. | 12-09-2010 |
20110084737 | FREQUENCY RESPONSIVE BUS CODING - A data system permits bus encoding based on frequency of the bus and the frequency of switching on the bus so as to avoid undesirable frequency conditions such as a resonant condition or interference with other electrical devices. Transmission frequencies along one or more busses are monitored and used to control the encoding process, for example, an encoding process based on data bus inversion (DBI). The use of both a measure of an absolute number of logic levels (“DBI_DC”) and a measure of a number of logic level transitions relative to a prior signal (“DBI_AC”) provides a measure of control that may be used to compensate for both main and predriver switching noise. | 04-14-2011 |
20110128040 | SIGNAL LINES WITH INTERNAL AND EXTERNAL TERMINATION - Embodiments of a memory controller are described. This memory controller communicates signals to a memory device via a signal line, which can be a data signal line or a command/address signal line. Termination of the signal line is divided between an external impedance outside of the memory controller and an internal impedance within the memory controller. The memory controller does not activate the external impedance prior to communicating the signals and, therefore, does not deactivate the external impedance after communicating the signals. The internal impedance of the memory controller can be enabled or disabled in order to reduce interface power consumption. Moreover, the internal impedance may be implemented using a passive component, an active component or both. For example, the internal impedance may include either or both an on-die termination and at least one driver. | 06-02-2011 |
20110314200 | BALANCED ON-DIE TERMINATION - Termination of a high-speed signaling link is effected by simultaneously engaging on-die termination structures within multiple integrated-circuit memory devices disposed on the same memory module, and/or within the same integrated-circuit package, and coupled to the high-speed signaling link. | 12-22-2011 |
20120081146 | SIGNAL LINES WITH INTERNAL AND EXTERNAL TERMINATION - Embodiments of a memory controller are described. This memory controller communicates signals to a memory device via a signal line, which can be a data signal line or a command/address signal line. Termination of the signal line is divided between an external impedance outside of the memory controller and an internal impedance within the memory controller. The memory controller does not activate the external impedance prior to communicating the signals and, therefore, does not deactivate the external impedance after communicating the signals. The internal impedance of the memory controller can be enabled or disabled in order to reduce interface power consumption. Moreover, the internal impedance may be implemented using a passive component, an active component or both. For example, the internal impedance may include either or both an on-die termination and at least one driver. | 04-05-2012 |
20120182044 | Methods and Systems for Reducing Supply and Termination Noise - Described is a communication system in a first integrated circuit (IC) communicates with a second IC via single-ended communication channels. A bidirectional reference channel extends between the first and second ICs and is terminated on both ends. The termination impedances at each end of the reference channel support different modes for communicating signals in different directions. The termination impedances for the reference channel can be optimized for each signaling direction. | 07-19-2012 |
20130076425 | INTEGRATED CIRCUIT DEVICE TIMING CALIBRATION - Techniques for performing timing calibration for an integrated circuit (IC) device are described. During operation, a first integrated circuit device transmits a first calibration pattern having differently delayed rising edge transitions with respect to a timing reference. The first integrated circuit device additionally transmits a second calibration pattern having differently delayed falling edge transitions with respect to the timing reference. Next, the first integrated circuit generates a timing offset for transmitting data from the first integrated circuit device. This timing offset is derived from information received from a second integrated circuit device sampling the first calibration pattern and the second calibration pattern. | 03-28-2013 |
20130194854 | MEMORY DEVICE COMPRISING PROGRAMMABLE COMMAND-AND-ADDRESS AND/OR DATA INTERFACES - A memory device comprising a programmable command-and-address (CA) interface and/or a programmable data interface is described. In an operational mode, two or more CA interfaces may be active. In another operational mode, at least one, but not all, CA interfaces may be active. In an operational mode, all of the data interfaces may be active. In another operational mode, at least one, but not all, data interfaces may be active. The memory device can include circuitry to select: an operational mode; a sub-mode within an operational mode; one or more CA interfaces as the active CA interface(s); a main CA interface from multiple active CA interfaces; and/or one or more data interfaces as the active data interfaces. The circuitry may perform these selection(s) based on one or more bits in one or more registers and/or one or more signals received on one or more pins. | 08-01-2013 |
20130307584 | MULTI-VALUED ON-DIE TERMINATION - An integrated circuit memory device stores a plurality of digital values that specify respective termination impedances. The memory device switchably couples respective sets of load elements to a data input/output (I/O) to apply the termination impedances specified by the digital values, including, applying a first termination impedance to the data I/O during an idle state of the memory device, applying a first one of two non-equal termination impedances to the data I/O while the memory device receives write data in a memory write operation and applying a second one of the two non-equal termination impedances to the data I/O while another memory device receives write data in a memory write operation. When outputting read data via the data I/O in a memory read operation, the memory device switchably couples to the data I/O at least a portion of the load elements included in the sets of load elements. | 11-21-2013 |
20130307607 | SIMULTANEOUS SWITCHING NOISE CANCELLATION BY ADJUSTING REFERENCE VOLTAGE AND SAMPLING CLOCK PHASE - A data signal is transmitted from a first circuit to a second circuit, with noise and/or jitter added to the data signal by supply noise in the power distribution network in the first circuit and/or a second circuit being effectively canceled out by adjustment of the reference voltage and/or the phase of the sampling clock used for sampling of the data signal in a manner that effectively mimics such noise and/or jitter added to the data signal. The second circuit uses a filter that has the impedance profile and/or the jitter profile of such power distribution network. The bus weight and/or the number of switching bits in the data pattern transmitted from the first circuit to the second circuit is applied to the filter to determine the adjustment to be made to the reference voltage or the phase of the sampling clock. | 11-21-2013 |
20140019792 | TIMING CALIBRATION FOR MULTIMODE I/O SYSTEMS - Integrated circuit devices that operate in different modes. In a low data rate mode, data is transferred between the integrated circuit devices at a low data rate, or no data is transferred at all. In a high data rate mode, data is transferred between integrated circuit devices at a high data rate. A transition mode facilitates the transition from the low data rate mode to the high data rate mode. During the transition mode data is transferred between the integrated circuit devices at an intermediate data rate greater than the low data rate but lower than the high data rate. Also during the transition mode, parameters affecting the transmission of data between the integrated circuit devices are calibrated at the high data rate. | 01-16-2014 |
20140043069 | POWER SAVING DRIVER DESIGN - In an asymmetrically terminated communication system, the power consumed to transmit a particular bit value is adjusted based on whether the bit being output is the second, third, fourth, etc. consecutive bit with the same value after a transition to output the particular bit value. The adjustment of the power consumed to transmit the two or more consecutive bits with the same value may be made by adjusting the driver strength during the second, or subsequent, consecutive bits with the same value. The adjustment of the power consumed is performed on the bit value that consumes the most DC power and the other value is typically not adjusted. | 02-13-2014 |
20140112084 | On-Die Termination of Address and Command Signals - A memory controller is disclosed. The memory controller is configured to be connected to one or more memory devices via an address and control (RQ) bus. Each of the memory devices have on-die termination (ODT) circuitry connected to a subset of signal lines of the RQ bus, and the memory controller is operable to selectively disable the ODT circuitry in at least one memory device of the one or more memory devices. | 04-24-2014 |
20140169438 | Receiver with Clock Recovery Circuit and Adaptive Sample and Equalizer Timing - A receiver is equipped with an adaptive phase-offset controller and associated timing-calibration circuitry that together shift the timing for a data sampler and a digital equalizer. The sample and equalizer timing is shifted to a position with less residual inter-symbol interference (ISI) energy relative to the current symbol. The shifted position may be calculated using a measure of signal quality, such as a receiver bit-error rate or a comparison of filter-tap values, to optimize the timing of data recovery. | 06-19-2014 |
20140258768 | CHANGING SETTINGS FOR A TRANSIENT PERIOD ASSOCIATED WITH A DETERMINISTIC EVENT - Disclosed embodiments relate to a system that changes transmitter and/or receiver settings to deal with reliability issues caused by a predetermined event, such as a change in a power state or a clock start event. One embodiment uses a first setting while operating a transmitter during a normal operating mode, and a second setting while operating the transmitter during a transient period following the predetermined event. A second embodiment uses similar first and second settings in a receiver, or in both a transmitter and a receiver employed on one side of a bidirectional link The first and second settings can be associated with different swing voltages, edge rates, equalizations and/or impedances. | 09-11-2014 |
20140285232 | Methods and Systems for Reducing Supply and Termination Noise - Described is a communication system in a first integrated circuit (IC) communicates with a second IC via single-ended communication channels. A bidirectional reference channel extends between the first and second ICs and is terminated on both ends. The termination impedances at each end of the reference channel support different modes for communicating signals in different directions. The termination impedances for the reference channel can be optimized for each signaling direction. | 09-25-2014 |
20140374877 | Integrated Circuits With On-Die Decoupling Capacitors - An integrated circuit includes a decoupling capacitor and an internal circuit. The decoupling capacitor is coupled to a first external terminal of the integrated circuit. The internal circuit in the integrated circuit is coupled to a second external terminal of the integrated circuit. The decoupling capacitor is coupled to provide supply voltage current to the internal circuit through the first and the second external terminals and through external conductors. The external conductors are outside the integrated circuit. | 12-25-2014 |
20150042378 | BUFFERED MEMORY MODULE HAVING MULTI-VALUED ON-DIE TERMINATION - In a memory module having an integrated-circuit buffer device coupled to one or more integrated-circuit memory devices, the buffer device receives write data signals from an external control component via a set of data inputs, the write data signals indicating write data to be stored within one or more of the memory devices. Logic within the buffer device sequentially applies controllable termination impedance configurations at the data inputs based on an indication received from the control component and an internal state of the buffer device, applying a first controllable termination impedance configuration at each of the data inputs during a first internal state of the buffer device corresponding to the reception of the write data signals on the data inputs, and applying a second controllable termination impedance configuration at each of the data inputs during a second internal state of the buffer device that succeeds the first internal state. | 02-12-2015 |
20150084672 | COMMAND-TRIGGERED ON-DIE TERMINATION - An integrated circuit device transmits to a dynamic random access memory (DRAM) one or more commands that specify programming of a digital control value within the DRAM, the digital control value indicating a termination impedance that the DRAM is to couple to a data interface of the DRAM in response to receiving a write command and during reception of write data corresponding to the write command, and that the DRAM is to decouple from the data interface after reception of the write data corresponding to the write command. Thereafter, the integrated circuit device transmits to the DRAM a write command indicating that write data is to be sampled by a data interface of the DRAM during a first time interval and that cause the DRAM to couple the termination impedance to the data interface during the first time interval and decouple the termination impedance from the data interface after the first time interval. | 03-26-2015 |
Kyuong Cheol Oh, Danville, CA US
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20100118797 | METHODS AND SYSTEMS USING FAST DL / UL SYNCHRONIZATION FOR MOBILE SYSTEMS - Certain embodiments provide techniques and apparatus that may allow for improvements in performance and power consumption in sleep and idle mode through fast DL and UL synchronization for wireless communications systems, such as Mobile WiMAX Systems. | 05-13-2010 |
Kyutaeg Oh, San Ramon, CA US
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20090234994 | Method, apparatus, and system for port multiplier enhancement - A method, apparatus and system are provided for enhancing port multipliers. In one embodiment, a port multiplier is configured to couple a network host with port multipliers. The port multiplier includes a top port multiplier to establish and maintain communication with each of the port multipliers to communicate with the network host, and the port multipliers having intermediate port multipliers and/or bottom port multipliers. Further, network devices are in communication with the port multipliers, the port multiplier, and the network host. | 09-17-2009 |
20120166701 | MECHANISM FOR FACILITATING A CONFIGURABLE PORT-TYPE PERIPHERAL COMPONENT INTERCONNECT EXPRESS/SERIAL ADVANCED TECHNOLOGY ATTACHMENT HOST CONTROLLER ARCHITECTURE - A mechanism for facilitating configuration of port-type Peripheral Component Interconnect Express/Serial Advanced Technology Attachment host controller architecture is described. In one embodiment, an apparatus includes a plurality of PHYs to be used as Peripheral Component Interconnect Express (PCIe) ports and Serial Advanced Technology Attachment (SATA) ports, and logic to facilitate swapping of one or more of the plurality of PHYs between being the PCIe ports and the SATA ports. | 06-28-2012 |
Kyuteag Oh, San Ramon, CA US
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20110283025 | MULTI-LEVEL PORT EXPANSION FOR PORT MULTIPLIERS - A port multiplier dynamically determines and reports its identity based on a number of supported downstream port connections. The number of supported downstream port connections can dynamically change. The port multiplier identifies devices connected to its downstream ports, whether storage devices or other port multipliers. Based on a total number of downstream ports, the port multiplier reports its identity upstream. The upstream reporting can be to another port multiplier, or the host device if directly connected to the host device. The port multiplier receives storage address space allocation from upstream based on its reported identity, and allocates the storage address space to its downstream ports. | 11-17-2011 |
Min Oh, Lakewood, CA US
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20090000046 | GOLF CLUB BRUSH - A golf brush is disclosed having a handle portion and a head portion, the head portion including a first set of bristles on a first side, where said bristles are made of a first material, and a second set of bristles on an opposite side, where said bristles are made of a second material. The head portion of the brush further comprises a hook member extending longitudinally from the head portion away from the handle portion, and a spring actuated closure member engaging the hook member to open and close the hook. The spring actuated closure member is manually displaced by a projecting button protruding from the head portion and slidable within a longitudinal slot in the head member. | 01-01-2009 |
Nahmsuk Oh, Goleta, CA US
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20080243414 | Determining a design attribute by estimation and by calibration of estimated value - A computer-implemented method of determining an attribute of a circuit includes using a computationally expensive technique to simulate the attribute (such as timing delay or slew) of a portion of the circuit, at predetermined values of various parameters (e.g. nominal values of channel length or metal width), to obtain at least a first value of the attribute. The method also uses a computationally inexpensive technique to estimate the same attribute, thereby to obtain at least a second value which is less accurate than the first value. Then the computationally inexpensive technique is repeatedly used on other values of the parameter(s), to obtain a number of additional second values of the attribute. Applying to the additional second values, a function obtained by calibrating the at least one second value to the at least one first value, can yield calibrated estimates very quickly, which represent the attribute's variation relatively accurately. | 10-02-2008 |
20090055787 | Generation of Engineering Change Order (ECO) Constraints For Use In Selecting ECO Repair Techniques - Static timing and/or noise analysis are performed on a netlist of an integrated circuit, to estimate behavior of the netlist and to identify at least one violation by said behavior of a corresponding requirement thereon, such as setup time, hold time or bump height in a quiescent net. Thereafter, effect of engineering change order (ECO) to correct the violation are automatically analyzed, based on the layout, the parasitics, the timing and/or noise behavior, and the violation, followed by generation of a constraint on the behavior (called “ECO” constraint), such as a timing constraint and/or a noise constraint. Next, the ECO constraint is automatically used, e.g. in a place and route tool, to select an ECO repair technique, from several ECO repair techniques that can overcome the violation. The selected ECO repair technique is automatically applied to the layout, to generate a modified layout which does not have the violation. | 02-26-2009 |
20100218152 | VARIATION AWARE VICTIM AND AGGRESSOR TIMING OVERLAP DETECTION BY PESSIMISM REDUCTION BASED ON RELATIVE POSITIONS OF TIMING WINDOWS - A computer is programmed to identify a number of groups of timing windows, each group including a victim timing window and one (or more) aggressor timing window(s), respectively for a victim net and one (or more) aggressor nets in an IC design. The computer automatically slides (i.e. shifts in time) the victim and aggressor timing windows as a group for each die, i.e. by a specific amount that is identical for all timing windows of an instance of a coupled stage in a die, but differs for other instances of the same coupled stage in other dies. Crosstalk analysis is then performed, using time-shifted timing windows which result from sliding, to identify overlapping victim and aggressor nets, followed by variation aware delay calculations to identify timing violations and timing critical nets, followed by revision of the IC design, which is eventually fabricated in a wafer of semiconductor material. | 08-26-2010 |
20100229136 | CROSSTALK TIME-DELAY ANALYSIS USING RANDOM VARIABLES - Embodiments of a computer system, a method, an integrated circuit and a computer-program product (i.e., software) for use with the computer system are described. These devices and techniques may be used to calculate the total time delay in a signal path due to crosstalk from a group of crosstalk aggressors that are associated with a group of signal paths. In order to properly account for statistical behaviors in the switching times and directions of the switching patterns in the group of signal paths, the time-delay contribution from each of these crosstalk aggressors may be modeled as a corresponding statistical random variable. Because the number of crosstalk aggressors are usually much larger than the number of stages in the signal path, the calculated total path delay may be less pessimistic. Furthermore, in order to detect potential timing violations, the time-delay contributions from additional dominant crosstalk aggressors can be modeled using non-statistical worst-case deterministic values. | 09-09-2010 |
20110113396 | DETERMINING A DESIGN ATTRIBUTE BY ESTIMATION AND BY CALIBRATION OF ESTIMATED VALUE - A computer-implemented method of determining an attribute of a circuit includes using a computationally expensive technique to simulate the attribute (such as timing delay or slew) of a portion of the circuit, at predetermined values of various parameters (e.g. nominal values of channel length or metal width), to obtain at least a first value of the attribute. The method also uses a computationally inexpensive technique to estimate the same attribute, thereby to obtain at least a second value which is less accurate than the first value. Then the computationally inexpensive technique is repeatedly used on other values of the parameter(s), to obtain a number of additional second values of the attribute. Applying to the additional second values, a function obtained by calibrating the at least one second value to the at least one first value, can yield calibrated estimates very quickly, which represent the attribute's variation relatively accurately. | 05-12-2011 |
20140059508 | Determining A Design Attribute By Estimation And By Calibration Of Estimated Value - A computer-implemented method of determining an attribute of a circuit includes using a computationally expensive technique to simulate the attribute (such as timing delay or slew) of a portion of the circuit, at predetermined values of various parameters (e.g. nominal values of channel length or metal width), to obtain at least a first value of the attribute. The method also uses a computationally inexpensive technique to estimate the same attribute, thereby to obtain at least a second value which is less accurate than the first value. Then the computationally inexpensive technique is repeatedly used on other values of the parameter(s), to obtain a number of additional second values of the attribute. Applying to the additional second values, a function obtained by calibrating the at least one second value to the at least one first value, can yield calibrated estimates very quickly, which represent the attribute's variation relatively accurately. | 02-27-2014 |
Nahmsuk Oh, Palo Alto, CA US
Patent application number | Description | Published |
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20110185335 | DETERMINING AN ORDER FOR VISITING CIRCUIT BLOCKS IN A CIRCUIT DESIGN FOR FIXING DESIGN REQUIREMENT VIOLATIONS - Some embodiments of the present invention provide techniques and systems for determining an order for visiting circuit blocks of a circuit design for fixing design requirement violations. Fixing design requirement violations by visiting circuit blocks in this order can improve performance and quality of results. During operation, a system can determine a set of equal value segments in the circuit design. In some embodiments, the system determines equal value segments for multiple corners and combines the equal value segments to obtain the set of equal value segments. Next, the system can determine an order for visiting circuit blocks of the circuit design for fixing design requirement violations based at least on the set of equal value segments. Note that circuit block pins in an equal value segment are associated with the same parameter value, and parameter values indicate an amount or degree of a design requirement violation. | 07-28-2011 |
20120131525 | METHOD AND APPARATUS FOR FIXING DESIGN REQUIREMENT VIOLATIONS IN MULTIPLE MULTI-CORNER MULTI-MODE SCENARIOS - Systems and techniques for fixing design requirement violations in a circuit design in multiple scenarios are described. During operation, a system can receive a scenario image and a multi-scenario ECO database. The scenario image can store parameter values for circuit objects in a scenario, and the multi-scenario ECO database can store a subset of parameter values for a subset of circuit objects in multiple scenarios. Next, the system can determine an engineering change order to fix one or more design requirement violations, which can involve estimating parameter values for circuit objects in multiple scenarios using parameter values stored in the scenario image and the multi-scenario ECO database. | 05-24-2012 |
Philip Oh, San Diego, CA US
Patent application number | Description | Published |
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20110044893 | VASCULAR TARGETS FOR DETECTING, IMAGING AND TREATING NEOPLASIA OR NEOVASCULATURE - Methods of delivering an agent in a tissue-specific manner, by targeting annexin A1, a derivative of annexin A1, or a binding partner of annexin A1, are described. The methods can be used for detecting, imaging and/or treating neoplasia, angiogenesis or neovasculature, as well as for diagnostics and methods of assessing treatment efficacy. Antibodies to annexin A1 are also described, as are methods screening for agents altering annexin A1 activity. | 02-24-2011 |
20110173709 | ECTOPIC, ORTHOTOPIC MODEL FOR REVASCULARIZATION AND TUMOR ASSESSMENT - Improved vascularization and tumor models, comprising a test animal having a dorsal skin window chamber, and an exogenous tissue sample implanted ectopically in the skin within the window chamber, are described, as are methods of using the models. | 07-14-2011 |
Sangmun Oh, San Jose, CA US
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20120127603 | MAGNETIC TUNNEL JUNCTION HAVING A MAGNETIC INSERTION LAYER AND METHODS OF PRODUCING THE SAME - According to one embodiment, a magnetic head includes a barrier layer having a crystalline structure, a first magnetic layer above the barrier layer, a magnetic insertion layer above the first magnetic layer, and a second magnetic layer above the magnetic insertion layer, the second magnetic layer having a textured face-centered cubic (fcc) structure. The first magnetic layer comprises a high spin polarization magnetic material having a crystalline structure and a characteristic of crystallization being more similar to the crystalline structure of the barrier layer than a crystalline structure of the second magnetic layer and the magnetic insertion layer comprises a magnetic material having a crystalline structure and a characteristic of crystallization being more similar to the crystalline structure of the second magnetic layer than the crystalline structure of the barrier layer. Additional magnetic head structures and methods of producing magnetic heads are described according to more embodiments. | 05-24-2012 |
20140355152 | INTERLAYER COUPLED FREE LAYER WITH OUT OF PLANE MAGNETIC ORIENTATION FOR MAGNETIC READ HEAD - In one embodiment, a magnetic head includes a reference layer having magnetic orientation about aligned with a plane of deposition thereof; a first free layer having a magnetic orientation out of a plane of deposition thereof; a spacer layer between the reference layer and the first free layer; a second free layer having a magnetic orientation out of a plane of deposition thereof; and an inserting layer between the first and second free layers. | 12-04-2014 |
Scott Oh, Rancho Cucamonga, CA US
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20110198376 | SHOPPING CART DEVICE - A shopping cart device includes a shopping bag, hook devices, supporting bars, handles, and fasteners. The shopping bag has an opening surrounded by a rim portion. The hook devices are attached to the rim portion of the shopping bag and configured to engage the shopping cart so as to hold the shopping bag in place on the shopping cart. The supporting bars are fixed to the part of the rim portion of the shopping bag, and each of the pair of hook devices is fixed to a corresponding one of the supporting bars. The handles are fixed to a corresponding one to the supporting bars. The fasteners are fixed to a part of the supporting bars, and the fasteners are configured to stick together detachably when unhooked from the shopping cart. | 08-18-2011 |
Seajin Oh, Palo Alto, CA US
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20090241894 | COMPLIANT WALLED COMBUSTION DEVICES - Combustion devices described herein comprise a compliant combustion chamber wall or segment. The compliant segment deforms during combustion in the combustion chamber. Some devices may include a compliant wall configured to stretch responsive to pressure generated by combustion of a fuel in the combustion chamber. A coupling portion translates deformation of the compliant segment or wall into mechanical output. One or more ports are configured to inlet an oxygen source and fuel into the combustion chamber and to outlet exhaust gases from the combustion chamber. | 10-01-2009 |
20110154641 | ELECTROACTIVE POLYMER MANUFACTURING - Described herein are transducers and their fabrication. The transducers convert between mechanical and electrical energy. Some transducers of the present invention include a pre-strained polymer. The pre-strain improves the conversion between electrical and mechanical energy. The present invention provides methods for fabricating electromechanical devices including one or more electroactive polymers. | 06-30-2011 |
20110155307 | ELECTROACTIVE POLYMER MANUFACTURING - Described herein are transducers and their fabrication. The transducers convert between mechanical and electrical energy. Some transducers of the present invention include a pre-strained polymer. The pre-strain improves the conversion between electrical and mechanical energy. The present invention provides methods for fabricating electromechanical devices including one or more electroactive polymers. | 06-30-2011 |
20120169184 | ELECTROACTIVE POLYMER MANUFACTURING - Described herein are transducers and their fabrication. The transducers convert between mechanical and electrical energy. Some transducers of the present invention include a pre-strained polymer. The pre-strain improves the conversion between electrical and mechanical energy. The present invention provides methods for fabricating electromechanical devices including one or more electroactive polymers. | 07-05-2012 |
Sea-Jin Oh, Palo Alto, CA US
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20110121486 | METHOD OF MANUFACTURING SOLID SOLUTION PEFORATOR PATCHES AND USES THEREOF - Methods for fabricating and manufacturing solid solution perforators (SSPs) using sharp metal or glass needles and/or subsequent molding and use are described. The methods entail making microneedles by various precision machining techniques and micromold structures from curable materials. Various designs of patch, cartridge and applicator are described. Also described are methods for adjusting the microneedle mechanical strength using formulation and/or post-drying processes. | 05-26-2011 |
Se Baek Oh, Millbrae, CA US
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20120327489 | SYSTEM, METHOD AND APPARATUS FOR WAVELENGTH-CODED MULTI-FOCAL MICROSCOPY - A volume holographic imaging system, apparatus, and/or method enables the projection of a two-dimensional (2D) slice of a four-dimensional (4D) probing object. A 4D probing source object is illuminated to emit or scatter an optical field. A holographic element having one or more recorded holograms receives and diffracts the optical field into a diffracted plane beam having spectral information. A 4-f telecentric relay system includes a pupil filter on the relayed conjugate plane of the volume hologram and images the pupil of the volume hologram onto the front focal plane of the collector lens. A collector lens focuses the diffracted plane beam to a 2D slice of the 4D probing source object. The focused 2D slice is projected onto a 2D imaging plane. The holographic element may have multiple multiplexed holograms that are arranged to diffract light from the corresponding slice of the 4D probing source object. | 12-27-2012 |
Seik Oh, Laguna Hills, CA US
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20100154909 | MULTIRATE TUBING FLOW CONTROL VALVE - A flow control valve includes a stem extending into an interior bore defined by a wall of a flow control member of the valve, the stem and the wall defining therebetween a cylindrical space allowing fluid communication between apertures formed in differing planes of the flow control member. | 06-24-2010 |
Seik Oh, Trabuco Canyon, CA US
Patent application number | Description | Published |
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20100121274 | PREFILLABLE CONSTANT PRESSURE AMBULATORY INFUSION PUMP - A portable infusion device is provided that includes a cylindrical housing having a housing end, an inflatable cartridge sized to fit within the housing and a piston located within the housing. The cartridge can include a cartridge end having an inlet and an outlet. The cartridge end can be connected to an inflatable portion and be configured to be releasably secured to the housing end when the cartridge is inserted into the housing through the housing end. The piston can include at least one biasing device positioned to apply a constant force to the inflatable portion to expel a medical fluid from the cartridge. | 05-13-2010 |
20130081726 | FLOW REGULATOR FOR INFUSION PUMP AND METHOD OF MANUFACTURING THE SAME - An ambulatory drug infusion system includes a disposable ambulatory infusion pump and a flow regulator for regulating flow of the drug supplied from the disposable ambulatory infusion pump. The flow regulator includes a cylinder assembly of first, second and third cylinders arranged coaxially. The flow regulator includes a continuous spiral liquid-flow channel formed between the first cylinder and the second cylinder fitted into the first cylinder. The regulator includes bypass through-holes in communication with the spiral channel and formed in the second cylinder. The regulator further includes liquid-flow passages formed between the second cylinder and the third cylinder fitted into the second cylinder. The through-holes are in communication with the passages, respectively. One of the passages can be selected to choose a predetermined flow rate. The regulator further includes a diaphragm valve which can regulate fluid communication between the spiral liquid-flow channel and an outlet. | 04-04-2013 |
20140155829 | DISPOSABLE AMBULATORY INFUSION PUMP HAVING TELESCOPIC HOUSING - A disposable ambulatory infuser apparatus provides an elastomeric balloon within a telescopic housing. One end of the balloon may be attached to an upper housing portion and the other end of the balloon may be attached to a bottom housing portion. As the balloon is charged with a drug, it may expand primarily radially first and then axially. The balloon may be configured to have the majority of displacement occur in the axial direction, which enables the two housing portions to expand away from each other and shrink toward one another in the axial direction as the balloon is filled with the drug and the drug is subsequently infused in a patient. The balloon may expand axially naturally within the housing to eliminate possible pressure change due to constraints by the housing or clamps, which enables more constant flow rate of the drug being dispensed. | 06-05-2014 |
Seokyong Oh, San Diego, CA US
Patent application number | Description | Published |
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20120275548 | METHOD AND APPARATUS FOR DATA QUANTIZATION AND PACKING WITH VARIABLE BIT WIDTH AND PERIOD - The various embodiments provide circuitry and methods for packing Log Likelihood Ratio (“LLR”) values into a buffer memory in a compressed format which reduces the amount of buffer memory required. Various embodiments use a type of quantization which reduces the bit width of the LLR values that are stored, with the particular level of quantization depending upon the code rate of the data. The degree, pattern, and periodicity of bit width compression employed may depend upon the code rate of the received transmission. Bit width patterns use for LLR value quantization may be generated by a shift register circuit which provides an efficient mechanism for controlling an LLR packer circuit based upon the code rate of the received signal. | 11-01-2012 |
Seunghan Oh, San Diego, CA US
Patent application number | Description | Published |
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20090220561 | COMPOSITIONS COMPRISING NANOSTRUCTURES FOR CELL, TISSUE AND ARTIFICIAL ORGAN GROWTH, AND METHODS FOR MAKING AND USING SAME - The invention provides articles of manufacture comprising biocompatible nanostructures comprising nanotubes and nanopores for, e.g., organ, tissue and/or cell growth, e.g., for bone, kidney or liver growth, and uses thereof, e.g., for in vitro testing, in vivo implants, including their use in making and using artificial organs, and related therapeutics. The invention provides lock-in nanostructures comprising a plurality of nanopores or nanotubes, wherein the nanopore or nanotube entrance has a smaller diameter or size than the rest (the interior) of the nanopore or nanotube. The invention also provides dual structured biomaterial comprising micro- or macro-pores and nanopores. The invention provides biomaterials having a surface comprising a plurality of enlarged diameter nanopores and/or nanotubes. | 09-03-2009 |
20100303716 | SWITCHABLE NANO-VEHICLE DELIVERY SYSTEMS, AND METHODS FOR MAKING AND USING THEM - The invention provides nanodevices or products of manufacture for use as drug delivery vehicles. In one aspect, the invention provides nanodevices or products of manufacture having on-off release mechanisms, e.g., that are “switchable”, or “actuatable” (for example magnetically or ultrasonically switchable), for compounds contained within, e.g., for use as drug delivery nano-vehicles having on-off drug release mechanisms, and their therapeutic applications. | 12-02-2010 |
20100303722 | ARTICLES COMPRISING LARGE-SURFACE-AREA BIO-COMPATIBLE MATERIALS AND METHODS FOR MAKING AND USING THEM - The present invention provides articles of manufacture comprising biocompatible nanostructures comprising significantly increased surface area for, e.g., organ, tissue and/or cell growth, e.g., for bone, tooth, kidney or liver growth, and uses thereof, e.g., for in vitro testing of drugs, chemicals or toxins, or as in vivo implants, including their use in making and using artificial tissues and organs, and related, diagnostic, screening, research and development and therapeutic uses, e.g., as drug delivery devices. The present invention provides biocompatible nanostructures with significantly increased surface area, such as with nanotube and nanopore array on the surface of metallic, ceramic, or polymer materials for enhanced cell and bone growth, for in vitro and in vivo testing, cleansing reaction, implants and therapeutics. The present invention provides optically transparent or translucent cell-culturing substrates. The present invention provides biocompatible and cell-growth-enhancing culture substrates comprising elastically compliant protruding nanostructure substrates coated with Ti, TiO | 12-02-2010 |
20110159070 | BIOMATERIALS AND IMPLANTS FOR ENHANCED CARTILAGE FORMATION, AND METHODS FOR MAKING AND USING THEM - The invention provides products of manufacture, e.g., biomaterials and implants, for cartilage maintenance and/or formation in-vivo, in-vitro, and ex-vivo, using nanotechnology, e.g., using nanotube, nanowire, nanopillar and/or nanodepots configured on surface structures of the products of manufacture. | 06-30-2011 |
Seung June Oh, Santa Monica, CA US
Patent application number | Description | Published |
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20080293431 | Systems, devices and methods for location determination - In part, the invention relates to a method for generating location data using a wireless mobile device, the wireless mobile device adapted to communicate with a plurality of location services, each service associated with one of a plurality of networks. In one embodiment, the method comprises the steps of: selecting a first location service from the plurality of location services; transmitting a first request for location data to the first location service; if the first request fails, selecting a second location service from the plurality of location services; and receiving location data from one of the first and the second location services. | 11-27-2008 |
20090047979 | Systems, devices and methods for location determination - A method and system for location determination of a multi-mode device using a plurality of GPS fixation processes, each fixation process using a different mode (e.g. Cell-ID, MS-Assist, and MS-based) of the device is provided. The invention relates to methods for quickly obtaining and displaying geographic location of a mobile device on its display. These methods can be performed by applying successive fixation steps as outline herein. | 02-19-2009 |
Seungseok Oh, Los Angeles, CA US
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20130094749 | MODEL-BASED CORONARY ARTERY CALCIUM SCORING - A system and method are provided for model-based coronary artery calcium (CAC) scoring. A model image of a heart region is aligned with an image of a patient's heart region in order to more easily identify the coronary arteries and other relevant anatomical features in the image. Once the images are aligned, relevant calcium plaques are identified by their presence within a coronary artery, and the relevant plaques are then labeled by the specific coronary artery in which they are located. The coronary arteries with the labeled plaques are scored individually based on their size and X-ray attenuation, and an overall score based on all of the relevant plaques is then computed, which is related to the patient's risk for coronary artery disease. | 04-18-2013 |
Sewon Oh, Los Angeles, CA US
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20090276800 | METHOD AND SYSTEM OF CHANGING A RECEIVER BETWEEN A HIGH DEFINITION AND STANDARD DEFINITION MODE - A system and method for controlling a receiving unit to switch services includes a network operation center communicating a service signal to the receiving unit and an evaluate signal to the receiving unit. The receiving unit changes a service of the receiving unit in response to the evaluate signal. | 11-05-2009 |
20090276810 | RECEIVER UNIT CHANGING BETWEEN A HIGH DEFINITION MODE AND STANDARD MODE AND METHOD THEREFOR - A system and method of switching services in a receiver unit includes a verifier module in the receiver unit receiving a service signal and middleware within the receiving unit receiving an evaluate signal and enabling the verifier to determine a service change from the service signal. The middleware changing a service flag for the service when a service change is determined at the verifier. | 11-05-2009 |
Soojin Oh, Dublin, CA US
Patent application number | Description | Published |
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20080199626 | Method for assembling nano objects - A method for the self assembly of a macroscopic structure with a pre-formed nano object is provided. The method includes processing a nano object to a desired aspect ratio and chemical functionality and mixing the processed nano object with a solvent to form a suspension. Upon formation of the suspension, a substrate is inserted into the suspension. By evaporation of the solvent, changing the pH value of the suspension, or changing the temperature of the suspension, the nano objects within the suspension deposit onto the substrate in an orientational order. In addition, a seed crystal may be used in place of the substrate thereby forming single-crystals and free-standing membranes of the nano-objects. | 08-21-2008 |
Sooseok Oh, Santa Clara, CA US
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20110181237 | EXTENDED RANGE WIRELESS CHARGING AND POWERING SYSTEM - Exemplary embodiments provide for an apparatus and a method for extended range wireless powering and charging of low-power electrical devices. The apparatus and method may comprise circuits and steps for receiving radio frequency energy; circuits and steps for resonating the radio frequency energy to increase the amplitude of the radio frequency energy; circuits and steps for retransmitting the resonated radio frequency energy; circuits and steps for receiving the retransmitted resonated radio frequency energy; and circuits and steps for converting for converting the retransmitted resonated radio frequency energy into direct current for the extended range wireless powering and charging of low-power electrical devices. | 07-28-2011 |
Sooseok Oh, Fremont, CA US
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20130061303 | Authentication System and Method in a Contactless Environment - A method of providing continuous authentication in a contactless environment is provided. The method includes providing a reader having a contactless interface, as well as a device, operable to communicate with the reader. The method further includes the steps of receiving at the reader a first authentication request from the device, and communicating from the reader a second authentication request to a secure transaction service. The secure transaction service holds authentication credentials relating to the device. Authentication credentials relating to the device are received at the reader from the secure transaction service, and the reader provides continuous authentication based at least in part on the authentication credentials received from the secure transaction service. | 03-07-2013 |
Suk Joon Oh, Torrance, CA US
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20080251396 | Jewelry box with electronic display apparatus - An improved jewelry box having electronic display apparatus includes a top section pivotally connected to a bottom section by a hinge. By opening the box, an LCD or other devices display video, audio or photographic data intended for the recipient of the jewelry. A switch is provided which activates the display of the data once the box is opened by the recipient and to turn the display off upon closing the box. The jewelry box includes a light source controlled by the switch so that the light source is illuminated after the box is opened to further enhance the perceived value of the jewelry. A multimedia memory card slot or a USB port is provided for exchanging data between an external memory source, such as MMC/SD cards, and the internal memory of the jewelry box to change, add to or modify the video, audio or photographic data to be displayed. The jewelry box includes a rechargeable battery to provide a power source for the LCD and other devices. | 10-16-2008 |
Sung Hoon Oh, Sunnyvale, CA US
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20130044030 | Dual Radiator Monopole Antenna - A dual radiator monopole antenna. An elongated low-band ground-coupled arm is disposed on a first surface of a printed circuit board. This arm is electrically connected to and spaced apart from a ground plane. An elongated high-band ground-coupled arm is disposed on a second surface of the printed circuit board, and like the low-band arm is electrically connected to and spaced apart from the ground plane. The high-band arm is oriented parallel to, and laterally displaced from, the low-hand ground-coupled ann. An elongated feed arm is disposed on the first surface of the printed circuit board, oriented parallel the ground-coupled arms and laterally displaced from them. A conductor in electrical feed connection with the feed arm extends from the feed arm across a portion of the ground plane. | 02-21-2013 |
Sung-Hoon Oh, Cupertino, CA US
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20120154222 | MULTIBAND ANTENNA WITH GROUNDED ELEMENT - Various embodiments of an antenna structure for mobile devices are described. In one or more embodiments a multi-band antenna includes a grounded parasitic element. In some embodiments, a high band arm is provided, and is fed off-center, so that the resonating arms are not symmetrical in length. In some embodiments, a coupled ground resonator is included to add a differential resonating mode. A ground leg may be included to offer facilitate impedance and inductance matching. The combination of these structures creates four distinct resonance modes for the high band, which creases a wide effective bandwidth for the disclosed antenna. Other embodiments are described and claimed. | 06-21-2012 |
20120154223 | SIGNAL GENERATION THROUGH USING A GROUNDING ARM AND EXCITATION STRUCTURE - Disclosed is an apparatus and method to create multiple signals by utilizing the ground plane as part of the antenna. The apparatus comprises an excitation structure that includes a first segment and a second segment joined to form an angle, the first segment to generate a first signal and the second segment to generate a second signal. The apparatus also includes a ground plane that includes a slot with a perimeter, the excitation structure residing within the perimeter of the slot. Further, the apparatus also includes at least one ground arm coupled to the ground plane and formed from at least a portion of the perimeter of the slot, the at least one ground arm to generate a third signal from at least one of the first signal or the second signal. | 06-21-2012 |
20120169547 | MULTIBAND ANTENNA WITH SURROUNDING CONDUCTIVE COSMETIC FEATURE - Various embodiments of an antenna structure for mobile devices are described. In one or more embodiments a multi-band antenna includes a multi-band antenna with a conductive cosmetic feature operating as a resonating element. In some embodiments, an antenna includes a folded monopole element, a loop element formed between a portion of the conductive cosmetic feature and the printed circuit board and an L-shaped slot antenna element defined in part by a side surface of the conductive cosmetic feature. In some embodiments the folded monopole element, the loop element, and the slot antenna element are capable of resonating in response to a signal applied to the folded monopole element. Other embodiments are described and claimed. | 07-05-2012 |
20120169568 | MULTIBAND ANTENNA WITH GROUND RESONATOR AND TUNING ELEMENT - Various embodiments of an antenna structure for mobile devices are described. In one or more embodiments a multi-band antenna includes first, second and third resonating elements. The first and second resonating elements may each have an L-shape, and may be fed by a single feed leg. The third resonating element may be coupled to ground. In some embodiments, the first resonating element may be longer than the second resonating element, and the third resonating element may be positioned adjacent to the first resonating element. In other embodiments, a tuning element is coupled to the signal feed and is positioned adjacent to the second resonating element. The tuning element may have a geometry that is similar to a geometry of the second resonating element. The combination of these structures creates a plurality of distinct resonance modes which creases a wide effective bandwidth for the disclosed antenna. Other embodiments are described and claimed. | 07-05-2012 |
20140126172 | PORTABLE ELECTRONIC DEVICE BODY HAVING LASER PERFORATION APERTURES AND ASSOCIATED FABRICATION METHOD - A method of fabricating the body of the portable electronic device as well as the resulting portable electronic device and its body are provided to facilitate the transmission of radio frequency signals through the body of the portable electronic device. In the context of a method, at least one aperture and, in some instances, a plurality of apertures are defined by laser perforation through a conductive portion of the body of the portable electronic device. The method may also anodize the conductive portion including at least partially filling the at least one aperture with an anodization layer. As such, the conductive portion of the body of the portable electronic device has a relatively consistent, metallic appearance, even though laser perforation apertures are defined therein for supporting the transmission of radio frequency signals. | 05-08-2014 |
Sung-Hoon Oh, San Diego, CA US
Patent application number | Description | Published |
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20100164829 | COUNTERPOISE TO MITIGATE NEAR FIELD RADIATION GENERATED BY WIRELESS COMMUNICATION DEVICES | 07-01-2010 |
Sung Joon Oh, Fullerton, CA US
Patent application number | Description | Published |
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20130190039 | SYSTEMS AND METHODS FOR REQUESTING AND RECEIVING SERVICE - Systems and methods for requesting and receiving service that includes a table having an input code such as a Quick Response Code, a smartphone having an application which is utilized to read the input code on the table and which communicates with a computer server that communicates with a computer such as a tablet personal computer used by a provider of the service. | 07-25-2013 |
Tae Gon Oh, Los Angeles, CA US
Patent application number | Description | Published |
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20090025809 | ROTATABLE FAUCET WITH WATER TEMPERATURE RETAINING FEATURE - A rotatable water faucet having a water temperature retaining feature includes a hot water control, a cold water control, a mixing chamber for receiving the hot and cold water, a water passage rotatably connected to the mixing chamber for dispensing a mixture of hot and cold water received from the mixing chamber through an outlet of the water passage, and a master control for controlling the dispensing of water through the outlet, wherein the master control is capable of stopping the dispensing of water through the outlet while at least one of the hot water control and the cold water control is in an open position, wherein rotation of the water passage is capable of stopping the dispensing of water through the outlet while the master control, and at least one of the hot water control and the cold water control are in the open position. | 01-29-2009 |
Travis Byonghyop Oh, San Jose, CA US
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20090026441 | Continuous plane of thin-film materials for a two-terminal cross-point memory - A structure for a memory device including a plurality of substantially planar thin-film layers or a plurality of conformal thin-film layers is disclosed. The thin-film layers form a memory element that is electrically in series with first and second cladded conductors and operative to store data as a plurality of conductivity profiles. A select voltage applied across the first and second cladded conductors is operative to perform data operations on the memory device. The memory device may optionally include a non-ohmic device electrically in series with the memory element and the first and second cladded conductors. Fabrication of the memory device does not require the plurality of thin-film layers be etched in order to form the memory element. The memory element can include a CMO layer having a selectively crystallized polycrystalline portion and an amorphous portion. The cladded conductors can include a core material made from copper. | 01-29-2009 |
20090026442 | Continuous plane of thin-film materials for a two-terminal cross-point memory - A structure for a memory device including a plurality of substantially planar thin-film layers or a plurality of conformal thin-film layers is disclosed. The thin-film layers form a memory element that is electrically in series with first and second cladded conductors and operative to store data as a plurality of conductivity profiles. A select voltage applied across the first and second cladded conductors is operative to perform data operations on the memory device. The memory device may optionally include a non-ohmic device electrically in series with the memory element and the first and second cladded conductors. Fabrication of the memory device does not require the plurality of thin-film layers be etched in order to form the memory element. The memory element can include a CMO layer having a selectively crystallized polycrystalline portion and an amorphous portion. The cladded conductors can include a core material made from copper. | 01-29-2009 |
20090029555 | Multi-Step selective etching for cross-point memory - Multi-step selective etching. Etching an unmasked region associated with each layer of a plurality of layers, the plurality of layers comprising a stack, wherein the unmasked region of each of the plurality of layers is etched while exposed to a temperature, a pressure, a vacuum, using a plurality of etchants, wherein at least one of the plurality of etchants comprises an inert gas and oxygen, wherein the etchant oxidizes the at least one layer that can be oxidized such that the etching stops, the plurality of etchants leaving substantially unaffected a masked region associated with each layer of the plurality of layers, wherein two or more of the plurality of layers comprises a memory stack, and preventing corrosion of at least one of the plurality of layers comprising a conductive metal oxide by supplying oxygen to the stack after etching the unmasked region without breaking the vacuum. | 01-29-2009 |
20100265762 | Continuous plane of thin-film materials for a two-terminal cross-point memory - A structure for a memory device including a plurality of substantially planar thin-film layers or a plurality of conformal thin-film layers is disclosed. The thin-film layers form a memory element that is electrically in series with first and second cladded conductors and operative to store data as a plurality of conductivity profiles. A select voltage applied across the first and second cladded conductors is operative to perform data operations on the memory device. The memory device may optionally include anon-ohmic device electrically in series with the memory element and the first and second cladded conductors. Fabrication of the memory device does not require the plurality of thin-film layers be etched in order to form the memory element. The memory element can include a CMO layer having a selectively crystallized polycrystalline portion and an amorphous portion. The cladded conductors can include a core material made from copper. | 10-21-2010 |
20110133147 | Continuous plane of thin-film materials for a two-terminal cross-point memory - A structure for a memory device including a plurality of substantially planar thin-film layers or a plurality of conformal thin-film layers is disclosed. The thin-film layers form a memory element that is electrically in series with first and second cladded conductors and operative to store data as a plurality of conductivity profiles. A select voltage applied across the first and second cladded conductors is operative to perform data operations on the memory device. The memory device may optionally include a non-ohmic device electrically in series with the memory element and the first and second cladded conductors. Fabrication of the memory device does not require the plurality of thin-film layers be etched in order to form the memory element. The memory element can include a CMO layer having a selectively crystallized polycrystalline portion and an amorphous portion. The cladded conductors can include a core material made from copper. | 06-09-2011 |
20110155990 | Continuous plane of thin-film materials for a two-terminal cross-point memory - A structure for a memory device including a plurality of substantially planar thin-film layers or a plurality of conformal thin-film layers is disclosed. The thin-film layers form a memory element that is electrically in series with first and second cladded conductors and operative to store data as a plurality of conductivity profiles. A select voltage applied across the first and second cladded conductors is operative to perform data operations on the memory device. The memory device may optionally include a non-ohmic device electrically in series with the memory element and the first and second cladded conductors. Fabrication of the memory device does not require the plurality of thin-film layers be etched in order to form the memory element. The memory element can include a CMO layer having a selectively crystallized polycrystalline portion and an amorphous portion. The cladded conductors can include a core material made from copper. | 06-30-2011 |
20120292585 | CONTINUOUS PLANE OF THIN-FILM MATERIALS FOR A TWO-TERMINAL CROSS-POINT MEMORY - A structure for a memory device including a plurality of substantially planar thin-film layers or a plurality of conformal thin-film layers is disclosed. The thin-film layers form a memory element that is electrically in series with first and second cladded conductors and operative to store data as a plurality of conductivity profiles. A select voltage applied across the first and second cladded conductors is operative to perform data operations on the memory device. The memory device may optionally include a non-ohmic device electrically in series with the memory element and the first and second cladded conductors. Fabrication of the memory device does not require the plurality of thin-film layers be etched in order to form the memory element. The memory element can include a CMO layer having a selectively crystallized polycrystalline portion and an amorphous portion. The cladded conductors can include a core material made from copper. | 11-22-2012 |
Youn-Jin Oh, San Ramon, CA US
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20110192724 | HIGH RESOLUTION FOCUSING AND SEPARATION OF PROTEINS IN NANOFLUIDIC CHANNELS - Exemplary embodiments provide systems and methods for concentrating, focusing and/or separating proteins using nanofluidic channels and/or their arrays. In embodiments, low-abundance proteins can be focused and separated with high resolution using separation techniques including isoelectric focusing (IEF), and/or dynamic field gradient focusing (DFGF) in combination with nanofluidic channels and/or multi-gate nanofluidic field-effect-transistors (FETs). | 08-11-2011 |
20120276747 | PREVENTION OF LINE BENDING AND TILTING FOR ETCH WITH TRI-LAYER MASK - A method for etching features in an etch layer is provided. An organic mask layer is etched, using a hard mask as an etch mask. The hard mask is removed, by selectively etching the hard mask with respect to the organic mask and etch layer. Features are etched in the etch layer, using the organic mask as an etch mask. | 11-01-2012 |