Liu, Taoyuan County
An-Hsiung Liu, Taoyuan County TW
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20080242100 | SEMICONDUCTOR DEVICE AND FABRICATIONS THEREOF - A method for forming a semiconductor device is disclosed. A substrate comprising a structural layer thereon is provided. A hard mask layer is formed on the structural layer. A photoresist layer is formed on the hard mask layer. The photoresist layer is patterned to from a plurality of main photoresist patterns and at least one dummy photoresist pattern between the main photoresist patterns or adjacent to one of the main photoresist patterns, wherein width of the dummy photoresist pattern is less than that of the main photoresist patterns. Two main photoresist patterns are separated with each other by a first opening, and two dummy photoresist patterns are separated with each other by a second opening. Width of the second opening is less than that of the first opening. The hard mask layer is patterned using the patterned photoresist layer as a mask. The structural layer is patterned using the patterned hard mask layer as a mask. | 10-02-2008 |
20090068813 | METHOD FOR FABRICATING A SEMICONDUCTOR DEVICE - A method for fabricating the semiconductor device comprises providing a semiconductor substrate having a device region and a testkey region. A first trench is formed in the device region and a second trench is formed in the testkey region. A conductive layer with a first etching selectivity is formed in the first and second trenches. A first implantation process is performed in a first direction to form a first doped region with a first impurity and an undoped region in the conductive layer simultaneously and respectively in the device region and in the testkey region. A second implantation process is performed in the second trench to form a second doped region with a second impurity in the conductive layer, wherein the conductive layer in the second trench has a second etching selectivity higher than the first etching selectivity. | 03-12-2009 |
20150028459 | METHOD FOR SEMICONDUCTOR SELF-ALIGNED PATTERNING - A method for semiconductor self-aligned patterning includes steps of providing a substrate comprising a first layer and a second layer, wherein the first layer is on top of the second layer; removing a portion of the first layer to form a first pattern; depositing a first conformal layer on the first pattern; | 01-29-2015 |
An-Te Liu, Taoyuan County TW
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20120044794 | DISCRIMINATION METHOD OF OPTICAL DISC - A discrimination method of an optical disc. The method includes: focusing a light spot on a rewritable zone of the optical disc; reading an EFM signal of data marks of the optical disc to check if the optical disc is a data disc or a blank disc; when the optical disc is a data disc, utilizing an SBAD signal for discrimination of the optical disc; when the optical disc is a blank disc, utilizing a DPD signal for discrimination of the optical disc; checking if the header signals exist or not; identifying the optical disc as a DVD-RAM disc if the header signals exist; and identifying the optical disc as a DVD-RW disc if there is no header signal. In this way, the accuracy of the optical disc discrimination is enhanced. | 02-23-2012 |
Cheng-Ping Liu, Taoyuan County TW
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20100102027 | Method of Forming Double-sided Patterns in a Touch Panel Circuit - A method of forming double-sided patterns in a touch panel circuit is disclosed. A first conductive layer and a second conductive layer are respectively formed on both sides of a substrate. A blocking layer is formed on a top surface of the first conductive layer for blocking ultraviolet (UV) light. A first photoresist layer is formed on a top surface of the blocking layer, and a second photoresist layer is formed on a bottom surface of the second conductive layer. Accordingly, two sides of the substrate may be exposed, developed and etched at the same time, thereby substantially simplifying the process of manufacturing the touch panel circuit. | 04-29-2010 |
20120113043 | TOUCH PANEL STACKUP - A touch panel stackup comprises a substrate having a substantially transparent first region and a substantially opaque second region, a sensing electrode detecting a tactile signal, a conductive circuit electrically coupled with the sensing electrode, and a masking element configured on the second region of the substrate, wherein the sensing electrode, the conductive circuit, and the masking element are integrally formed on the substrate. | 05-10-2012 |
Chen Hsing Liu, Taoyuan County TW
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20120127671 | MULTI-CHIP MODULE - A multi-chip module is disclosed to include a pin frame, an electric power switch chip, and a battery protection chip. The pin frame has a chip placement region and six pins. The second pin and the fifth pin are electrically connected at the chip placement region, and the other pins are set electrically isolated from each other. A bottom surface of the electric power switch chip is electrically connected at the chip placement region, and a top surface thereof is electrically connected to the first pin and the third pin. A bottom surface of the battery protection chip is disposed at the top surface of the electric power switch chip in an electrically isolated fashion. A top surface of the battery protection chip is electrically connected to the top surface of the electric power switch chip, the first pin, the fourth pin, and the sixth pin. | 05-24-2012 |
20130075880 | PACKAGING STRUCTURE - A packaging structure comprises a first leadframe, a second leadframe, two grounding pins, two first pins, a plurality of first wires, a plurality of second wires, and a package body. The second leadframe is coupled to the drains of a first power transistor and a second power transistor. The two grounding pins are adjacent together and coupled to the first leadframe. The two first pins are coupled to the source of the second power transistor. The two first pins are connected together through a conductive region for increasing capability of loading current. The plurality of first wires is coupled between the source of the second power transistor and the first pin to decrease the internal resistance of the second power transistor. The plurality of second wires is coupled between the first leadframe and the source of the first power transistor to decrease the internal resistance of the first power transistor. | 03-28-2013 |
20130075882 | PACKAGE STRUCTURE - A package structure including a first leadframe, a second leadframe, a power pin, a ground pin, a first pin, several first wires, several second wires, and a package body is disclosed. The first leadframe is used for electrically coupling to the drains of a first power transistor and the second power transistor. The ground pin is electrically coupled to the first leadframe. The first pin is connected with the first leadframe through a conductive region used for increasing the amount of current which can be loaded by the first pin. The first wires are used for electrically coupling between the first leadframe and the source of the second power transistor, for reducing the internal resistance of the second power transistor. The second wires are used for electrically coupling between the ground pin and the source of the first power transistor, for reducing the internal resistance of the first power transistor. | 03-28-2013 |
Chen-Kuang Liu, Taoyuan County TW
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20100149742 | HANDHELD ELECTRONIC DEVICE AND OPERATING METHOD THEREOF - A handheld electronic device and an operating method thereof are provided. The handheld electronic device includes a first body, a second body, and a moving assembly. The moving assembly includes a sliding module and at least one rotating module. The sliding module is coupled to the second body, wherein the second body is moveable between a first position and a second position. The rotating module is coupled between the first body and the sliding module so that the second body is rotated relative to the first body. The second body is automatically rotated from the second position to a third position to form a first angle with the first body. The second body can be rotated between the third position and a fourth position to form a second angle with the first body, wherein the second angle is greater than the first angle. | 06-17-2010 |
20110038105 | LOCKING MECHANISM AND ELECTRONIC DEVICE - A locking mechanism and an electronic device are provided. The electronic device includes a first body, a second body, a moving module, and a locking mechanism. The moving module is disposed between the first body and the second body, so that the second body is rotatable and tiltable relative to the first body. The locking mechanism includes a first connecting member and a plug. When the plug is coupled with the first connecting member by a magnetic force, the second body is slidable relative to the first body. When the second body is tilted up to decouple the plug from the first connecting member, the plug interferes the moving module, so that the second body is not slidable relative to the first body. | 02-17-2011 |
20110063781 | MOVING MODULE AND ELECTRONIC DEVICE - A moving module and an electronic device are provided. The electronic device includes a first body, a second body, and the moving module disposed between the first and second bodies. The moving module includes a rail, a moving element, and an elastic element. The moving element is in contact with the rail. The elastic element is connected between the moving element and the first body. When the moving element moves from a first end of the rail to a curved portion of the rail, a force exerted on the elastic element by the moving element is gradually increased. When the moving element passes the curved portion, an elastic restoration force of the elastic element drives the moving element to move toward a second end of the rail. When the moving element reaches the first end or the second end, the first body and the second body interfere with each other. | 03-17-2011 |
20110317347 | HANDHELD ELECTRONIC DEVICE AND OPERATING METHOD THEREOF - A handheld electronic device and an operating method thereof are provided. The handheld electronic device includes a first body, a second body, and a moving assembly. The moving assembly includes a sliding module and at least one rotating module. The sliding module is coupled to the second body, wherein the second body is moveable between a first position and a second position. The rotating module is coupled between the first body and the sliding module so that the second body is rotated relative to the first body. The second body is automatically rotated from the second position to a third position to form a first angle with the first body. The second body can be rotated between the third position and a fourth position to form a second angle with the first body, wherein the second angle is greater than the first angle. | 12-29-2011 |
Chen-San Liu, Taoyuan County TW
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20110262068 | AXLE BEARING LUBRICATING AND COOLING SYSTEM - An axle bearing lubricating and cooling system includes a shaft and an axle bearing that has an inner race fixedly mounted around the shaft, an outer race and a plurality of movable members movably set in between the inner race and the outer race, a casing fixedly connected with the outer race of the axle bearing for enabling two distal ends of the shaft to extend out of the casing, casing having a fluid inlet for guiding a cooling fluid from an external cooling fluid source through the gap in between the outer race and inner race of the axle bearing and a fluid outlet located for guiding the cooling fluid out of the casing, and an impeller rotatable with the shaft for forcing the cooling fluid out of the axle bearing toward the fluid outlet. | 10-27-2011 |
Chen-Yu Liu, Taoyuan County TW
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20090207151 | Capacitive Touch Panel - An integrally-formed capacitive touch panel is disclosed including: a singular lens substrate, a mask layer, and a sensing circuit integrally coupled with said singular lens substrate. Said singular lens substrate, said mask layer, and said sensing circuit are integrally formed. | 08-20-2009 |
20100102027 | Method of Forming Double-sided Patterns in a Touch Panel Circuit - A method of forming double-sided patterns in a touch panel circuit is disclosed. A first conductive layer and a second conductive layer are respectively formed on both sides of a substrate. A blocking layer is formed on a top surface of the first conductive layer for blocking ultraviolet (UV) light. A first photoresist layer is formed on a top surface of the blocking layer, and a second photoresist layer is formed on a bottom surface of the second conductive layer. Accordingly, two sides of the substrate may be exposed, developed and etched at the same time, thereby substantially simplifying the process of manufacturing the touch panel circuit. | 04-29-2010 |
20120113021 | TOUCH PANEL DEVICE - A touch panel stackup comprises a substrate, a first conductive element having a first refractive index and forming a plurality of patterns with on or more gaps on the substrate having an address for sensing tactile signals in a first direction and a second direction, a second conductive element having a second refractive index coupled with said plurality of patterns an insulator disposed among said one or more gaps, the second refractive index being substantially the same as said first refractive index. | 05-10-2012 |
20120113043 | TOUCH PANEL STACKUP - A touch panel stackup comprises a substrate having a substantially transparent first region and a substantially opaque second region, a sensing electrode detecting a tactile signal, a conductive circuit electrically coupled with the sensing electrode, and a masking element configured on the second region of the substrate, wherein the sensing electrode, the conductive circuit, and the masking element are integrally formed on the substrate. | 05-10-2012 |
20120162130 | CAPACITIVE TOUCH PANEL - An integrally-formed capacitive touch panel is disclosed including: a singular lens substrate, a mask layer, and a sensing circuit integrally coupled with said singular lens substrate. Said singular lens substrate, said mask layer, and said sensing circuit are integrally formed. | 06-28-2012 |
20130141385 | Capacitive Touch Panel - An integrally-formed capacitive touch panel is disclosed including: a singular lens substrate, a mask layer, and a sensing circuit integrally coupled with said singular lens substrate. Said singular lens substrate, said mask layer, and said sensing circuit are integrally formed. | 06-06-2013 |
20130141386 | Capacitive Touch Panel - An integrally-formed capacitive touch panel is disclosed including: a singular lens substrate, a mask layer, and a sensing circuit integrally coupled with said singular lens substrate. Said singular lens substrate, said mask layer, and said sensing circuit are integrally formed. | 06-06-2013 |
20150054750 | TOUCH PANEL DEVICE - A touch panel stackup comprises a substrate, a first conductive element having a first refractive index and forming a plurality of patterns with on or more gaps on the substrate having an address for sensing tactile signals in a first direction and a second direction, a second conductive element having a second refractive index coupled with said plurality of patterns an insulator disposed among said one or more gaps, the second refractive index being substantially the same as said first refractive index. | 02-26-2015 |
Chen-Yun Liu, Taoyuan County TW
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20120237912 | 12-LEAD ELECTROCARDIOGRAM ONLINE-LEARNING SYSTEM - The present invention relates to an E-learning system for 12-lead electrocardiogram (ECG), comprising a processing server with a plug-in browser for receiving electrocardiogram-related data and eliminating noise accompanied in the electrocardiogram-related data; a learning database apparatus for storing the electrocardiogram-related data; and a learning network server for accessing the electrocardiogram-related data via network communication. | 09-20-2012 |
Chia-Horng Liu, Taoyuan County TW
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20100267338 | Method For Restraining Inter-Cell Interference In A Mobile Communication System - A method for restraining inter-cell interference in a mobile communication system is provided. The method uses the fast dynamic selection of the Fractional Frequency Reuse (FFR) technology and the Macro Diversity (MD) technology of the cell edge to increase the cell edge user data rate and provide excellent system capacity. The method is particularly suitable in a OFDMA mobile communication system downlink. The method comprises the steps of: (a) determining whether the cell edge user is able to operate the MD technology; (b) processing the fast dynamic selection of the FFR technology and the MD technology for the cell edge user, and the selection is made based on a instantaneous link Signal Quality Index (SQI); and (c) allocating the center subband or the edge subband to the cell edge user according to the selection. | 10-21-2010 |
Chia-Hung Liu, Taoyuan County TW
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20090295751 | PORTABLE ELECTRONIC DEVICE AND DISPLAY CONTROLLING METHOD - The invention provides a portable electronic device including a display unit and an operating module coupled to the display unit. The display unit is for displaying a frame including at least one first icon corresponding to a first file or a first program. The operating module includes a touch/display unit for displaying the first icon and for enabling a user to click through the first icon. When the user clicks through the first icon displayed on the touch/display unit, the portable electronic device executes the first file or the first program corresponding to the first icon. | 12-03-2009 |
Chien-Liang Liu, Taoyuan County TW
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20120275698 | Method of Orthoimage Color Correction Using Multiple Aerial Images - A method for true-orthoimage color correction is provided. Aerial images and digital elevation models (DEMs) are used for balancing colors in orthoimages or true-orthoimages. Seam lines between images are also smoothed. Thus, color distinction between images is rectified and orthoimage quality is greatly enhanced. | 11-01-2012 |
Chih-Hsiao Liu, Taoyuan County TW
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20120194977 | PORTABLE ELECTRONIC DEVICE - A portable electronic device includes a main portion, a display portion and a support arm. The main portion has an accommodation area on an upper surface thereof. The support arm is pivotally connected with the main portion at a first end and pivotally connected with the display portion at an opposite second end such that the display portion is rotatable relative to the main portion by means of the support arm. When the display portion is laid against the main portion, the support arm is disposed within the accommodation area. | 08-02-2012 |
Ching-Tung Liu, Taoyuan County TW
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20100013778 | Portable electronis device and the mode switching method thereof - The present invention relates to a portable electronic device which can be switched between a first mode and a second mode. The portable electronic device comprises a first sensor to detect a touch on the portable electronic device and generate a first signal based on such touch, a second sensor to detect a movement of the portable electronic device and generate a second signal based on such movement, and a processing unit which electrically connects the first sensor and the second sensor. When the portable electronic device is in the first mode, the processing unit switches the portable electronic device to the second mode based on the first and second signals. In addition, the present invention provides a mode switching method that enables the portable electronic device to determine whether to enter or exit from the sleep mode. | 01-21-2010 |
20100328112 | METHOD OF DYNAMICALLY ADJUSTING LONG-PRESS DELAY TIME, ELECTRONIC DEVICE, AND COMPUTER-READABLE MEDIUM - A method of dynamically adjusting a long-press delay time, an electronic device using the method, and a computer-readable medium are provided, wherein the electronic device has a plurality of keys. When a pressed time corresponding to a key of the electronic device exceeds a long-press delay time of the key, the electronic device executes a long-press function corresponding to the key. In the present method, a plurality of key inputs is first received. Then, the long-press delay time of the key is set according to the input rate related to the received key inputs. Thereby, the electronic device can respond appropriately according to the typing speed of a user, so as to offer the user a smooth operating experience. | 12-30-2010 |
20130069893 | ELECTRONIC DEVICE, CONTROLLING METHOD THEREOF AND COMPUTER PROGRAM PRODUCT - A method of controlling an electronic device, an electronic device and a computer program product using the method are provided. The method includes displaying part or all of a ring and a function image outside the ring on the touch screen while the electronic device is in a user-interface lock state, detecting a user input applied to the function image and/or the ring on or near the touch screen, moving the function image and/or the ring in accordance with the user input, wherein the function image corresponds to an application, transitioning the electronic device to a user-interface unlock state and launching the application if the function image and the ring approach each other within a predetermined distance, and maintaining the electronic device in the user-interface lock state if the function image and the ring do not approach each other within the predetermined distance. | 03-21-2013 |
20130249837 | METHOD, APPARATUS AND COMPUTER PROGRAM PRODUCT FOR OPERATING ITEMS WITH MULTIPLE FINGERS - A method, an apparatus and a computer program product for operating items with multiple fingers, adapted to a portable apparatus having a touch screen, are provided. In the method, a first touch operation performed on at least one item displayed on the touch screen is detected. A time of the first touch operation staying on the at least one item is accumulated and determined whether to be over a threshold. When the staying time is over the threshold, an edit mode of the item is entered and a second touch operation performed on the touch screen is detected. Finally, the at least one item is operated according to the first touch operation and the second touch operation. | 09-26-2013 |
Chiu-Hsiang Liu, Taoyuan County TW
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20090017956 | Reduction gear with increased number of meshed teeth - A reduction gear includes a case including a hollow cylinder having teeth on its inner wall; a ring gear having outer teeth meshed with the teeth of the cylinder, and inner teeth; and an eccentric gear assembly mounted in the cylinder and including a hollow eccentric shaft including rear and front eccentric sections, and first and second gears rotatably secured onto the rear and front eccentric sections respectively. Rotating an input shaft in a first speed will rotate the eccentric shaft to rotate the first and second gears around the inner teeth of the ring gear eccentrically, thereby rotating the output shaft in a second speed lower than the first speed. The invention has an increased number of meshed teeth between each of the first and second gears and the ring gear so as to distribute a radial load to more teeth in rotation. | 01-15-2009 |
Chuan-Ku Liu, Taoyuan County TW
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20090033551 | RECEIVING DEVICE FOR GLOBAL POSITIONING SYSTEM AND ANTENNA STRUCTURE THEREOF - A receiving device for a global positioning system and an antenna structure thereof. The receiving device includes a housing, a circuit board and the antenna structure. The circuit board is disposed inside the housing and has a ground portion and a signal feeding portion. The antenna structure is disposed inside the housing and includes a metal plate, a first electric conducting element and a second electric conducting element. The metal plate is used for receiving a GPS signal. The first electric conducting element has one end coupled to the metal plate, and the other end coupled to the ground portion of the circuit board. The second electric conducting element for feeding the GPS signal to the circuit board has one end coupled to the metal plate, and the other end coupled to the signal feeding portion of the circuit board. | 02-05-2009 |
Chun-Fu Liu, Taoyuan County TW
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20100182408 | STEREOSCOPIC DISPLAY DEVICE - A stereoscopic display device has a plurality of sub-pixel units respectively arranged along a first axis and a second axis. Each sub-pixel unit and the adjacent sub-pixel unit along the first axis have a predetermined dislocation in the second axis. Each of the sub-pixel unit includes a first sub-pixel row having a first sub-pixel and two second sub-pixels arranged along the first axis, a second sub-pixel row under the first sub-pixel row having a first sub-pixel and two second sub-pixels arranged along the first axis, and a three sub-pixel row under the second sub-pixel row having three third sub-pixels arranged along the first axis. The stereoscopic display device also has a parallax panel having a plurality of transparent regions and shielding regions alternately parallel to each other. | 07-22-2010 |
20100253767 | INTEGRATED ELECTROCHROMIC 2D/3D DISPLAY DEVICE - An integrated electrochromic 2D/3D display device including a first substrate; a parallax barrier unit disposed under the first substrate; a color filter unit disposed under the parallax barrier unit; a common electrode disposed under the color filter unit; a liquid crystal unit disposed under the common electrode; a plurality of thin film transistors disposed under the liquid crystal unit; a second substrate disposed under the plurality of thin film transistors; and a light emitting unit disposed under the second substrate is provided. Another integrated electrochromic 2D/3D display device including a substrate; a parallax barrier unit disposed under the substrate; and a display unit disposed under the parallax barrier unit is also provided. An adjustment of a planar image and a stereo image is performed to reduce a thickness and an assembling cost of conventional display devices. | 10-07-2010 |
20100271685 | 2D/3D display device - A 2D/3D display device is provided. The 2D/3D display device includes a flat display device and a parallax barrier panel disposed on a display surface of the flat display device. The parallax barrier panel has a barrier pattern which includes a first electrochromic material layer and a second electrochromic material layer. In a 2D display mode, the barrier pattern, the first electrochromic material layer, and the second electrochromic material layer are transparent. In a 3D stereoscopic display mode, the barrier pattern is non-transmissible. The first electrochromic material layer has a first color, and the second electrochromic material layer has a second color. | 10-28-2010 |
20100283924 | Stereoscopic Display Device - A stereoscopic display device includes a stereoscopic display unit, a backlight module and an outer frame. The stereoscopic display unit includes an LCD panel and a parallax barrier opposite to each other. The backlight module is disposed on a side of the stereoscopic display unit and includes a light source and a rubber frame, wherein the rubber frame is disposed on an outer side of the light source. The outer frame encompasses the stereoscopic display unit and the backlight module. At least one of the rubber frame and the outer frame includes a light shielding component disposed on a side facing the light source to prevent light leakage form an edge of the stereoscopic display unit. | 11-11-2010 |
Chun-Han Liu, Taoyuan County TW
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20100033471 | DISPLAY DRIVING CIRCUIT AND DRIVING METHOD THEREOF - A display driving circuit includes a power detector, a plurality of control units and a plurality of buffer amplifiers. The power detector outputs a control signal according to a voltage level of a supply voltage. Each control unit determines the control unit to output either auxiliary display data or original display data according to the control signal. The plurality of buffer amplifiers buffer and transfer the auxiliary display data or original display data outputted from the plurality of control units to a plurality of data lines. | 02-11-2010 |
Chun-Yi Liu, Taoyuan County TW
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20110175736 | SYSTEM FOR MEASURING BODY BALANCE SIGNALS AND A METHOD FOR ANALYZING THE SAME - A human body balance signals measuring system and the method of analysis thereof that has a measuring device, a filter amplifier, an A/D convertor (analog to digital convertor), a signal receiving module, and a data analyze module. The measuring device is linked with the filter amplifier. The filter amplifier can detect and collect the voltage signals caused by pressure change and then filter and amplify the signals. The signals are send to the A/D convertor to convert the analog circuit signals into digital signals for the receiving module to use these voltage change values for human body center of gravity offset evaluation to obtain the COP (center of pressure) offset and COP offset velocity. The data analyze module uses the measured body center of gravity offset for MSE (multiscale entropy) to quantitative the dynamic of human body center of gravity and verify the accuracy of this measuring system. | 07-21-2011 |
Fu-Chao Liu, Taoyuan County TW
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20100135093 | OPERATING VOLTAGE TUNING METHOD FOR STATIC RANDOM ACCESS MEMORY - An operating voltage tuning method for a static random access memory is disclosed. The static random access memory receives a periphery voltage and a memory cell voltage. The steps of the method mentioned above are shown as follows. First, perform a shmoo test on the static random access memory to obtain a shmoo test plot and a minimum operating voltage. Compare the minimum operating voltage with a preset specification. Position a specification position point on the line which the periphery voltage is equal to the memory cell voltage in the shmoo test plot corresponding to the preset specification. Fix one of the memory cell voltage and the periphery voltage and gradually decrease the other to test the static random access memory and obtain a failure bits distribution. Finally, tune process parameters of the static random access memory according to the specification position point and the failure bits distribution. | 06-03-2010 |
20140263531 | AMPOULE OPENER - An ampoule opener has an opening unit and a cover unit. The opening unit is a rigid frame and has two panels, two head-clamping holes and two pairs of wave-shaped flanges. The panels are respectively an upper panel and a lower panel. The head-clamping holes are elongated in length and tapered in width and are respectively formed through the panels. The pairs of wave-shaped flanges are formed between the panels and the head-clamping holes. The cover unit is flexible, is detachably mounted around the opening unit and has two covering boards, a mounting recess, two body-clamping holes and two pairs of wave-shaped edges. The body-clamping holes are elongated in length and tapered in width and are respectively formed through the mounting boards and communicate with the mounting recess. The pairs of wave-shaped edges are formed between the mounting boards and the body-clamping holes. | 09-18-2014 |
Heng-Liang Liu, Taoyuan County TW
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20110282355 | POSITIONING DEVICE FOR SURGICAL OPERATION - The primary objective of the present invention is to provide a positioning device for surgical operation, which could allow a surgical tool to be positioned precisely at a specific operating spot or a specific operating angle by providing a three axial free-moving function and a vertical and horizontal free-rotating function. Furthermore, the present invention is able to be electrically connected to and controlled by an automatic control system to achieve a more precise and efficient positioning function. | 11-17-2011 |
Hsiang-Lun Liu, Taoyuan County TW
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20090102775 | LOW POWER DRIVING METHOD AND DRIVING SIGNAL GENERATION METHOD FOR IMAGE DISPLAY APPARATUS - By a low power consumption driving method for an image display apparatus, unusual display may be prevented even if gate driving is not enough. When a rising edge of an output enable pulse is detected, a logic LOW gate driving signal is discharged to GND. When a falling edge of the output enable pulse is detected, the gate driving signal at GND is charged to logic HIGH. When a rising edge of the next output enable pulse is detected, the gate driving signal at logic HIGH is discharged to GND. When a falling edge of the next output enable pulse is detected, the gate driving signal at GND is charged to logic LOW. The image display apparatus is driven by the generated gate driving signals. | 04-23-2009 |
20110175947 | METHOD FOR IMPROVING IMAGE STITCH-IN PHENOMENON - A method for improving image stitch-in phenomenon is disclosed. The method includes the following steps. First, at least a first gray-scale line is inserted into the position of a corresponding number of scan line(s) in a frame. Then, at least a second gray-scale line is inserted into the position of a corresponding number of scan line(s) in the next frame. By inserting gray-scale line(s) into different positions sequentially, the image stitch-in phenomenon will not appear when changing a picture that has been displayed for a long time. The present invention can also improve the stitch-in phenomenon happening in an electronic photo frame and a liquid crystal display as well. Thus, the present invention is able to match the demand of human vision and improves the quality of visual display. | 07-21-2011 |
20120105748 | PARALLAX BARRIER, THREE DIMENSIONAL DISPLAY AND METHOD OF ADJUSTING PARALLAX BARRIER'S TRANSMITTANCE - A parallax barrier includes a first electrode comprising a first sub-electrode and a second sub-electrode. A second electrode is opposed to the first electrode. A plurality of liquid crystal molecules are disposed between the first electrode and the second electrode. A parallax barrier driver provides a voltage difference between the first electrode and the second electrode to form a light-shielding region overlapping with both the first sub-electrode and the second sub-electrode, and forms a transverse electric field between the first sub-electrode and the second sub-electrode. It is noteworthy that the transverse electric field adjusts the rotation angles of the liquid crystal molecules to adjust the width of the light-shielding region, and the parallax barrier's transmittance can thereby be changed. | 05-03-2012 |
20120206441 | DISPLAY SYSTEM AND DRIVING METHOD OF BACKLIGHT MODULE THEREOF - A driving method for a display system including a display panel and a backlight module is provided. A first directional surface light source and a second directional surface light source are respectively provided by a first light source and a second light source of the backlight module through a light guide plate. Images displayed by the display panel are thus transmitted to a left eye and a right eye. A data enable signal and an image signal are received to determine whether the image signal transmits a two dimensional image or a stereoscopic image according to the data enable signal. When the image signal is the two dimensional image, the first light source and the second light source are turned on simultaneously. When the image signal is the stereoscopic image, the first light source and the second light source are turned on at corresponding display periods, respectively. | 08-16-2012 |
Hsien-Wen Liu, Taoyuan County TW
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20090256264 | SEMICONDUCTOR STRUCTURE AND METHOD OF MAKING THE SAME - A semiconductor device is provided. An amorphous silicon layer that acts as a UV blocking layer replaces a conventional silicon-rich oxide (SRO) layer or the super silicon-rich oxide (SSRO) layer. By doing this, the process window is increased. In addition, silicon nitride sidewall spacer is formed inside the contact hole to prevent charge loss. | 10-15-2009 |
20110260230 | CELL WITH SURROUNDING WORD LINE STRUCTURES AND MANUFACTURING METHOD THEREOF - A memory cell with surrounding word line structures includes an active area; a plurality of first trenches formed on the active area in a first direction, each first trench has a bit line on a sidewall therein; a plurality of second trenches formed on the active area in a second direction, each second trench has two word lines formed correspondingly on the sidewalls in the second trench; and a plurality of transistors formed on the active area. The word line pairs are arranged into a surrounding word line structure. The transistor is controlled by the bit line and the two word lines, thus improving the speed of the transistor. | 10-27-2011 |
20120012907 | Memory layout structure and memory structure - A memory layout structure is disclosed, in which, a lengthwise direction of each active area and each row of active areas form an included angle not equal to zero and not equal to 90 degrees, bit lines and word lines cross over each other above the active areas, the bit lines are each disposed above a row of active areas, bit line contact plugs or node contact plugs may be each disposed entirely on an source/drain region, or partially on the source/drain region and partially extend downward along a sidewall (edge wall) of the substrate of the active area to carry out a sidewall contact. Self-aligned node contact plugs are each disposed between two adjacent bit lines and between two adjacent word lines. | 01-19-2012 |
20120256230 | POWER DEVICE WITH TRENCHED GATE STRUCTURE AND METHOD OF FABRICATING THE SAME - A power device with trenched gate structure, includes: a substrate having a first face and a second face opposing to the first face, a body region of a first conductivity type disposed in the substrate, a base region of a second conductivity type disposed in the body region, a cathode region of the first conductivity type disposed in the base region, an anode region of the second conductivity type disposed in the substrate at the second face a trench disposed in the substrate and extending from the first face into the body region, and the cathode region encompassing the trench, wherein the trench has a wavelike sidewall, a gate structure disposed in the trench and an accumulation region disposed in the body region and along the wavelike sidewall. The wavelike sidewall can increase the base current of the bipolar transistor and increase the performance of the IGBT. | 10-11-2012 |
20120256255 | RECESSED TRENCH GATE STRUCTURE AND METHOD OF FABRICATING THE SAME - A recessed trench gate structure is provided. The recessed trench gate structure includes a substrate with a recessed trench, a gate dielectric layer disposed around an inner surface of the recessed trench, a lower gate conductor disposed at a lower portion of the recessed trench and on the gate dielectric layer. Specially, the lower gate conductor has a convex top surface. A spacer is disposed along an inner side wall of a upper portion of the recessed trench and a upper gate conductor is disposed on the lower gate conductor. The convex top surface can prevent the electric field from distributing not uniformly, so that the GIDL can be prevented. | 10-11-2012 |
20120256256 | RECESSED GATE TRANSISTOR WITH CYLINDRICAL FINS - A recessed gate transistor with cylindrical fins is disclosed. The recessed gate transistor is disposed in an active region of a semiconductor substrate. Two isolation regions disposed in the semiconductor substrate to define an active region therebetween. The recessed gate transistor includes a gate structure, a source doping region and a drain doping region. The gate structure has at least three fins forms a concave and convex bottom of the gate structure. The front fin is disposed in one of the two isolation regions, the middle fin is disposed in the active region and a last fin disposed in the other one of the two isolation regions. The front fin and the last fin are both cylindrical. A lower part of the gate structure is M-shaped when view from the source doping region to the drain doping region direction. | 10-11-2012 |
20120256257 | TRANSISTOR WITH BURIED FINS - The present invention disclosed a recessed gate transistor with buried fins. The recessed gate transistor with buried fins is disposed in an active region on a semiconductor substrate. Two isolation regions disposed in the semiconductor substrate, and sandwich the active region. A gate structure is disposed in the semiconductor substrate, wherein the gate structure includes: an upper part and a lower part. The upper part is disposed in the active region and a lower part having a front fin disposed in one of the two isolation regions, at least one middle fin disposed in the active region, and a last fin disposed in the other one of the two isolation regions, wherein the front fin are both elliptic cylindrical. | 10-11-2012 |
20120256279 | METHOD OF GATE WORK FUNCTION ADJUSTMENT AND METAL GATE TRANSISTOR - A method of gate work function adjustment includes the steps as follow. First, a substrate is provided, wherein a metal gate is disposed on the substrate, a source doping region and a drain doping region are disposed in the substrate at opposite sites of the metal gate, wherein the metal gate is divided into a source side adjacent to the source doping region, and a drain side adjacent to the drain doping region. Later, a mask layer is formed to cover the source doping region and the drain doping region. After that, an implantation process is performed to implant nitrogen into the metal gate so as to make a first nitrogen concentration of the source side higher than a second nitrogen concentration of the drain side. Finally, the mask layer is removed. | 10-11-2012 |
20120264299 | CHEMICAL MECHANICAL POLISHING METHOD - A chemical mechanical polishing (CMP) method is provided The method is capable of polishing a substrate in a CMP apparatus by using a hydrophobic polishing pad and includes following steps. A first CMP process is performed to the substrate. A first cleaning process is performed to the hydrophobic polishing pad. A second CMP process is performed to the substrate, wherein the first CMP process, the first cleaning process and the second CMP process are performed in sequence. | 10-18-2012 |
20120264300 | METHOD OF FABRICATING SEMICONDUCTOR COMPONENT - A method of fabricating the semiconductor component including following steps is provided. A substrate is provided, wherein an opening is already formed in the substrate. A material layer is formed on the substrate, wherein the material layer fills up the opening, and the material layer outside and above the opening has a recess therein. A sacrifice layer is formed on a surface of the recess. A chemical mechanical polishing (CMP) process is performed to remove the sacrifice layer and the material layer outside the opening, wherein a polishing rate of the CMP process on the material layer is greater than that of the CMP process on the sacrifice layer. | 10-18-2012 |
20120264354 | DISTANCE MONITORING DEVICE - A distance monitoring device is provided. The device is suitable for a chemical mechanical polishing (CMP) apparatus. A polishing head of the CMP apparatus includes a frame and a membrane. The membrane is mounted on the frame, and a plurality of air bags is formed by the membrane and the frame in the polishing head. The distance monitoring device includes a plurality of distance detectors disposed on the frame corresponding to the air bags respectively to set a location of each of the distance detectors on the frame as a reference point, wherein each of the distance detectors is configured to measure a distance between each of the reference points and the membrane. | 10-18-2012 |
20120264359 | MEMBRANE - A membrane is suitable to be mounted on a polishing head of a chemical mechanical polishing apparatus and includes a main portion and an edge portion. The edge portion is located at an edge of the main portion, wherein a first included angle between the main portion and the edge portion is an obtuse angle. | 10-18-2012 |
20120267727 | METHOD FOR FORMING SELF-ALIGNED CONTACT - An integrated circuit with a self-aligned contact includes a substrate with a transistor formed thereover, a dielectric spacer, a protection barrier, and a conductive layer. The transistor includes a mask layer and a pair of insulating spacers formed on opposite sides of the mask layer. The dielectric spacer partially covers at least one of the insulating spacers of the transistor. The protection barrier is formed over the dielectric spacer. The conductive layer is formed over the mask layer, the protection barrier, the dielectric spacer, the insulating spacer and the dielectric spacer as a self-aligned contact for contacting a source/drain region of the transistor. | 10-25-2012 |
20120267760 | CAPACITOR AND MANUFACTURING METHOD THEREOF - A capacitor and a manufacturing method thereof are provided. The capacitor includes a first electrode, a first metal layer, a dielectric layer and a second electrode. The first electrode is disposed on a substrate. The first metal layer is disposed on the first electrode. The dielectric layer is disposed on the first metal layer, wherein the material of the first metal layer does not react with the material of the dielectric layer. The second electrode is disposed on the dielectric layer. | 10-25-2012 |
20120270408 | MANUFACTURING METHOD OF GATE DIELECTRIC LAYER - A manufacturing method of a gate dielectric layer that includes a nitride layer and an oxide layer is provided. A substrate is provided. A nitridation treatment is performed to form the nitride layer on the substrate. An oxidation treatment is performed subsequent to the formation of the nitride layer to form the oxide layer between the nitride layer and the substrate. | 10-25-2012 |
20120270411 | MANUFACTURING METHOD OF GATE DIELECTRIC LAYER - A manufacturing method of a gate dielectric layer is provided. An oxidation treatment is performed to form an oxide layer on a substrate. A nitridation treatment is performed to form a nitride layer on the oxide layer. An annealing treatment is performed in a mixing gas of N | 10-25-2012 |
20120270474 | POLISHING PAD WEAR DETECTING APPARATUS - A polishing pad wear detecting apparatus suitable for a chemical mechanical polishing (CMP) apparatus is provided. The polishing pad wear detecting apparatus includes an arm and a height detector. One end of the arm is fastened on the CMP apparatus. The height detector is disposed on the arm for detecting height variation of a polishing pad. | 10-25-2012 |
20120273874 | MEMORY DEVICE HAVING BURIED BIT LINE AND VERTICAL TRANSISTOR AND FABRICATION METHOD THEREOF - A method of forming a buried bit line is provided. A substrate is provided and a line-shaped trench region is defined in the substrate. A line-shaped trench is formed in the line-shaped trench region of the substrate. The line-shaped trench includes a sidewall surface and a bottom surface. Then, the bottom surface of the line-shaped trench is widened to form a curved bottom surface. Next, a doping area is formed in the substrate adjacent to the curved bottom surface. Lastly, a buried conductive layer is formed on the doping area such that the doping area and the buried conductive layer together constitute the buried bit line. | 11-01-2012 |
20120276707 | METHOD FOR FORMING TRENCH ISOLATION - A method for forming a trench isolation is disclosed, comprising, providing a substrate comprising a trench, forming a polysilicon layer in the trench, and subjecting the substrate to a treating process to convert the polysilicon layer to an isolating layer, wherein the treating process is fine tuned for the isolating layer on opposite sidewalls of the trench to expand to contact with each other so that the isolating layer fills the trench. | 11-01-2012 |
20120276714 | METHOD OF OXIDIZING POLYSILAZANE - A method of oxidizing polysilazane is disclosed, comprising providing a substrate, comprising a trench, forming a polysilazane layer in the trench, and treating the polysilazane layer in an acid containing solution applied with mega-sonic waves to oxidize the polysilazane layer, wherein the acid containing solution comprises phosphoric acid, sulfuric acid, H | 11-01-2012 |
20120282777 | METHOD FOR INCREASING ADHESION BETWEEN POLYSILAZANE AND SILICON NITRIDE - A method for increasing adhesion between polysilazane and silicon nitride is disclosed, comprising, providing a substrate comprising a trench, forming a silicon nitride liner layer on a bottom surface and a sidewall of the trench, performing a treating process to the silicon nitride liner layer for producing a hydrophilic surface with OH groups that can increase adhesion between the silicon nitride liner layer and a subsequently formed polysilazane coating layer, and forming a polysilazane coating layer into the trench and on the silicon nitride liner layer. | 11-08-2012 |
20120284936 | POST-CMP WAFER CLEANING APPARATUS - A post-CMP wafer cleaning apparatus includes a chamber; a plurality of rollers adapted to hold and rotate a wafer within the chamber; at least one brush adapted to scrub a surface of the wafer to be cleaned; and a liquid spraying device adapted to spray a liquid on the wafer, the liquid spraying device comprising two spray bars jointed together via a joint member. | 11-15-2012 |
20120285483 | METHOD OF CLEANING A WAFER - A method of cleaning a wafer is disclosed in the present invention. This method is particularly suitable for cleaning the metal layer on the wafer. First, a wafer having a metal layer is loaded into a cleaning chamber, wherein a plurality of particles are inlaid in a surface of the metal layer. Later, a first clean stage is performed to rinse the wafer by jetted liquid introduced with megasonic energy. After the first clean stage, a second clean stage is performed to scrub the wafer. Finally, the wafer is dried. | 11-15-2012 |
20120285484 | METHOD FOR CLEANING A SEMICONDUCTOR WAFER - A wafer cleaning method includes: (1) providing a wafer cleaning apparatus comprising a sponge for scrubbing a surface of a semiconductor wafer to be cleaned; (2) implementing a pre-conditioning flow to pre-condition the sponge using a dummy wafer; and (3) performing a regular cleaning flow to scrub the surface of the semiconductor wafer to be cleaned using the pre-conditioned sponge. The dummy wafer has a plurality of upward protruding features on a surface of the dummy wafer for removing residual fibers or unwanted substances from the sponge. | 11-15-2012 |
20120286352 | TRENCH MOS STRUCTURE AND METHOD FOR MAKING THE SAME - A trench MOS structure is provided. The trench MOS structure includes a substrate, an epitaxial layer, a trench, a gate isolation, a trench gate, a guard ring and a reinforcement structure within the guard ring. The substrate has a first conductivity type, a first side and a second side opposite to the first side. The epitaxial layer has the first conductivity type and is disposed on the first side. The trench is disposed in the epitaxial layer. The gate isolation covers the inner wall of the trench. The trench gate is disposed in the trench and has the first conductivity type. The guard ring has a second conductivity type and is disposed within the epitaxial layer. The reinforcement structure has an electrically insulating material and is disposed within the guard ring. | 11-15-2012 |
20120286353 | TRENCH MOS STRUCTURE AND METHOD FOR FORMING THE SAME - A trench MOS structure is disclosed. The trench MOS structure includes a substrate, an epitaxial layer, a doping well, a doping region and a trench gate. The substrate has a first conductivity type, a first side and a second side opposite to the first side. The epitaxial layer has the first conductivity type and is disposed on the first side. The doping well has a second conductivity type and is disposed on the epitaxial layer. The doping region has the first conductivity type and is disposed on the doping well. The trench gate is partially disposed in the doping region. The trench gate has a bottle shaped profile with a top section smaller than a bottom section, both are partially disposed in the doping well. The bottom section of two adjacent trench gates results in a higher electrical field around the trench MOS structures. | 11-15-2012 |
20120286402 | PROTUBERANT STRUCTURE AND METHOD FOR MAKING THE SAME - A cuboidal protuberant structure is provided. The cuboidal protuberant structure includes a substrate and a protrusion disposed on the substrate. The protrusion has a vertical side wall with a rounded corner, a protuberant width and a protuberant length. At least one of the protuberant width and the protuberant length is not greater than 33 nm. | 11-15-2012 |
20120286819 | MOS TEST STRUCTURE, METHOD FOR FORMING MOS TEST STRUCTURE AND METHOD FOR PERFORMING WAFER ACCEPTANCE TEST - A MOS test structure is disclosed. A scribe line region is disposed on a substrate which has a first side and a second side opposite to the first side. An epitaxial layer is disposed on the first side, the doping well is disposed on the epitaxial layer and the doping region is disposed on the doping well. A trench gate of a first depth is disposed in the doping region, in the doping well and in the scribe line region. A conductive material fills the test via which has a second depth and an isolation covering the inner wall of the test via and is disposed in the doping region, in the doping well, in the epitaxial layer and in the scribe line region, to electrically connect to the epitaxial layer so that the test via is capable of testing the epitaxial layer and the substrate together. | 11-15-2012 |
20120287500 | OPTICAL LENS AND OPTICAL MICROSCOPE SYSTEM USING THE SAME - An optical lens is provided in the present invention. The optical lens includes a first curved surface and an annular mask component on and in direct contact with the first curved surface, wherein the annular mask component shields a peripheral annular region of the optical lens from entry of light. The present invention further provides an optical microscope system using the same. | 11-15-2012 |
20120288355 | Method for storing wafers - A method for storing wafers is disclosed. A plurality of wafers are placed into the wafer cassette box. The wafer cassette box is hermetically sealed and pumped down to vacuum for the wafer storage. Alternatively, the wafers carried by a holder conveyed on a wafer conveyor are placed into a pump-down chamber enclosing a section of the wafer conveyor. The pump-down chamber is hermetic sealed and pumped down to vacuum for the wafer storage on the wafer conveyor. | 11-15-2012 |
20120288683 | PROTUBERANT STRUCTURE AND METHOD FOR MAKING THE SAME - The protuberant structure of the present invention includes a substrate and a protrusion disposed on the substrate. The protrusion has a top side, a bottom side and a tapered side wall disposed between the top side and the bottom side. The top side has an extremely small top width which is not greater than 32 nm. | 11-15-2012 |
20120288684 | BUMP STRUCTURE AND FABRICATION METHOD THEREOF - A bump structure including a base portion, an inlaid wire segment, and a protruding tail segment is provided. The base portion is bonded on a bonding site. The inlaid wire segment is pressed into a top surface of the base portion. The protruding tail segment extends from the inlaid wire segment. The methods for forming the bump structure are also provided. | 11-15-2012 |
20120288802 | METHOD OF FORMING GATE CONDUCTOR STRUCTURES - A method of forming gate conductor structures. A substrate having thereon a gate electrode layer is provided. A multi-layer hard mask is formed overlying the gate electrode layer. The multi-layer hard mask comprises a first hard mask, a second hard mask, and a third hard mask. A photoresist pattern is formed on the multi-layer hard mask. A first etching process is performed to etch the third hard mask, using the photoresist pattern as a first etch resist, thereby forming a patterned third hard mask. A second etching process is performed to etch the second hard mask and the first hard mask, using the patterned third hard mask as a second etch resist, thereby forming a patterned first hard mask. A third etching process is performed to etch a layer of the gate electrode layer, using the patterned first hard mask as a third etch resist. | 11-15-2012 |
20120288966 | METHOD FOR DECAPSULATING INTEGRATED CIRCUIT PACKAGE - A method for decapsulating an integrated circuit package in the absence of a mask is disclosed. First, a package is provided. The package includes at least a circuit element and a molding compound enclosing the circuit. Second, a caustic solution is simultaneously provided and drained. The caustic solution is capable of etching the molding compound while in continuous contact with the molding compound to etch the molding compound. As a consequence, the molding compound is removed so that the circuit element in the package is substantially exposed. | 11-15-2012 |
20120288967 | METHOD FOR PROCESSING CIRCUIT IN PACKAGE - A method for decapsulating an integrated circuit package without the need of using a mask during the decapsulation process is disclosed. First, a package is provided. The package includes at least a circuit element and a molding compound enclosing the circuit. Second, a caustic solution is simultaneously provided. The caustic solution is capable of etching the molding compound and intermittently contacts a pre-selected area of the molding compound to etch the molding compound. As a consequence, the caustic solution removes the molding compound in the pre-selected area so the circuit element in the package is substantially exposed. | 11-15-2012 |
20120288968 | Method for repairing a semiconductor structure having a current-leakage issue - A method for repairing a semiconductor structure having a current-leakage issue includes finding a semiconductor structure having a current-leakage issue through application of a test voltage from an electric test device and applying an electric power stress to the semiconductor structure to melt a stringer or a bridge between two conductive elements or to allow the stringer or the bridge to be oxidized. | 11-15-2012 |
20120289048 | Method for obtaining a layout design for an existing integrated circuit - A method for obtaining a layout design for an existing integrated circuit, in which, an integrated circuit die is polished with a tilt angle to form an inclined polished surface and one or more images of the inclined polished surface are obtained. The images may be overlapped directly, or the image or the images may be utilized to provide information to obtain a layout design comprising at least one repeating unit structure of the layout structure. | 11-15-2012 |
20120289050 | METHOD OF ETCHING TRENCHES IN A SEMICONDUCTOR SUBSTRATE UTILIZING PULSED AND FLUOROCARBON-FREE PLASMA - A method of etching trenches in a semiconductor substrate. A patterned hard mask is formed over a semiconductor substrate. Using the patterned hard mask as an etching mask, a plasma etching process is then carried out to etch trenches into the semiconductor substrate not covered by the patterned hard mask, wherein the plasma etching process employs a fluorocarbon-free plasma etching chemistry and is performed under a plasma pulse output mode. | 11-15-2012 |
20120289128 | CHEMICAL MECHANICAL POLISHING SYSTEM - A chemical mechanical polishing (CMP) system includes a wafer polishing unit comprising a waste liquid sink for receiving a used slurry and a waste slurry drain piping for draining the used slurry; and a post-CMP cleaning unit coupled to the wafer polishing unit such that a used base chemical such as tetramethyl ammonium hydroxide (TMAH) produced from the post-CMP cleaning unit flows toward the wafer polishing unit to frequently wash at least the waste slurry drain piping in a real time fashion on a wafer by wafer basis. | 11-15-2012 |
20120289131 | CMP APPARATUS AND METHOD - A CMP apparatus includes an enclosure; a platen disposed within the enclosure, and a carrier for holding and rotating a wafer. The platen consists of a central, circular-shaped segment and a peripheral, annular-shaped segment with a gap formed therebetween. A first polishing pad is mounted on the central, circular-shaped segment. A second polishing pad is mounted on the peripheral, annular-shaped segment. In polishing, the carrier rotates between the first and second polishing pads, such that an annular edge region of the wafer is in direct contact with the second polishing pad. | 11-15-2012 |
20120289133 | CHEMICAL MECHANICAL POLISHING SYSTEM - A chemical mechanical polishing (CMP) system includes a wafer polishing unit producing a used slurry; a slurry treatment system for receiving and treating the used slurry to thereby produce an extracted basic solution; and a post-CMP cleaning unit utilizing the extracted basic solution to wash a polished wafer surface. The post-CMP cleaning unit includes a plurality of rollers for supporting and rotating a wafer, a brush for scrubbing the wafer, and a spray bar disposed in proximity to the brush for spraying the extracted basic solution onto the polished wafer surface. | 11-15-2012 |
20120289134 | CMP SLURRY MIX AND DELIVERY SYSTEM - A CMP slurry mix and delivery system includes at least one container for holding a polishing agent; a pump connected to the container for pumping the polishing agent to a point of use; and a slurry dispersion unit installed between the pump and the point of use, wherein slurry dispersion unit provides megasonic energy that is capable of dispersing the polishing agent flowing through the slurry dispersion unit. | 11-15-2012 |
20120293196 | TEST KEY STRUCTURE FOR MONITORING GATE CONDUCTOR TO DEEP TRENCH MISALIGNMENT AND TESTING METHOD THEREOF - The disclosure provides a test key structure for monitoring gate conductor to deep trench misalignment and a testing method thereof. The test key structure for monitoring gate conductor to deep trench misalignment includes: a deep trench capacitor structure comprising a plurality of parallel deep trench capacitor lines and a deep trench capacitor connect; a buried strap out-diffusion adjacent to a first side of the deep trench capacitor line; a first gate conductor structure comprising a plurality of parallel first gate conductor lines and a first gate conductor connect, wherein each first gate conductor line is disposed directly over the corresponding deep trench capacitor line; and a second gate conductor structure comprising a plurality of parallel second gate conductor lines and a second gate conductor connect, wherein the first gate conductor lines are electrically connected to each other via the second gate conductor connect, and wherein the first gate conductor lines and the second gate conductor lines are parallel to each other, and the first gate conductor lines and the second gate conductor lines are arranged alternately. | 11-22-2012 |
20120295408 | METHOD FOR MANUFACTURING MEMORY DEVICE - The method for manufacturing a memory device is provided. The method includes: implanting a first impurity into the substrate adjacent to the gate conductor structure to form a source region on a first side of the gate conductor structure and a drain region on a second side of the gate conductor structure; implanting a second impurity into the substrate to form a halo implantation region disposed adjacent to the source region, wherein the halo implantation region has a doping concentration which does not degrade a data retention time of the memory device; and performing an annealing process to the drain region, forming a diffusion region under the drain region, wherein the process temperature of the annealing process is controlled to ensure that the diffusion region has a doping concentration substantially equal to a threshold concentration which maintains an electrical connection between the drain and the deep trench capacitor. | 11-22-2012 |
20120298992 | TEST LAYOUT STRUCTURE - A test layout structure includes a substrate, a first oxide region of a first height, a second oxide region of a second height, a plurality of border regions, and a test layout pattern. The first oxide region is disposed on the substrate. The second oxide region is also disposed on the substrate and adjacent to the first oxide region. The first height is substantially different from the second height. A plurality of border regions are disposed between the first oxide region and the second oxide region. The test layout pattern includes a plurality of individual sections. A test region is disposed between two of the adjacent individual sections which are parallel to each other. | 11-29-2012 |
20120299185 | Slit Recess Channel Gate and Method of Forming the Same - A slit recess channel gate is further provided. The slit recess channel gate includes a substrate, a gate dielectric layer, a first conductive layer and a second conductive layer. The substrate has a first trench. The gate dielectric layer is disposed on a surface of the first trench and the first conductive layer is embedded in the first trench. The second conductive layer is disposed on the first conductive layer and aligned with the first conductive layer above the main surface, wherein a bottom surface area of the second conductive layer is substantially smaller than a top surface area of the second conductive layer. The present invention also provides a method of forming the slit recess channel gate. | 11-29-2012 |
20120301833 | METHOD OF REDUCING MICROLOADING EFFECT - The present invention provides a method of reducing microloading effect by using a photoresist layer as a buffer. The method includes: providing a substrate defined with a dense region and an isolated region. Then, a dense feature pattern and an isolated feature pattern are formed on the dense region and the isolated region respectively. After that, a photoresist layer is formed to cover the isolated region. Finally, the substrate and the photoresist layer are etched by taking the dense feature pattern and the isolated feature pattern as a mask. | 11-29-2012 |
20120302030 | METHOD OF FABRICATING A DEEP TRENCH DEVICE - A method of fabricating a deep trench capacitor includes the steps as follows. Firstly, a substrate having a trench therein is provided. Then, a bottom electrode is formed in the substrate around the trench. Later, a capacitor dielectric layer is formed to surround an inner sidewall of the trench. After that, a first conductive layer is form to fill up the trench. Subsequently, a material layer is formed on the substrate. Later, a hole is formed in the material layer, wherein the hole is directly above the trench. Finally, a second conductive layer is form to fill in the hole. | 11-29-2012 |
20120302049 | METHOD FOR IMPLANTING WAFER - The disclosure provides a method for wafer implantation including the following steps: providing a wafer, wherein the wafer comprises a central circular portion, and a peripheral annular portion adjacent to a edge of the wafer, and wherein the central circular portion and the peripheral annular portion are concentric; and implanting ion beams into the wafer, wherein the central circular portion has a first average implantation dose and the peripheral annular portion has a second average implantation dose, and the first average implantation dose and the second first average implantation dose are different. | 11-29-2012 |
20120302060 | METHOD FOR MANUFACTURING MEMORY DEVICE - The disclosure provides a method for manufacturing a memory device, including: providing a plurality of gate structures formed on a substrate, wherein the gate structures comprise a cap layer disposed on the top of the gate structure, and each two adjacent gate structures are separated by a gap; blanketly forming a polysilicon layer on the substrate to fill the gap; performing a planarization process to the polysilicon layer, obtaining a polysilicon plug; and performing an oxidation process after the planarization process, converting a part of the polysilicon plug and a residual polysilicon layer over the gate structure to silicon oxide. | 11-29-2012 |
20120305525 | METHOD OF REDUCING STRIATION ON A SIDEWALL OF A RECESS - A method of reducing striation on a sidewall of a recess is provided. The method includes the steps of providing a substrate covered with a photoresist layer. Then, the photoresist layer is etched to form a patterned photoresist layer. Later, a repairing process is performed by treating the patterned photoresist layer with a repairing gas which is selected from the group consisting of CF | 12-06-2012 |
20120309155 | SEMICONDUCTOR PROCESS - A semiconductor process is provided. A substrate is provided, gates each including a silicon layer, a silicide layer and a cap layer are formed thereon, and doped regions are formed at two sides of each gate. An insulating layer is formed to cover a memory region and a periphery region. First contact holes are formed in the insulating layer in the memory region, and each first contact hole is disposed between the two adjacent gates and exposes the doped region. A contact plug is formed in each first contact hole to electrically connect the doped region. A patterned mask layer is formed on the substrate to cover the memory region and expose a portion of the periphery region. Using the patterned mask layer as a mask, second and third contact holes are formed in the insulating layer in the periphery region, to expose the silicide layer and the doped region. | 12-06-2012 |
20120309192 | SEMICONDUCTOR PROCESS - A semiconductor process is provided. A mask layer is formed on a substrate and has a first opening exposing a portion of the substrate. Using the mask layer as a mask, a dry etching process is performed on the substrate to form a second opening therein. The second opening has a bottom portion and a side wall extending upwards and outwards from the bottom portion, wherein the bottom portion is exposed by the first opening and the side wall is covered by the mask layer. Using the mask layer as a mask, a vertical ion implantation process is performed on the bottom portion. A conversion process is performed, so as to form converting layers on the side wall and the bottom portion of the second opening, wherein a thickness of the converting layer on the side wall is larger than a thickness of the converting layer on the bottom portion. | 12-06-2012 |
20130017684 | PROCESS OF FORMING SLIT IN SUBSTRATEAANM Wang; Wen-ChiehAACI Taoyuan CountyAACO TWAAGP Wang; Wen-Chieh Taoyuan County TWAANM Chen; Yi-NanAACI Taipei CityAACO TWAAGP Chen; Yi-Nan Taipei City TWAANM Liu; Hsien-WenAACI Taoyuan CountyAACO TWAAGP Liu; Hsien-Wen Taoyuan County TW - A process of forming a slit in a substrate is provided. A mask layer is formed on a substrate, wherein the mask layer does not include carbon. An etching process is performed to be substrate by using the mask layer as a mask, so as to form a slit in the substrate. The etching gas includes Cl | 01-17-2013 |
20130017687 | METHOD FOR FORMING OPENINGS IN SEMICONDUCTOR DEVICEAANM Lin; Chih-ChingAACI Taoyuan CountyAACO TWAAGP Lin; Chih-Ching Taoyuan County TWAANM Chen; Yi-NanAACI Taoyuan CountyAACO TWAAGP Chen; Yi-Nan Taoyuan County TWAANM Liu; Hsien-WenAACI Taoyuan CountyAACO TWAAGP Liu; Hsien-Wen Taoyuan County TW - A method for forming an opening in a semiconductor device is provided, including: providing a semiconductor substrate with a silicon oxide layer, a polysilicon layer and a silicon nitride layer sequentially formed thereover; patterning the silicon nitride layer, forming a first opening in the silicon nitride layer, wherein the first opening exposes a top surface of the polysilicon layer; performing a first etching process, using gasous etchants including hydrogen bromide (HBr), oxygen (O | 01-17-2013 |
20130043470 | CRACK STOP STRUCTURE AND METHOD FOR FORMING THE SAME - The present invention in a first aspect proposes a semiconductor structure with a crack stop structure. The semiconductor structure includes a matrix, an integrated circuit and a scribe line. The matrix includes a scribe line region and a circuit region. The integrated circuit is disposed within the circuit region. The scribe line is disposed within the scribe line region and includes a crack stop trench which is disposed in the matrix and adjacent to the circuit region. The crack stop trench is parallel with one side of the circuit region and filled with a composite material in the form of a grid to form a crack stop structure. | 02-21-2013 |
20130045600 | METHOD FOR FORMING FIN-SHAPED SEMICONDUCTOR STRUCTURE - A method for fabricating a fin-shaped semiconductor structure is provided, including: providing a semiconductor substrate with a semiconductor island and a dielectric layer formed thereover; forming a mask layer over the semiconductor island and the dielectric layer; forming an opening in the mask layer, exposing a top surface of the semiconductor island and portions of the dielectric layer adjacent to the semiconductor island; performing an etching process, simultaneously etching portions of the mask layer, and portions of the semiconductor island and the dielectric layer exposed by the opening; and removing the mask layer and the dielectric layer, leaving an etched semiconductor island with curved top surfaces and various thicknesses over the semiconductor substrate. | 02-21-2013 |
20130052820 | METHOD OF FORMING CONDUCTIVE PATTERN - A method of forming conductive pattern is provided. A seeding layer is formed on an underlayer. By using an energy ray, an irradiation treatment is performed on a portion of a surface of the seeding layer. The seeding layer thus includes a plurality of irradiated regions and a plurality of unirradiated regions. A conversion treatment is performed on the irradiated regions of the seeding layer. A selective growth process is performed, so as to form a conductive pattern on each unirradiated region of the seeding layer. The irradiated regions of the seeding layer are removed, so that the conductive patterns are insulated from each other. | 02-28-2013 |
20130062727 | CRACK STOP STRUCTURE AND METHOD FOR FORMING THE SAME - A semiconductor structure includes a matrix, an integrated circuit and a scribe line. The matrix includes a scribe line region and a circuit region. The integrated circuit is disposed within the circuit region. The scribe line is disposed within the scribe line region and includes a crack stop trench which is disposed in the matrix and adjacent to the circuit region. The crack stop trench is parallel with one side of the circuit region and filled with a composite material in a form of a grid to form a crack stop structure. | 03-14-2013 |
20130068264 | WAFER SCRUBBER APPARATUS - A wafer scrubber apparatus is disclosed, including a chamber, and holder connecting to a spindle disposed in the chamber, wherein the holder supports a wafer, and a gas purge pipe disposed at the top of a wall of the chamber, wherein the gas purge pipe comprises a plurality of gas injection holes facing downward to purge gas along the chamber wall making water flow along the chamber wall more smoothly and more quickly for preventing the water from scattering back to the wafer. | 03-21-2013 |
20130069235 | BONDING PAD STRUCTURE FOR SEMICONDUCTOR DEVICES - A bonding pad structure includes a semiconductor substrate having thereon a plurality of inter-metal dielectric (IMD) layers comprising at least a topmost IMD layer; a bondable metal pad layer disposed on a surface of the topmost IMD layer within a pad forming region; a passivation layer covering a periphery of the bondable metal pad layer and the surface of the topmost IMD layer; anda plurality of via plugs disposed in the topmost IMD layer within an annular region of the pad forming region, wherein the via plugs are not formed in a central region of the pad forming region. | 03-21-2013 |
20130071790 | METHOD OF FORMING AN ETCH MASK - A method of forming an etch mask includes: providing a substrate having thereon a material layer to be etched; forming a hard mask layer consisting of a radiation-sensitive, single-layer resist material on the material layer; exposing the hard mask layer to actinic energy to change solvent solubility of exposed regions of the hard mask layer; and subjecting the hard mask layer to water treatment to remove the exposed regions of the hard mask layer, thereby forming a masking pattern consisting of unexposed regions of the hard mask layer. | 03-21-2013 |
20130071978 | FABRICATING METHOD OF TRANSISTOR - A fabricating method of a transistor is provided. A patterned sacrificed layer is formed on a substrate, wherein the patterned sacrificed layer includes a plurality of openings exposing the substrate. By using the patterned sacrificed layer as a mask, a doping process is performed on the substrate, thereby forming a doped source region and a doped drain region in the substrate exposed by the openings. A selective growth process is performed to form a source and a drain on the doped source region and the doped drain region, respectively. The patterned sacrificed layer is removed to expose the substrate between the source and the drain. A gate is formed on the substrate between the source and the drain. | 03-21-2013 |
20130071992 | SEMICONDUCTOR PROCESS - A semiconductor process is provided. An insulating layer is formed on a semiconductor substrate. A portion of the insulating layer is removed, so as to form a plurality of isolation structures and a mesh opening disposed between the isolation structures and exposing the semiconductor substrate. By performing a selective growth process, a semiconductor layer is formed from a surface of the semiconductor substrate exposed by the mesh opening, so that the isolation structures are disposed in the semiconductor layer. | 03-21-2013 |
20130074878 | WAFER SCRUBBER - A wafer scrubber is disclosed, including a chamber, and a holder connecting to a spindle disposed in the chamber, wherein the holder supports a wafer, and the wafer spins to remove water on the wafer, and a mashed inner cup comprising a plurality of through holes disposed between the holder and a wall of the chamber, wherein the mashed inner cup receives water from a surface of the wafer and rotates around the spindle to release the water through the through holes. | 03-28-2013 |
20130078774 | METHOD FOR FORMING DOPE REGIONS WITH RAPID THERMAL PROCESS - The invention provides a method for forming a semiconductor device, including providing a substrate, forming a gate dielectric layer, forming a gate electrode on the gate dielectric layer, forming a spacer on sidewalls of the gate dielectric layer and the gate electrode, and using a rapid thermal process (RTP) apparatus comprising a plurality of lamps and a bias applying system to dope the substrate to form a source/drain region, wherein in the RTP apparatus, gaseous dopant species are illuminated by the lamps to be excited for transference gaseous dopant species to dopant ions and the dopant ions are moved by a bias from the bias applying system to be doped into the substrate. | 03-28-2013 |
20130078804 | METHOD FOR FABRICATING INTEGRATED DEVICES WITH REDUCTED PLASMA DAMAGE - A method for fabricating an integrated device with reduced plasma damage is disclosed, including providing a substrate, forming a structural layer on the substrate, forming a photoresist layer on the structural layer, and performing an etching process to the structural layer, wherein the photoresist layer is conductive to reduce plasma damage during the etching process. | 03-28-2013 |
20130078815 | METHOD FOR FORMING SEMICONDUCTOR STRUCTURE WITH REDUCED LINE EDGE ROUGHNESS - A method for forming a semiconductor structure with reduced line edge roughness is provided, including: providing a device layer with a patterned photoresist layer formed thereon; and performing a plasma etching process to pattern the device layer with the patterned photoresist layer formed thereon, forming a patterned device layer, wherein the plasma etching process is operated under a continuous on-stage voltage provided with a relative higher frequency and an on-off stage voltage with pulsing modulation provided with a relative lower frequency. | 03-28-2013 |
20130099309 | VERTICAL MOSFET ELECTROSTATIC DISCHARGE DEVICE - A vertical MOSFET electrostatic discharge device is disclosed, including a substrate comprising a plurality of trenches, a recessed gate disposed in each trench, a drain region disposed between each of the two neighboring recessed gates, an electrostatic discharge implant region disposed under each drain region, and a source region surrounding and disposed under the recessed gates and the electrostatic discharge implant regions. | 04-25-2013 |
20130102123 | METHOD FOR FABRICATING SINGLE-SIDED BURIED STRAP IN A SEMICONDUCTOR DEVICE - A method for manufacturing a buried-strap includes: forming a trench capacitor structure in a semiconductor substrate, wherein the trench capacitor structure has a doped polysilicon layer and an isolation collar covered by the doped polysilicon layer, and a top surface of the doped polysilicon layer is lower than a top surface of the semiconductor substrate such that a first recess is formed; sequentially forming a first resist layer, a second resist layer and a third resist layer over the semiconductor substrate; sequentially patterning the third resist layer, the second resist layer and the first resist layer, forming a patterned tri-layer resist layer over the semiconductor substrate; partially removing a portion of the doped polysilicon layer exposed by the patterned tri-layer resist layer to form a second recess; removing the patterned tri-layer resist layer; and forming an insulating layer in the second recess and a portion of the first recess. | 04-25-2013 |
20130307067 | Slit Recess Channel Gate - A slit recess channel gate is provided. The slit recess channel gate includes a substrate, a gate dielectric layer, a first conductive layer and a second conductive layer. The substrate has a first trench. The gate dielectric layer is disposed on a surface of the first trench and the first conductive layer is embedded in the first trench. The second conductive layer is disposed on the first conductive layer and aligned with the first conductive layer above the main surface, wherein a bottom surface area of the second conductive layer is substantially smaller than a top surface area of the second conductive layer. | 11-21-2013 |
20140154864 | CRACK STOP STRUCTURE AND METHOD FOR FORMING THE SAME - The present invention in a first aspect proposes a semiconductor structure with a crack stop structure. The semiconductor structure includes a matrix, an integrated circuit and a scribe line. The matrix includes a scribe line region and a circuit region. The integrated circuit is disposed within the circuit region. The scribe line is disposed within the scribe line region and includes a crack stop trench which is disposed in the matrix and adjacent to the circuit region. The crack stop trench is parallel with one side of the circuit region and filled with a composite material in the form of a grid to form a crack stop structure. | 06-05-2014 |
20140213027 | MEMORY DEVICE HAVING BURIED BIT LINE AND VERTICAL TRANSISTOR AND FABRICATION METHOD THEREOF - A method of forming a buried bit line is provided. A substrate is provided and a line-shaped trench region is defined in the substrate. A line-shaped trench is formed in the line-shaped trench region of the substrate. The line-shaped trench includes a sidewall surface and a bottom surface. Then, the bottom surface of the line-shaped trench is widened to form a curved bottom surface. Next, a doping area is formed in the substrate adjacent to the curved bottom surface. Lastly, a buried conductive layer is formed on the doping area such that the doping area and the buried conductive layer together constitute the buried bit line. | 07-31-2014 |
20150064893 | METHOD FOR FORMING TRENCH MOS STRUCTURE - A method for forming a trench MOS structure. First, a substrate, an epitaxial layer, a doping region and a doping well are provided. The substrate has a first conductivity type, a first side and a second side opposite to the first side. The epitaxial layer has the first conductivity type and is disposed on the first side. The doping well has a second conductivity type and is disposed on the epitaxial layer. The doping region has the first conductivity type and is disposed on the doping well. A gate trench penetrates the doping region and the doping well. The doping well is partially removed to form a bottom section of the gate trench. A gate isolation is formed to cover the inner wall of the bottom section and a top section of the gate trench. The gate trench is filled with a conductive material to form a trench gate. | 03-05-2015 |
Hsin-Chih Liu, Taoyuan County TW
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20120106045 | HANDHELD ELECTRONIC DEVICE - A handheld electronic device includes a first body, a second body stacked with the first body, a first plate between the first and second body and fixed to the first body, a second plate between the first plate and second body and fixed to the second body, a first locating structure, and a second locating structure. The first plate includes a sliding slot and a rib transversely disposed in the sliding slot and extended along the sliding slot. An edge of the second plate includes a sliding block clamped on the rib, so the second plate can move along the sliding slot. The first locating structure is disposed on the first plate and located on a moving path of the second plate. The second locating member is disposed on the sliding block, and adapted to interfere with the first locating structure on a locking position of the moving path. | 05-03-2012 |
20120128317 | PORTABLE ELECTRONIC DEVICE WITH POWER TRIGGERED BY COMPONENT ROTATION - A portable electronic device including a first component with a recording unit; and a second component is provided. The second component is placed on the first component in a rotatable manner. Besides, power supply of the recording unit is triggered when the second component rotates relatively to the first component from a first position to a second position. | 05-24-2012 |
20140239880 | ELECTRICAL SYSTEM, INPUT APPARATUS AND CHARGING METHOD FOR INPUT APPARATUS - An electrical system, an input apparatus and a charging method for the input apparatus are provided. The input apparatus includes a main body, a processor, an antenna module, an energy storing component and an electrode. The main body includes a stylus body and a stylus head. The processor, antenna module and the energy storing component are disposed in the main body. The energy storing component is used to provide electrical energy to the processor and the antenna module. The electrode is disposed on a surface of the main body, and the electrode is coupled to the energy storing component. Wherein, when the stylus input apparatus contacts with the electronic apparatus, the electronic apparatus provides an electrical energy to the energy storing component through the electrode. | 08-28-2014 |
20140293555 | RECEPTACLE CONNECTOR AND ELECTRONIC DEVICE - A receptacle connector adapted to be fixed to a casing of an electronic device and electrically connected to a circuit board for enabling the receptacle connector to be adapted to connect with a plug connector is provided. The receptacle connector includes an insulating body and a plurality of conductive terminals. The insulating body has a tunnel, and the tunnel extends from the outer side of the insulating body to the inner side of the insulating body, wherein a side of the tunnel is exposed at a top portion of the insulating body, and the insulating body is adapted to be fixed to the casing to cover the side of the tunnel, so that the tunnel is adapted to form a plug hole with the casing. The conductive terminals are disposed through the insulating body. A receptacle connector and an electronic device are also provided. | 10-02-2014 |
Hsin-Sheng Liu, Taoyuan County TW
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20100150063 | METHOD AND SYSTEM FOR A NODE TO JOIN A WIRELESS AD-HOC NETWORK - A method for a new node to join an ad-hoc network is provided. The method includes two basic functions. When the new node is allowed to join the network, the indicating device of the node being joined generates an indication. When the new node joins the network, the indicating device of the new node also generates an indication. The method further includes two commands, the join-rejection command and the joined-rejection command, to cancel the join procedure when the indicating device of the new node and the node being joined do not indicate correspondingly. Accordingly, the method efficiently reduces the possibility of joining an unanticipated node. | 06-17-2010 |
Jian-Chyn Liu, Taoyuan County TW
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20090085931 | METHOD FOR VIEWING IMAGE - A method for viewing an image is provided. The method is suitable for viewing an image displayed on a display by using an input device to directly touch the display. The method includes steps of receiving a static motion made by the input device on the display, determining a motion-temporal-still time of the static motion, and then initializing an image panning mode, when the motion-temporal-still time is at least a first predetermined time. | 04-02-2009 |
20090085936 | IMAGE PROCESSING METHOD - An image processing method is provided. The image processing method is applicable to a display having a stream of drawing as an input for selecting at least a portion of an image thereon as a selected image region. The method includes steps of identifying the input as a closed region input and then performing an image operation. | 04-02-2009 |
20090115799 | METHOD FOR DISPLAYING IMAGES - A method for displaying images is provided. First, an image viewing function is activated. Then, an image information file which stores image information corresponding to a plurality of images is read. Properties and effects of the images are adjusted based on the obtained image information. Finally, the adjusted image is displayed. Accordingly, the images can be adjusted, displayed, and sorted quickly without modifying original files of the images. | 05-07-2009 |
20090276782 | RESOURCE MANAGEMENT METHODS AND SYSTEMS - Resource management methods and systems are provided. First, it is determined whether a resource is currently being used. When the resource is currently being used by a first program, a release notification is transmitted to the first program to release the resource. | 11-05-2009 |
Ji-Chyun Liu, Taoyuan County TW
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20090167533 | FRACTAL CODE AND GENERATING METHOD THEREOF - A fractal code is provided. The fractal code includes a substrate and a frequency selective surface (FSS). The FSS includes a fractal configuration designed by an iterative procedure, and the fractal configuration is disposed on the substrate. The fractal configuration is formed by a plurality of fractal circle patterns. The radii of the fractal circle patterns decrease by a specified ratio so as to assume a self-similar property, thereby achieving a multi-spectrum property and generating an identification code in frequency domain (FD-ID code). The FD-ID code is applied with space-feed method, and thus a wireless signal is operated in a predetermined band with reflection or transmission radiations, thereby achieving the function of radio frequency identification. | 07-02-2009 |
20100156557 | PHASE SHIFTER - A phase shifter includes a substrate, an input part, a plurality of first transmission lines, a plurality of second transmission lines, a coupling part, a controller, and a plurality of output parts. When a signal is fed in a first transmission line, the fed signal is distributed to a corresponding second transmission line via the first transmission line, and an area of the second transmission line shielded by the coupling part is changed by rotating the coupling part through the controller, so as to shift a phase of the signal transmitted by the second transmission line. | 06-24-2010 |
Keng-Shen Liu, Taoyuan County TW
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20120199177 | Multijunction Solar Cell Device - The present disclosure provides a solar cell device. The device has solar cells having multijunction. A supplemental current source is connected with one of the solar cells having a smallest current in the device. Thus, through providing required current by the supplemental current source, usage performance of the device is enhanced. | 08-09-2012 |
Ker Cheng Liu, Taoyuan County TW
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20110037445 | POWER CONTROL CIRCUIT FOR WIRE COMPENSATION AND COMPENSATION METHOD OF THE SAME - A power control circuit with wire compensation is provided. The power control circuit is applied in a power converter, which has an output coupled to a load through a power wire. The power control circuit has an adaptive sensing circuit and a controller. The adaptive sensing circuit is utilized for detecting an output voltage of the power converter and a current on the power wire and generating a feedback signal according to the output voltage and the current on the power wire. The controller is utilized for adjusting a level of the output voltage according to the feedback signal. | 02-17-2011 |
20110057638 | PULSE WIDTH MODULATION REGULATOR IC AND CIRCUIT THEREOF - A pulse width modulation regulator IC is provided for controlling a duty cycle of at least one switch to convert one input voltage signal into an output voltage. An input pin is provided for receiving an input signal different from the input voltage signal. The input signal has a lasting time substantially the same as the time that input voltage signal situated at a high level, but the waveforms of the two signals are different. The input signal is converted into a square wave signal by a conversion unit, and a PWM signal is generated by a PWM controller according to the square wave signal to control the duty cycle of the switch. Therefore, the input pin can be saved by adjusting an internal or external circuit of the IC for the usage of the different kinds of input signals without increasing the number of input pins of the IC. | 03-10-2011 |
Kou-Chen Liu, Taoyuan County TW
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20100072449 | RRAM WITH IMPROVED RESISTANCE TRANSFORMATION CHARACTERISTIC AND METHOD OF MAKING THE SAME - A method for fabricating an RRAM is provided. First, a bottom electrode is formed. A resistive layer is formed on the bottom electrode. A top electrode is then formed on the resistive layer, wherein the top electrode is selected from the group consisting of indium tin oxide (ITO) and indium zinc oxide (IZO). Finally, the top electrode is irradiated with UV light. | 03-25-2010 |
20120098022 | PACKAGING STRUCTURE AND METHOD FOR OLED - The present invention discloses a packaging structure and method for organic light emitting devices, in which the packaging structure comprises a substrate; an OLED device, which disposing on the substrate; a first transparent protection layer, which forming on the OLED device; and a second transparent protection layer, which forming on the first transparent protection layer. | 04-26-2012 |
Kuan-Cheng Liu, Taoyuan County TW
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20120186852 | Structure of electrolessly palladium and gold plated films and process for making the same, assembled structure of palladium and gold plated films bonded with copper or copper-palladium wire and assembling process therefore - Disclosed is a structure of electrolessly palladium (Pd) and gold (Au) plated films on a bonding pad, comprising a Pd plated layer on the bonding pad; and an Au plated layer on the Pd plated layer. Also disclosed is an assembled structure formed of the electrolessly Pd—Au plated films wire-bonded with a copper (Cu) or Pd—Cu wire to the Au plated layer. In addition, a process for producing the structure of the electrolessly Pd—Au plated films and an assembling process for the assembled structure are disclosed. According to the present invention, the Pd plated layer is used to replace the conventional nickel layer so as to enhance the wire-bonding strength between the Cu or Pd—Cu wire and the bonding pad. | 07-26-2012 |
Kung-Tien Liu, Taoyuan County TW
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20100021380 | DIEGHYLENETRIAMINEPENTAACETIC ACID (DTPA)-MODIFIED FERROFLUID, PREPARATION METHOD OF THE SAME AND USES OF THE SAME IN PREPARATION OF PEPTIDE FERROFLUID - A present invention relate to a diethylenetriaminepentaacetic acid (DTPA)-modified ferrofluid and a preparation method of the same. The DTPA-ferrofluid contains DTPA and a nano ferrofluid. The DTPA-ferrofluid can be further mixed with a peptide. Unmodified or modified peptide ferrofluids prepared from the DTPA-modified ferrofluid, such as unmodified or modified octreotide-containing or unmodified or modified lanreotide-containing ferrofluid. | 01-28-2010 |
20100112706 | METHOD FOR ANALYZING STRUCTURE AND PURITY OF SEROTONIN TRANSPORTER IMAGING AGENT [123I] ADAM AND PRECURSOR SnADAM - An analytical technique for determining the structures of serotonin transporter (SERT) imaging agent [ | 05-06-2010 |
20120101741 | DIRECT SOLID SAMPLE ANALYTICAL TECHNOLOGY FOR DETERMINING A CONTENT AND A UNIFORMITY THEREOF IN A LYOPHILIZED KIT OF A SULFUR-CONTAINING CHELATOR WITH A STABLE COMPLEX CAPACITY FOR RADIOTECHNETIUM (TC-99M) AND RADIORHENIUM (RE-186, RE-188) - The present invention is related to a direct solid sample analytical technology for determining a content and a uniformity thereof in a lyophilized kit of a sulfur-containing chelator with a stable complex capacity for radiotechnetium (Tc-99m) and radiorhenium (Re-186, Re-188). An economical, stable and easily accessible coal standard is used herein as a contrast substance to construct a sulfur calibration curve, followed by obtaining the sulfur content and the uniformity thereof in the solid lyophilized sample by interpolating the foregoing result into the sulfur calibration curve. Then, the weight content percent is converted to get the content and the uniformity of the chelator in the lyophilized kit. The quality control of active pharmaceutical ingredients (API) in the lyophilized kit during key production processes and clinical applications is thus assured. | 04-26-2012 |
Liang-Wei Liu, Taoyuan County TW
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20110248096 | NEBULIZING APPARATUS - The present invention discloses a nebulizing apparatus comprising an outer housing, a reservoir, a nebulizing unit, a chassis, a control unit and a power supply unit. The reservoir is disposed in the accommodation space of the outer housing and provided for storing a solution. The nebulizing unit is disposed in the reservoir for nebulizing the solution stored in the reservoir to generate a plurality of nebulized particles. The chassis is disposed between the reservoir and the outer housing. The control unit is disposed on the chassis and electrically connected to the nebulizing unit for controlling the vibration frequency required by the nebulizing unit to nebulize the solution. The power supply unit is disposed on the chassis and connected with the control unit, and provides the required power and electronic signals to the nebulizing unit through the control unit. | 10-13-2011 |
Lun-Feng Liu, Taoyuan County TW
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20120056824 | COMPOSITE STRUCTURE AND TOUCH DEVICE - A composite structure and a touch device are provided. The composite structure includes a substrate and a transparent conductive pattern layer. The substrate has a central area and a peripheral area. The transparent conductive pattern layer is disposed on the substrate and has a plurality of recess-portions. The recess-portions are disposed on a side surface of the transparent conductive pattern layer away from the substrate and at least located in the peripheral area. A depth of each of the recess portions is smaller than or equal to a thickness of the transparent conductive pattern layer. A width of each of the recess portions is between 100 μm and 1000 μm, and the recess portions are arranged in a ring-shape or arranged in an array. | 03-08-2012 |
Mao-Chen Liu, Taoyuan County TW
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20110042586 | RADIOACTIVITY MEASURING APPARATUS WITH ROTATING STAGE FOR WASTE DRUMS - A radioactivity measuring apparatus with a rotating stage for waste drums is provided, which includes a case, a plurality of radioactive counters, a rotation unit, and a control unit. The case has an opening and an accommodating space in communication with the opening. A shielding gate is connected to one side of the opening. The plurality of radioactive counters is disposed in the accommodating space, and used for detecting a radioactive counting associated with a sample. The rotation unit is disposed at a wall on a side of the shielding gate corresponding to the opening, and used for supporting the sample. The control unit is electrically connected to the rotation unit and the plurality of radioactive counters, and used for controlling the rotation unit to rotate by a control signal, so as to enable the sample to rotate within the accommodating space. | 02-24-2011 |
20120271562 | METHOD OF ENERGY SPECTRUM ANALYSIS FOR SODIUM IODIDE (NaI) DETECTOR - The present invention relates to a method of energy spectrum analysis for sodium iodide (NaI) detector, by which an energy spectrum characteristic obtained from a sodium iodide (NaI) detector is analyzed and used for establishing a system capable of qualitative nuclide identification and activity determination that can be adapted in applications of waste clearance management. | 10-25-2012 |
20140365173 | Method for Acquiring Nuclide Activity with High Nuclide Identification Ability Applicable to Spectroscopy Measured from Sodium Iodide Detector - A method for acquiring a nuclide activity with high nuclide identification ability applicable to a spectroscopy measured from sodium iodide detector is described. In performing this, an electronic impulse signal received by the sodium iodide detector is transformed into a spectroscopy. Then, the resulting spectroscopy is analyzed in characteristics with some previous calculations. The analysis result provides an assistance in establishing a system capable of identifying a nuclide and calculating the activity of the nuclide, which not only features an excellent nuclide identification ability but also presents a fantabulous reconstruction result. Thereby the present invention may be used for establishing a system capable of qualitative nuclide identification and activity determination that can be adapted in applications of waste clearance management. | 12-11-2014 |
Ming Feng Liu, Taoyuan County TW
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20090121647 | MULTI-LAMP BACKLIGHT APPARATUS - A multi-lamp backlight apparatus is disclosed. The multi-lamp backlight apparatus includes 2N lamps, N balancing transformers, and a high-voltage power source. N is a positive integer and k is an integer index ranging from 1 to N. The kth balancing transformer among the N balancing transformers includes a first primary winding, a second primary winding, and a secondary winding. The first primary winding connects in series with the (2k−1)th lamp of the 2N lamps. The second primary winding connects in series with the first primary winding and the (2k)th lamp. The secondary winding corresponds to the first primary winding and the second primary winding. The high-voltage power source is connected between the first primary windings and the second primary windings. | 05-14-2009 |
20090160350 | BALANCE TRANSFORMER AND BACKLIGHT APPARATUS - The invention provides a balance transformer and a backlight apparatus using the same. The balance transformer comprises a first main coil, a second main coil, a first induction coil, and a conductor. The first main coil has a first contact point and a second contact point, and the second main coil has a third contact point and a fourth contact point. The first induction coil is corresponding to the first main coil and the second main coil. The conductor is then series connected to the first contact point and the fourth contact point. Accordingly, the balance transformer drives the backlight apparatus to light and balances the currents of a plurality of light units of the backlight apparatus. | 06-25-2009 |
Pang-Chi Liu, Taoyuan County TW
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20100297381 | Method of improving read stability of optical recording medium and optical recording medium manufactured using the method - A method for improving read stability of optical recording medium is disclosed. In the method, the thickness of a recording layer of an optical recording medium is adjusted to control the disc absorptivity, and the recording layer thickness is matched with a power difference between a laser write power (Pw) and a laser erase power (Pe), so as to control the optimal laser power for irradiating and accordingly changing the optical properties of the recording layer. It is found that by using properly increased recording layer thickness corresponding to a given disc absorptivity, and properly matching the recording layer thickness with a properly increased power difference, the read stability and recording characteristics of the optical recording media can be improved without significantly changing the layer structure and writing strategy of the optical recording medium. | 11-25-2010 |
Pang Hsuan Liu, Taoyuan County TW
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20100061116 | BACKLIGHT MODULE - A backlight module includes a light guide plate, a light source disposed at a side of the light guide plate, a diffuser sheet positioned over the light guide plate but not directly contacting the light guide plate, and a light mixing space positioned between the light guide plate and the diffuser sheet so that light emitted from the light guide plate efficiently mixes in the light mixing space before entering the diffuser sheet and being emitted out of the backlight module. | 03-11-2010 |
Pao-Chu Liu, Taoyuan County TW
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20080280750 | Catalysts for treating acid and halogen gases and production methods thereof - Catalysts for treating acid gases and halogen gases and the production methods thereof. The acid and halogen gases include HCl, HF, HBr, HI, F | 11-13-2008 |
Po-Chang Liu, Taoyuan County TW
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20100298745 | HEAD CAP FOR HEAD PHYSICAL THERAPY - The head cap for the use of head physical therapy in the present invention is related that the head cap is covered the head when using the vacuum device to generate a negative pressure for treating the head by massaging the user's head and improving a blood circulation. | 11-25-2010 |
Sheng Yung Liu, Taoyuan County TW
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20090133742 | SOLAR CELL AND METHOD OF MANUFACTURING THE SAME - A solar cell includes a substrate, a conductor layer and an anti-reflection coating (ARC) layer. The substrate has a front side, a back side and a doped region adjacent to the front side. The conductor layer has a first portion embedded into the doped region and a second portion other than the first portion. The ARC layer is disposed on the front side of the substrate, the second portion of the conductor layer is disposed in the ARC layer, and the conductor layer has an exposed surface exposed out of the ARC layer. The exposed surface of the conductor layer is substantially flush with an exposed surface of the ARC layer. A method of manufacturing the solar cell is also disclosed. | 05-28-2009 |
20110094571 | SOLAR CELL WITH UPPER AND LOWER CONDUCTOR LAYERS STACKED TOGETHER - A solar cell includes a substrate, a lower conductor layer, an anti-reflection coating (ARC) layer and an upper conductor layer. The substrate has a front side, a back side and a doped region adjacent to the front side. The lower conductor layer has a first portion embedded into the doped region and a second portion other than the first portion. The ARC layer is disposed on the front side of the substrate and covers the lower conductor layer such that the second portion of the lower conductor layer is disposed in the ARC layer. The upper conductor layer has a first portion embedded into the ARC layer and a second portion other than the first portion of the upper conductor layer. The second portion of the upper conductor layer is exposed out of the ARC layer, and the upper conductor layer is electrically connected to the lower conductor layer. | 04-28-2011 |
20120288981 | METHOD OF MANUFACTURING SOLAR CELL WITH TWO EXPOSED SURFACES OF ARC LAYER DISPOED AT DIFFERENT LEVELS - A method of manufacturing a solar cell includes the steps of: providing a substrate having a front side, a back side and a doped region; forming a conductor layer on the front side; firing the conductor layer at a temperature such that the conductor layer is formed with a first portion embedded into the doped region and a second portion other than the first portion; forming an anti-reflection coating (ARC) layer on the front side and the second portion, wherein the ARC layer covers the conductor layer so that the second portion of the conductor layer is disposed in the ARC layer; and removing the ARC layer on the conductor layer so that the conductor layer has an exposed surface exposed out of the ARC layer, wherein the exposed surface of the conductor layer is substantially flush with a first exposed surface of the ARC layer. | 11-15-2012 |
Shen Yung Liu, Taoyuan County TW
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20120282724 | METHOD OF MANUFACTURING SOLAR CELL WITH UPPER AND LOWER CONDUCTOR LAYERS STACKED TOGETHER - A method of manufacturing a solar cell comprises the steps of: forming a lower conductor layer on a front side of a substrate; firing the lower conductor layer at a first temperature to form a first portion embedded into a doped region of the substrate and a second portion; forming an anti-reflection coating (ARC) layer on the front side and the second portion, wherein the ARC layer covers the lower conductor layer such that the second portion is disposed in the ARC layer; forming an upper conductor layer, corresponding to the lower conductor layer and electrically connected to the lower conductor layer, on the ARC layer; and firing the upper conductor layer at a second temperature to form a first portion embedded into the ARC layer and a second portion, which is exposed out of the ARC layer. | 11-08-2012 |
Shih-Hao Liu, Taoyuan County TW
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20090085539 | FEEDBACK AND COMPARISON APPARATUS AND DC-DC VOLTAGE CONVERTER - A feedback and comparison apparatus applicable to a DC-DC voltage converter is provided. The feedback and comparison apparatus includes a comparator and a voltage feedback circuit. The voltage feedback circuit includes a first voltage dividing component and a second voltage dividing component. The comparator compares a feedback voltage with a first reference voltage, and outputs a control signal to the DC-DC voltage converter according to the comparing result. One end of the first voltage dividing component is coupled to an output voltage output by the DC-DC voltage converter and the other end of the first voltage dividing component is coupled to one end of the second voltage dividing component, for providing the feedback voltage. The other end of the second voltage dividing component is coupled to a second reference voltage. The present invention is applicable to a situation that the output voltage is smaller than the reference voltage. | 04-02-2009 |
Shih-Ta Liu, Taoyuan County TW
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20100298745 | HEAD CAP FOR HEAD PHYSICAL THERAPY - The head cap for the use of head physical therapy in the present invention is related that the head cap is covered the head when using the vacuum device to generate a negative pressure for treating the head by massaging the user's head and improving a blood circulation. | 11-25-2010 |
Shih-Wen Liu, Taoyuan County TW
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20080290389 | DYNAMIC RANDOM ACCESS MEMORY AND MANUFACTURING METHOD THEREOF - A dynamic random access memory (DRAM) is provided. The DRAM comprises a substrate, a vertical transistor, a deep trench capacitor and a buried strap. The substrate has a trench and a deep trench located on one side of the trench thereon. The vertical transistor is disposed in the trench, a portion of which is disposed on the substrate. The deep trench capacitor is disposed in the deep trench, and comprises a bottom electrode, a capacitor dielectric layer and a top electrode. The vertical transistor comprises a gate structure disposed in the trench and above the substrate, a first doped region disposed in the substrate on sidewalls and bottom of the trench, and a second doped region disposed in the substrate on top of the trench. The buried strap is disposed in the substrate below the vertical transistor, and is adjoined to the first doped region and the top electrode. | 11-27-2008 |
20100203693 | MANUFACTURING METHOD OF DYNAMIC RANDOM ACCESS MEMORY - A manufacturing method of DRAM is provided. A substrate having a deep trench is provided, and then a deep trench capacitor including a bottom electrode, an upper electrode and a capacitor dielectric layer is formed in the deep trench. A part of the upper electrode of the deep trench capacitor is removed to form a first trench. A buried strap is formed in the substrate on one side of the upper electrode. An isolation structure is formed in the first trench to define an active region. A part of the substrate adjacent to the isolation structure is removed to form a second trench. A first heavily doped region is formed on the bottom of the second trench, and the first heavily doped region is electrically connected to the buried strap. A dielectric layer is formed on the bottom of the second trench. | 08-12-2010 |
Shu-Hui Liu, Taoyuan County TW
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20090257484 | METHOD FOR AUDIO-VIDEO ENCODING AND APPARATUS FOR MULTIMEDIA STORAGE - The invention relates a method for audio-video encoding and an apparatus for multimedia storage. First, a video chunk and an audio chunk are read from a audio-video file. Then the video chunk is divided into a plurality of video blocks, wherein size of each video block at least equals to the size of one unit frame. The audio chunk is divided into a plurality of audio blocks. Finally, according to a playing sequence, at least one audio block is employed between each two video blocks. | 10-15-2009 |
Ta-Cheng Liu, Taoyuan County TW
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20100107834 | SEPARATION APPARATUS AND SEPARATION METHOD - A separation apparatus for separating two planar devices bonded together by an adhesive layer is provided. The separation apparatus includes a base, a sliding module, a cutting member, and a positioning stage. The sliding module is mounted on the base. The cutting member is connected to the sliding module and is moveable in a two-dimensional plane with respect to the base by the sliding module for cutting the adhesive layer. The positioning stage is mounted on the base for positioning the planar devices and the adhesive layer therebetween on the base. | 05-06-2010 |
20130300628 | MULTI-FREQUENCU ANTENNA - A multi-frequency antenna includes a substrate, an antenna portion and a radiator. The antenna portion has a low-frequency radiation antenna and a high-frequency radiation antenna. By selectively coupling the low-frequency radiation antenna, the high-frequency radiation antenna and the radiator, the multi-frequency antenna can work in multiple frequency bands. | 11-14-2013 |
Tang-Hui Liu, Taoyuan County TW
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20110109563 | ELECTRONIC DEVICE WITH DYNAMICALLY ADJUSTED TOUCH AREA - A method for adjusting at least a area of a touch screen is provided. The touch panel includes a first touch area and a second touch area, the first touch area is responsive to a stationary touch and corresponds to a first function, and the second touch area is responsive to a sliding touch and corresponds to a second function. The method includes: defining an overlapped touch area including at least part of the first touch area and at least part of the second touch area; receiving a touch input on the touch panel; when the touch input is started from the overlapped touch area, calculating a moving distance of the touch input and a touch time of the touch input; and when the touch time is within a threshold time, and the moving distance exceeds a threshold distance, setting the overlapped touch area to correspond to the second function. | 05-12-2011 |
20130113744 | ELECTRONIC DEVICE WITH DYNAMICALLY ADJUSTED TOUCH AREA - A method for adjusting at least a area of a touch screen wherein the touch panel comprises a first touch area and a second touch area, the first touch area is responsive to a stationary touch and corresponds to a first function, and the second touch area is responsive to a sliding touch and corresponds to a second function, includes: defining an overlapped touch area comprising at least part of the first touch area and at least part of the second touch area; receiving a touch input on the touch panel; when the touch input is started from the overlapped touch area, calculating a moving distance of the touch input and a touch time of the touch input; and when the touch time is within a threshold time, and the moving distance exceeds a threshold distance, setting the overlapped touch area to correspond to the second function. | 05-09-2013 |
Ta-Wei Liu, Taoyuan County TW
Patent application number | Description | Published |
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20120034506 | REVERSE USE BATTERY PACK DESIGN - A battery pack of a handheld device has two coupling sections configured at a side surface in the face of a battery slot of the handheld device, where the coupling sections correspond to a coupling structure of the battery slot. As the battery pack is installed in the battery slot, the coupling sections engage with the coupling structure respectively for keeping the battery pack from detaching out of the battery slot. The battery pack may also have an upturned position to be installed in a second type of battery slot of another handheld device, where the coupling sections also correspond to and engage with a coupling structure of the second battery slot and keep the battery pack from detaching out of the second battery slot. | 02-09-2012 |
20120106045 | HANDHELD ELECTRONIC DEVICE - A handheld electronic device includes a first body, a second body stacked with the first body, a first plate between the first and second body and fixed to the first body, a second plate between the first plate and second body and fixed to the second body, a first locating structure, and a second locating structure. The first plate includes a sliding slot and a rib transversely disposed in the sliding slot and extended along the sliding slot. An edge of the second plate includes a sliding block clamped on the rib, so the second plate can move along the sliding slot. The first locating structure is disposed on the first plate and located on a moving path of the second plate. The second locating member is disposed on the sliding block, and adapted to interfere with the first locating structure on a locking position of the moving path. | 05-03-2012 |
20120195677 | TILTABLE LINKAGE MECHANISM - A tiltable linkage mechanism including a first plate, a second plate, a swinging plate, a first hinge, a second hinge and a third hinge is provided. The first plate includes an upper surface, the second plate includes a bottom surface facing the upper surface of the first plate and a position limiting structure disposed on the bottom surface. The position limiting structure further has two opposite clamping surfaces. The first plate and the second plate pivotally connect with each other through the first hinge. The swinging plate and the first plate pivotally connect with each other through the second hinge. The swinging plate and the second plate pivotally connect with each other through the third hinge which is disposed in the position limiting structure. The third hinge has an end portion that can slide between the two clamping surfaces. In this way, when the second plate tilts from the first plate, the second plate rotates about the first hinge, the swinging plate rotates about the second hinge, and the end portion of the third hinge slides within the position limiting structure. | 08-02-2012 |
20130149914 | SOCKET CONNECTOR, PLUG CONNECTOR, CONNECTOR ASSEMBLY, AND HANDHELD ELECTRONIC DEVICE - A socket connector having high current carrying capacity is provided by enlarging cross-section of particular terminals, to meet requirement such as transmitting large current or quick charge. Furthermore, a plug connector coupled with the socket connector, a connector assembly including the socket connector and the plug connector, and a handheld electronic device applying the socket connector are provided. | 06-13-2013 |
Te-Chuan Liu, Taoyuan County TW
Patent application number | Description | Published |
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20080282194 | GRAPHICAL MENU INTERFACE, IMPLEMENTING METHOD THEREOF, AND OPERATING METHOD THEREOF - A graphical menu interface, an implementing method thereof, and an operating method thereof are provided. In the implementing method of the graphical menu interface, m function groups are provided first, and each of the function groups has at least one function. Then, an operating frame related to each function group is obtained and used as the menu icon representing a corresponding function group in the graphical menu interface. Finally, there are n function groups displayed on the screen, and the corresponding operating frames are used as the menu icons of these n function groups in the graphical menu interface. As a result, users can infer the position of each function in the graphical menu interface more intuitively, and thus the convenience in operating the graphical menu is improved. | 11-13-2008 |
20080284754 | METHOD FOR OPERATING USER INTERFACE AND RECORDING MEDIUM FOR STORING PROGRAM APPLYING THE SAME - A method for operating a user interface and a recording medium for storing a program applying the same are provided. The method includes following steps. First, a touch generated by touching a touch display using an input tool is detected. Then, whether or not the touch is generated on a specific area of the touch display is determined. Next, whether the position of the touch is changed is determined if the touch is generated on the specific area. The user interface is activated or switched if the position of the touch is changed. Accordingly, a more convenient and intuitive method for operating the user interface is provided and the convenience in using the electronic device is increased. | 11-20-2008 |
20090278805 | ELECTRONIC DEVICE WITH SWITCHABLE USER INTERFACE AND ELECTRONIC DEVICE WITH ACCESSIBLE TOUCH OPERATION - An electronic device with switchable user interface and an electronic device with accessible touch operation are provided. The electronic device with switchable user interface includes a display, a touch sensing means, a position detecting module and a processing module. The touch sensing means is used for sensing a touch of an input tool. The position detecting module is used for determining whether or not the touch is generated on a specific area of the touch sensing means. If the touch is generated on the specific area, the position detecting module determines whether the position of the touch is varied. The processing module coupled to the position detecting module is used for activating a user interface on the display if there is a position variation of the touch. Consequently, the convenience of operating the electronic device is improved. | 11-12-2009 |
20130011025 | Method of Establishing Application-related Communication between Mobile Electronic Devices, Mobile Electronic Device, Non-transitory Machine Readable Media thereof, and Media Sharing Method - When a host mobile electronic device and a client mobile electronic device connect to each other for at least a second time, the client mobile electronic device refers to an entry corresponding to the host mobile electronic device for retrieve required information to wirelessly connect to the host mobile electronic device and to connect to an application installed on the host mobile electronic device under authentication. Therefore, the client mobile electronic device can be relieved from the burden of requesting required information for authentication repeatedly. | 01-10-2013 |
20130012120 | Reminding Method and Non-Transitory Machine Readable Media thereof - When a response signal of a second mobile electronic device in response to a polling signal from a first mobile electronic device is received by the first mobile electronic device, an alarm is issued on the first mobile electronic device about a message previously received by the first electronic device so as to remind a user of the first mobile electronic device of the message, where the first mobile electronic device and the second mobile electronic device utilize a same wireless communication protocol. | 01-10-2013 |
20130012121 | Contact List Sharing Method - A virtual group contact list of a first mobile electronic device is generated using a wireless service under the purpose of finding contact information of users not stored in a contact list of the first mobile electronic device, by confirming whether there are other surrounding mobile electronic devices utilizing the wireless communication service and responding to a polling signal from the first mobile electronic device. A user of the first mobile electronic device is able to contact a wanted user whose contact information stored in contact lists of confirmed or identified mobile electronic devices giving responses to the first mobile electronic device. | 01-10-2013 |
20130013438 | Grouping Method for Group-buying Based on Wireless Communication Protocol - When a customer who encounters a specific type of merchandise he/she wants by accident, he/she is able to use his/her wireless mobile device to ask for agreements from mobile electronic devices of neighboring people who want the same type of merchandise and to group his/her mobile electronic device with mobile electronic devices of people who respond with agreements, where the mobile electronic devices are grouped by using a wireless communication protocol. With the aid of grouping those people who want the specific type of merchandise, a group-buying action can be initiated, and a discount of the specific type of merchandise can be retrieved by the grouped people. | 01-10-2013 |
20130013687 | Information Sharing Method and Mobile Device Thereof - An information sharing method for a mobile device is disclosed. The information sharing method includes registering an event in the mobile device; determining whether a software activity occurs during the event; marking information of a specific software activity with a tag corresponding to the event if the specific software activity occurs during the event; and sharing the information of the specific software activity with the tag. | 01-10-2013 |
20130013740 | Media Sharing Method and Non-transitory Machine Readable Media thereof - By merging media playlists of mobile electronic devices capable of responding to each other and sharing a same wireless communication protocol, each of the mobile electronic devices is capable of sharing media playlists and corresponding media files with each other. | 01-10-2013 |
20130265264 | ELECTRONIC DEVICE WITH SWITCHABLE USER INTERFACE AND ELECTRONIC DEVICE WITH ACCESSIBLE TOUCH OPERATION - An electronic device with switchable user interface and an electronic device with accessible touch operation are provided. The electronic device with switchable user interface includes a display, a touch sensing means, a position detecting module and a processing module. The touch sensing means is used for sensing a touch of an input tool. The position detecting module is used for determining whether or not the touch is generated on a specific area of the touch sensing means. If the touch is generated on the specific area, the position detecting module determines whether the position of the touch is varied. The processing module coupled to the position detecting module is used for activating a user interface on the display if there is a position variation of the touch. Consequently, the convenience of operating the electronic device is improved. | 10-10-2013 |
20130298055 | METHOD FOR OPERATING USER INTERFACE AND RECORDING MEDIUM FOR STORING PROGRAM APPLYING THE SAME - A method for operating a user interface and a recording medium for storing a program applying the same are provided. The method includes following steps. First, a touch generated by touching a touch display using an input tool is detected. Then, whether or not the touch is generated on a specific area of the touch display is determined. Next, whether the position of the touch is changed is determined if the touch is generated on the specific area. The user interface is activated or switched if the position of the touch is changed. Accordingly, a more convenient and intuitive method for operating the user interface is provided and the convenience in using the electronic device is increased. | 11-07-2013 |
20140141719 | PERSONAL COMMUNICATION DEVICE AND METHOD FOR PRESENTING DIGITAL ITEMS THEREOF - A method for presenting digital items is provided. The method is executed by a first PCD and includes the following steps. Detect the existence of one or more second PCDs by the first PCD. Update the state of each said second PCD according to the detection. Rank the order of the one or more second PCDs according to the state, wherein the order of the second PCDs whose state is present is higher than the order of the second PCDs whose state is absent. Present one or more digital items according to the order of the one or more second PCDs. | 05-22-2014 |
20140206287 | MOBILE ELECTRONIC DEVICE AND CONNECTION ESTABLISHMENT METHOD BETWEEN MOBILE ELECTRONIC DEVICES - A mobile electronic device and a connection establishment method between the mobile electronic devices are provided. The connection establishment method includes the following steps. When a first mobile electronic device detects a control gesture applied to the first mobile electronic device, whether a second mobile electronic device is searched by the first mobile electronic device is determined, in which the second mobile electronic device detects the same control gesture applied to the second mobile electronic device. If the second mobile electronic device is searched by the first mobile electronic device, a first proximal wireless network connection between the first mobile electronic device and the second mobile electronic device is then established. | 07-24-2014 |
20140330901 | METHOD AND DEVICE FOR SHARING DIGITAL OBJECT OVER MESH NETWORK - A method for sharing a digital object over a mesh network is provided in the present invention. The mesh network includes a group owner and a plurality of target devices, and the method is executed by the group owner. The method includes the following steps. First, a table including metadata information is constructed, wherein the metadata information includes an original source of the digital object in the mesh network. Next, the table is distributed to each of the target devices, wherein each of the target devices may downloads the digital object according to the metadata information. The table is updated according to a change of a status of the target devices. Then, the updated table is distributed to each of the target devices. An electronic device is further provided in the present invention so as to embody the aforementioned method. | 11-06-2014 |
20150024678 | COMMUNICATIVE CONNECTION METHOD AMONG MULTIPLE DEVICES - A communicative connection method among multiple devices is disclosed herein. The communicative connection method includes steps of: sensing a motion pattern on each of the devices; broadcasting the motion pattern on each of the devices; comparing the motion patterns from the devices; and, forming a first wireless communicative connection among a group of at least two devices sharing one common motion pattern. | 01-22-2015 |
Wei-Li Liu, Taoyuan County TW
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20080273414 | SEMICONDUCTOR DEVICE AND MEMORY CIRCUIT LAYOUT METHOD - A memory comprising a memory array, a sensor amplifier, and a column driver/decoder. The memory comprises a plurality of memory cells. The sensor amplifier is disposed on one side of the memory array for accessing the memory cells of the memory array. The column driver/decoder is disposed on the opposite side of the memory array for selecting the memory cells of the memory array. | 11-06-2008 |
20080279019 | SEMICONDUCTOR DEVICE - A semiconductor includes a first sensor amplifier, a second sensor amplifier, a first switch and a second switch. The first sensor amplifier is coupled between a local data line and a memory unit to amplify signals of the memory unit. The second sensor amplifier is coupled to a middle data line to amplify signals of the middle data line. The first switch is coupled between the middle data line and the local data line to equalize voltage levels between the middle data line and the local data line by turning on the first switch according to a data control signal. The second switch is coupled between the local data line and a reference voltage to equalize the local data line to the voltage level of the reference voltage by turning on the second switch according to a local data control signal. | 11-13-2008 |
Wen-Chen Liu, Taoyuan County TW
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20080284828 | Ink ejection system with separated ink tank and printing head - An ink ejection system with a print head and an ink priming station is provided. The ink reservoir of the print head has a plurality of ink channels, a plurality of ball valves, a plurality of storing areas, and a plurality of priming holes. Each of the ball valves is located at an outlet of the respective ink channel and has a floating ball. The plurality of storing areas is aligned to the plurality of ink channels respectively for storing ink of different colors. The plurality of priming holes, which are located on a surface of the ink reservoir, is connected with the respective storing areas for balancing air pressure between interior of the ink reservoir and environment. As ink in the storing area excesses a predetermined height, the respective floating ball closes the respective ball valve to stop injecting ink to the respective storing area. The ink priming station has an air cover linked to a pump. As the print head is stationed on the ink priming station, the air cover covers the priming holes to have the interior of the ink reservoir showing negative pressure. | 11-20-2008 |
Wen-Fang Liu, Taoyuan County TW
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20100266752 | METHOD FOR FORMING CIRCUIT BOARD STRUCTURE OF COMPOSITE MATERIAL - A method for forming a circuit board structure of composite material is disclosed. First, a composite material structure including a substrate and a composite material dielectric layer is provided. The composite material dielectric layer includes a catalyst dielectric layer contacting the substrate and at least one sacrificial layer contacting the catalyst dielectric layer. The sacrificial layer is insoluble in water. Later, the composite material dielectric layer is patterned and simultaneously catalyst particles are activated. Then, a conductive layer is formed on the activated catalyst particles. Afterwards, at least one sacrificial layer is removed. | 10-21-2010 |
20110094779 | CIRCUIT STRUCTURE - A circuit structure including a circuit board, an insulating layer, a conductive via, a platable dielectric layer and a conductive pattern is provided. The insulating layer is disposed on the circuit board and covers a circuit layer of the circuit board. The conductive via passes through the insulating layer and connects the circuit layer and protrudes from a surface of the insulating layer. The platable dielectric layer having a trench pattern is disposed on the surface of the insulating layer wherein the portion of the conductive via protruding from the surface is located in the trench pattern. The material of the platable dielectric layer includes a chemical platable material. The conductive pattern is in the trench pattern and connects the conductive via wherein an interface exists between the conductive pattern and the conductive via and protrudes from the surface of the insulating layer. | 04-28-2011 |
20110100543 | MANUFACTURING METHOD OF CIRCUIT STRUCTURE - A manufacturing method of circuit structure is described as follows. Firstly, a composite dielectric layer, a circuit board and an insulating layer disposed therebetween are provided. The composite dielectric layer includes a non-platable dielectric layer and a platable dielectric layer between the non-platable dielectric layer and the insulating layer wherein the non-platable dielectric layer includes a chemical non-platable material and the platable dielectric layer includes a chemical platable material. Then, the composite dielectric layer, the circuit board and the insulating layer are compressed. Subsequently, a through hole passing through the composite dielectric layer and the insulating layer is formed and a conductive via connecting a circuit layer of the circuit board is formed therein. Then, a trench pattern passing through the non-platable dielectric layer is formed on the composite dielectric layer. Subsequently, a chemical plating process is performed to form a conductive pattern in the trench pattern. | 05-05-2011 |
20110155427 | CIRCUIT SUBSTRATE AND MANUFACTURING METHOD THEREOF - A manufacturing method of a circuit substrate includes the following steps. A dielectric layer is formed on at least one surface of a substrate. An insulating layer is formed on the dielectric layer. A portion of the insulating layer and a portion of the dielectric layer are removed, so as to form at least one blind via in the dielectric layer and the insulating layer. An electroless plating layer is formed on the sidewall of the blind via and a remaining portion of the insulating layer, wherein the binding strength between the insulating layer and the electroless plating layer is greater than that between the dielectric layer and the electroless plating layer. A patterned conductive layer is plated to cover the electroless plating layer. | 06-30-2011 |
20120015304 | METHOD FOR FABRICATING AN INTERPOSER - Method for fabricating an interposer is provided. A substrate is provided having thereon at least a conductive via and at least a flange. The flange is bonded on the substrate and shades a portion of the via. A photoresist layer is formed on the interior surface of the via, on a contact surface of the flange and on an inner surface of the flange opposite to the contact surface. An opening is formed in the photoresist layer to expose a portion of the contact surface of the flange, while the photoresist layer still covers the interior surface of the via and the inner surface of the flange. A plating layer is formed on the exposed contact surface of the flange. The photoresist layer is then removed. | 01-19-2012 |
20120024584 | CONNECTOR AND MANUFACTURING METHOD THEREOF - A method of manufacturing a connector is provided. Firstly, a substrate having a first surface, a second surface opposite to the first surface and a through hole is provided. Next, a first conductive layer covering the inside wall of the through hole is formed on the substrate. Then, a filler is filled in the through hole to form a filler post. Next, a conductive elastic cantilever is formed over the first surface and electrically connected to the first conductive layer. Then, a gold layer is formed on the conductive elastic cantilever and over the first surface. A solder ball electrically connected to the first conductive layer is formed over the second surface. | 02-02-2012 |
20120026708 | CARRIER SUBSTRATE AND METHOD FOR MAKING THE SAME - A carrier substrate includes a substrate having a chip side and a PCB side, a plurality of bond pads disposed on the chip side for bonding a chip, a plurality of land grid array (LGA) pads disposed on the PCB side, and a plurality of resilient flanges installed on the PCB side in an array manner. The plurality of resilient flanges electrically connects with the LGA pads correspondingly. | 02-02-2012 |
20120031651 | CIRCUIT BOARD - A circuit board including a circuit layer, a thermally conductive substrate, an insulation layer, and at least one thermally conductive material is provided. The thermally conductive substrate has a plane. The insulation layer is disposed between the circuit layer and the plane and partially covers the plane. The thermally conductive material covers the plane without covered by the insulation layer and is in contact with the thermally conductive substrate. The insulation layer exposes the thermally conductive material. | 02-09-2012 |
20120031652 | CIRCUIT BOARD AND MANUFACTURING METHOD THEREOF - A circuit board includes a metal pattern layer, a thermally conductive plate, an electrically insulating layer, and at least one electrically insulating material. The thermally conductive plate has a plane. The electrically insulating layer is disposed between the metal pattern layer and the plane and partially covers the plane. The electrically insulating material covers the plane where is not covered by the electrically insulating layer and touches the thermally conductive plate. The electrically insulating layer exposes the electrically insulating material, and a thermal conductivity of the electrically insulating material is larger than a thermal conductivity of the electrically insulating layer. | 02-09-2012 |
20140099432 | FABRICATION METHOD FOR FLEXIBLE CIRCUIT BOARD - A fabrication method for a flexible circuit board is provided. The fabrication method includes the following steps. Firstly, a release film having an upper surface and a lower surface opposite to each other is provided. Next, two flexible substrates are respectively disposed on the upper surface and the lower surface. Next, a plurality of nano-scale micro-pores are formed on each flexible substrate to form two non-smooth flexible substrates. The nano-scale micro-pores evenly distributed over an outer surface of each non-smooth flexible substrate. Each non-smooth flexible substrate being adapted to be performed a plating process directly on the outer surface thereof. | 04-10-2014 |
20140119688 | CIRCUIT BOARD AND MANUFACTURING METHOD THEREOF AND ELECTRO-OPTIC APPARATUS HAVING THE CIRCUIT BOARD - A circuit board, a manufacturing method thereof, and an electro-optic apparatus having the circuit board are provided. The circuit board includes a substrate including a first dielectric layer and a first circuit layer disposed thereon, a waveguide layer disposed on a portion of the substrate, a second dielectric layer, a convex structure and a second circuit layer. The second dielectric layer is disposed on the substrate and the waveguide layer. The second dielectric layer has an opening exposing the sidewall of the waveguide layer and a portion of the first circuit layer. The convex structure is disposed on the sidewall of the waveguide layer. The convex structure and the waveguide layer respectively have refractive index n | 05-01-2014 |
Wen-Hsien Liu, Taoyuan County TW
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20110117709 | SEMICONDUCTOR DEVICE FABRICATING METHOD - A semiconductor device fabricating method is described. The semiconductor device fabricating method includes providing a substrate. A first gate insulating layer and a second gate insulating layer are formed on the substrate, respectively. A gate layer is blanketly formed. A portion of the gate layer, the first gate insulating layer and the second gate insulating layer are removed to form a first gate, a remaining first gate insulating layer, a second gate and a remaining second gate insulating layer. The remaining first gate insulating layer not covered by the first gate has a first thickness, and the remaining second gate insulating layer not covered by the second gate has a second thickness, wherein a ratio between the first thickness and the second thickness is about 10 to 20. A pair of first spacers and a pair of second spacers are formed on sidewalls of the first gate and the second gate, respectively. | 05-19-2011 |
Wen-Sheng Liu, Taoyuan County TW
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20090153764 | THIN FILM TRANSISTOR ARRAY SUBSTRATE AND REPAIR METHOD - A TFT array substrate comprising a substrate has a pixel region and a peripheral circuit region surrounding the pixel region, a TFT array, first lead lines, second lead lines, and first repair patterns is provided. The peripheral circuit region has an outer area and an inner area. The inner area is disposed between the pixel region and the outer area. The TFT array disposed in the pixel region includes a first conducting layer and a second conducting layer. The first lead lines and the second lead lines disposed in the peripheral circuit region are on the same layer of the first conducting layer and the second conducting layer respectively. The first repair patterns disposed in the inner area are sandwiched between the second lead lines and the substrate. At least a first pre-repair area is at a region where the second lead lines and the first repair patterns are overlapped. | 06-18-2009 |
Yen-Chih Liu, Taoyuan County TW
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20090079657 | PRINTED MONOPOLE SMART ANTENNA FOR WLAN AP/ROUTER - A printed monopole smart antenna is provided. The smart antenna includes a monopole antenna having a plane for receiving and transmitting a signal, two conductors for directing and/or reflecting the signal to the monopole antenna respectively, and a circuit device electrically connected between the first and second conductors, for selectively switching the first and second conductors to determine an operation mode of the smart antenna. The smart antenna further has at least a groove in the ground for concentrating the current distribution and solving the influence of the antenna gain to the ground size. The sequence of the antenna pattern of the smart antenna is randomly arranged, depending on user's situation. When a plurality of printed monopole smart antennas are disposed on different directions of the WLAN AP/router, the omnidirectional radiation pattern will be obtained and the antenna gain will be increased. | 03-26-2009 |
Yi-Chun Liu, Taoyuan County TW
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20110240402 | UNIT WITH A SOUND ISOLATION/VIBRATION ISOLATION STRUCTURE, ARRAY EMPLOYING THE SAME, AND METHOD FOR FABRICATING THE SAME - The disclosure provides a unit with a sound isolation/vibration isolation structure, an array employing the same, and a method for fabricating the same. The unit with a sound isolation/vibration isolation structure includes: a hollow frame surrounding an inside space; a film disposed within the inside space, vertically contacting an inside wall of the hollow frame; and a body mass disposed on a top surface of the film. Particularly, the horizontal area of the inside space is larger than the area of the top surface of the film. | 10-06-2011 |
Yi-Kun Liu, Taoyuan County TW
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20100010734 | NAVIGATION DEVICE AND METHOD FOR CALCULATING AN ESTIMATED TOTAL TIME REQUIREMENT OF THE NAVIGATION-PLANNED ROUTE - A navigation device and a method for calculating estimated total time requirement of navigation-planned routes with enhanced prediction accuracy includes: a map database for pre-defining calculation parameter and properties of feasible road information and traffic signs along the routes; a configuration module for entering coordinates of indication points determined as a destination where a vehicle reaches; a route planning module for receiving satellite signals of global positioning system, searching the map database for the coordinate of the indication point determined as a departure place and defined by the satellite signals received by a satellite positioning system, and planning simulated routes between the indication point determined as the departure place and the indication point as the destination place; and a process module for calculating traveling time according to properties of the feasible road information of the planned simulated routes and total stopping time according to the calculation parameter and the number of traffic signs along the simulated routes, thus obtaining estimated total time requirement by adding up the traveling time and the total stopping time. | 01-14-2010 |
Ying-Ling Liu, Taoyuan County TW
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20100216900 | Polymers with benzoxazine groups in their main chains - The present invention discloses polymers prepared through the Diels-Alder reaction with benzoxazine groups in their main chains. Moreover, polymers with high molecular weight could be successfully prepared via this method. Furthermore, the mentioned polymers are able to undergo crosslinking reaction by heat treatment. Heat energy causes the ring-opening reaction of benzoxazine in polymer main chains to undergo crosslinking reaction, and cross-linked polymers are thereby formed with great flexibility and high crosslinking degree. | 08-26-2010 |
20130053529 | Bridged Bis(Alkoxysilane) or Silsesquioxane Compound Having Benzoxazine-Containing Group - A benzoxazine-bridged compound is provided. The compound has a low dielectric constant, a high mechanic strength and a high glass transition temperature. The compound has a highly cross-linked structure with a yellow-light photoluminescent emission. Characterization of the present disclosure has been conducted with Fourier transform infrared, nuclear magnetic resonance, molecular mass and elemental analysis. | 02-28-2013 |
Yi-Te Liu, Taoyuan County TW
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20100045585 | METHOD FOR ELIMINATING DEFICIENT IMAGE ON LIQUID CRYSTAL DISPLAY - A method for eliminating deficient image on a liquid crystal display (LCD) is provided. The method is used for eliminating the deficient image generated during the shutdown period in a normally white LCD. The method comprises the following steps. First, when a power indication signal changes from a first state to a second state, a black frame is displayed in a first period of time. At the end of the first period, a white frame is displayed in a second period of time. At the end of the second period, the supply of a negative scan voltage is stopped and a white frame is displayed in a third period of time. At the end of the third period, the power is turned off. | 02-25-2010 |
Yuan Wen Liu, Taoyuan County TW
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20100150427 | PORTABLE WAFER INSPECTION SYSTEM - A portable wafer inspection system is applied on an inspection window of a manufacturing tool for wafers. The portable wafer inspection system comprises: a housing, a lighting unit, and an inspection unit. The housing has a receiving room therein, and a plurality of fixing members is disposed at the opening of the housing. The fixing members are used for fixing the housing on the inspection window of the manufacturing tool. The lighting unit and the inspection unit are disposed in the receiving room of the housing, wherein the inspection unit is for capturing images of the wafers. Thereby the inspection unit may be used for inspecting the wafers in the manufacturing tool through the inspection window | 06-17-2010 |
Yu-Chang Liu, Taoyuan County TW
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20100105549 | METHOD FOR MAKING METAL/TITANIA PULP AND PHOTOCATALYST - A method for making a metal-titania pulp and photocatalyst is provided, including firstly acidically hydrolyzing a titanium alkoxide solution in presence of an alcohol solvent to get a colloidal solution; then, adding at least one metal salt solution into the colloidal solution to produce a nano-porous metal/titania photocatalyst under appropriate conditions by appropriate reaction. The nano-porous metal/titania photocatalyst thus prepared has excellent optical activity and is applicable in research of water decomposition with light to improve production efficiency of hydrogen energy. In addition, the photocatalyst is further processed in the form of powder or film to facilitate industrial application in wastewater treatment. | 04-29-2010 |
20110073460 | WASTEWATER TREATMENT APPARATUS AND METHOD WITH STAIR-LIKE HEAT TREATMENT TANKS - A wastewater treatment apparatus and method with stair-like heat treatment tanks for performing a breakdown process are disclosed, in which the apparatus comprises: a mixing tank, for evenly mixing wastewater with reaction agents and thus forming a mixed solution; a plurality of heat treatment tanks, for enabling the mixed solution to circulate therein while being heating for a period of time so as to perform an organic destruction process upon the mixed solution and thus cause a discharging liquid to be formed; a heat exchanger, for enabling a heat exchanging process between the discharging liquid and the mixed solution to be performed therein; a condensation tank, for receiving and cooling the discharging liquid; a water purifier, for purifying and thus separating the discharging water into a cleaned water and a concentrated liquid for outputting; an agent recycling unit, for electrolyzing the concentrated liquid so as to recycle the reaction agents. | 03-31-2011 |
Yu-Chuan Liu, Taoyuan County TW
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20090111202 | Method for self bonding epitaxy - A method for self bonding epitaxy includes forming a passivation layer on a substrate surface of a semiconductor lighting element; etching to form recesses and protrusive portions with the passivation layer located thereon; starting forming epitaxy on the bottom surface of the recesses; filling the recesses with an Epi layer; then covering the protrusive portions and starting self bonding upwards the epitaxy to finish the Epi layer structure. Such a self bonding epitaxy growing technique can prevent cavity generation caused by parameter errors of the epitaxy and reduce defect density, and improve the quality of the Epi layer and increase internal quantum efficiency. | 04-30-2009 |
20090162959 | METHOD FOR FABRICATING LIGHT EMITTING DIODE ELEMENT - The present invention discloses a method for fabricating a light emitting diode element, which incorporates an epitaxial process with an etching process to etch LED epitaxial layers bottom up and form side-protrudent structures, whereby the LED epitaxial layers have non-rectangular inclines, which can solve the problem of total reflection and promote light-extraction efficiency. Further, the method of the present invention has a simple fabrication process, which can benefit mass production and lower cost. | 06-25-2009 |
Yu-Jen Liu, Taoyuan County TW
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20100298745 | HEAD CAP FOR HEAD PHYSICAL THERAPY - The head cap for the use of head physical therapy in the present invention is related that the head cap is covered the head when using the vacuum device to generate a negative pressure for treating the head by massaging the user's head and improving a blood circulation. | 11-25-2010 |
Yun-Hui Liu, Taoyuan County TW
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20100206149 | TUBE CUTTING DEVICE AND METHOD THEREOF - A tube cutting device and method thereof are disclosed, which are adapted for performing a remote tube cutting operation upon a tube. The tube cutting device is comprised of: a holding unit; a cutting unit; and a control unit, connected to the holding unit and the cutting unit in a remote manner; wherein, the control unit is capable of directing the holding unit to hold and move a tube to a specific position and thereafter directing the cutting unit to perform a cutting operation upon the tube. With the aforesaid tube cutting device, an operator operating the tube cutting device can perform an cutting operation upon the tube remotely without having to contact directly with the tube, and thus the operator is prevented from having to stay in a working environment containing hazardous materials, such as radioactive pollutants, gas/liquid with strong acid or alkali, etc., so that the safety of the tube cutting operation can be enhanced. In addition, as the tube cutting device is simple in structure, the manufacturing cost thereof is comparatively low but still possess high cutting efficiency. | 08-19-2010 |