Nain
Amrinder Singh Nain, Christiansburg, VA US
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20100028999 | METHODS, APPARATUS, AND SYSTEMS FOR FABRICATION OF POLYMERIC NANO- AND MICRO-FIBERS IN ALIGNED CONFIGURATIONS - Provided herein are apparatus and systems for fabricating highly aligned arrays of polymeric fibers having isodiameters ranging from sub 50 nm to microns with lengths of several millimeters. The approach disclosed herein uses (e.g.) a micropipette to deliver polymeric solution which is collected in the form of aligned fibers on a rotating and linearly translating substrate. The methods deposit polymeric fibers on spherical surfaces and gapped surfaces with precise control, thus heralding new opportunities for a variety of applications employing polymeric fibers. The design workspace for depositing fibers disclosed herein is dependent upon processing parameters of rotational/linear translational speeds and material properties of solution rheologies. Techniques for fabrication of multilayer fiber arrays, for fabrication of cell growth scaffolds and for attachment of particles to the fiber arrays are also disclosed. | 02-04-2010 |
Ling-Ying Nain, Taichung TW
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20110213988 | DIGITAL INFORMATION PROTECTING METHOD AND APPARATUS, AND COMPUTER ACCESSIBLE RECORDING MEDIUM - A method for protecting digital information includes: converting a protected address range into a plurality of address blocks based on a preset conversion unit, and generating an address block rearranging rule using the address blocks as a parameter; when it is desired to load data into an address batch of the protected address range, converting the address batch into a plurality address blocks based on the conversion unit; and locating rearranged addresses of the address blocks in the protected address range according to the address block rearranging rule, and loading the data into the rearranged addresses. Thus, the data can be stored in the address batch scatteredly, and the protected data cannot be recomposed into the original correct data when stolen. | 09-01-2011 |
20140095892 | DIGITAL INFORMATION PROTECTING METHOD AND APPARATUS, AND COMPUTER ACCESSIBLE RECORDING MEDIUM - In a method for protecting digital information, a processor converts a protected address range into a plurality of address blocks of a storage device based on a preset conversion unit, and generates an address block rearranging rule using the address blocks as a parameter. When it is desired to load data into a space of an address batch of the protected address range, the processor converts the address batch into a plurality of address blocks based on the conversion unit, locates rearranged addresses of the address blocks in the protected address range according to the address block rearranging rule, and loads the data into spaces of the rearranged addresses. | 04-03-2014 |
Sandeep Nain, Seattle, WA US
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20100198641 | ECOMMERCE MARKETPLACE INTEGRATION TECHNIQUES - Various technologies and techniques are disclosed for integrating ecommerce marketplaces. An ecommerce integration framework has definitions for common data entities that are commonly used by multiple ecommerce marketplaces for listing items. Definitions for common operations that can manipulate the common data entities are provided. An application programming interface is provided that uses the common data entities and common operations to enable enterprise resource planning systems to exchange data in a standardized format with ecommerce marketplaces. Catalogs of items to be sold in ecommerce marketplaces can be created and managed using a customizable structure. The customizable structure enables catalogs to be created in a hierarchical manner with at least one parent catalog and zero or more child catalogs. Data values specified in a respective child catalog override data values specified in the parent catalog. A method for communicating with a particular ecommerce marketplace using an ecommerce integration framework is described. | 08-05-2010 |
20120022962 | ECOMMERCE MARKETPLACE INTEGRATION TECHNIQUES - Various technologies and techniques are disclosed for integrating ecommerce marketplaces. An ecommerce integration framework has definitions for common data entities that are commonly used by multiple ecommerce marketplaces for listing items. Definitions for common operations that can manipulate the common data entities are provided. An application programming interface is provided that uses the common data entities and common operations to enable enterprise resource planning systems to exchange data in a standardized format with ecommerce marketplaces. Catalogs of items to be sold in ecommerce marketplaces can be created and managed using a customizable structure. The customizable structure enables catalogs to be created in a hierarchical manner with at least one parent catalog and zero or more child catalogs. Data values specified in a respective child catalog override data values specified in the parent catalog. A method for communicating with a particular ecommerce marketplace using an ecommerce integration framework is described. | 01-26-2012 |
Yueh-Yao Nain, Hsinchu TW
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20100045524 | GLOBAL POSITIONING SYSTEM LOG WITH LOW POWER CONSUMPTION - A global positioning system (GPS) log with low power consumption has an antenna, a GPS module, a power control module, a main control module, a power adjusting unit and a memory. The main control module is connected to the GPS module and the power control module to retrieve the computing results of the GPS module and controls the power control module to periodically provide power to the GPS module according to a predetermined and variable power providing period. The power adjusting unit is connected to the main control module, analyzes the computing results of the GPS module and assists the main control module to adjust the power providing period. Since the main control module automatically adjusts the power providing period, the GPS log does not deplete unnecessary power on the GPS module. Therefore, the power consumption of the GPS log is reduced and the GPS operates longer. | 02-25-2010 |
20130232286 | OUTPUT INPUT CONTROL APPARATUS AND CONTROL METHOD THEREOF - An output input (I/O) control apparatus and a control method thereof are provided. The I/O control apparatus includes an interface control unit, a read-only memory, a random access memory, a multiplexer and a micro-process unit. The interface control unit is coupled to a memory apparatus through a bus, and the memory apparatus is external to the I/O control apparatus. The read-only memory stores judgment codes. The multiplexer is controlled by the micro-process unit to switch to the interface control unit, the read-only memory or the random access memory. When the bus is not busy, the micro-process unit can read data from the memory apparatus. When the bus is occupied and busy, the micro-process unit can read and execute codes from the read-only memory or the random access memory so as to avoid computer system instability or thermal damage. | 09-05-2013 |
Yueh-Yao Nain, Hsinchu County TW
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20110289246 | SUPER I/O MODULE, COMPUTER SYSTEM AND CONTROL METHOD THEREOF - A super I/O module for controlling at least one I/O port of a computer system is provided. The super I/O module includes a controller, a signal detector and a selector. The controller supports functions corresponding to the I/O port. The signal detector receives an input signal from the I/O port, and detects whether the input signal has an identification code. When detecting that the input signal has the identification code, the signal detector generates a selection signal according to the identification code. The selector receives the selection signal and selectively provides the input signal to the controller or a function circuit of the computer system according to the selection signal. | 11-24-2011 |
20130097363 | MEMORY CONTROL DEVICE - A memory control device for controlling a primary controller and a secondary controller to access a flash memory is provided. A bus switch is coupled to the primary controller, the secondary controller and the flash memory via a first, second and third serial peripheral interface (SPI) buses, respectively. A selecting unit selectively couples the third SPI bus to one of the first and second buses. When the bus switch receives an access request from the primary controller via the first SPI bus, the selecting unit couples the third SPI bus to the first SPI bus, so as to transmit a chip select signal, a clock signal and a master output slave input (MOSI) signal from the primary controller to the flash memory for accessing the flash memory. The first access request is provided by the first chip select signal. | 04-18-2013 |
20130179671 | SUPER I/O MODULE AND CONTROL METHOD THEREOF - A super input/output (I/O) module for controlling a universal serial bus (USB) port of a computer system is provided. The super I/O module includes a USB host, a switch and a processor. The switch selectively couples the USB port of the computer system to the USB host or a controller of the computer system according to a switching signal. When a trigger event occurs, the processor provides the switching signal to control the switch, so as to couple the USB port of the computer system to the USB host and to transmit a basic input/output system (BIOS) code to a flash memory of the computer system via the switch and the USB port. | 07-11-2013 |
Yueh-Yao Nain, Hsichu City TW
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20120112804 | CALIBRATION METHOD AND APPARATUS FOR CLOCK SIGNAL AND ELECTRONIC DEVICE - An embodiment of the invention provides a clock calibration method to calibrate an internal clock signal of a computer. The method comprises: receiving an external clock signal from an external clock source; generating a pulse signal with a first duration according to the external clock signal; counting the internal clock signal according to the pulse signal to get a first count value; and calibrating the internal clock according to the first count value. | 05-10-2012 |