Patent application number | Description | Published |
20100037009 | SEMICONDUCTOR STORAGE DEVICE, METHOD OF CONTROLLING THE SAME, CONTROLLER AND INFORMATION PROCESSING APPARATUS - A semiconductor storage device includes a first memory area configured in a volatile semiconductor memory, second and third memory areas configured in a nonvolatile semiconductor memory, and a controller which executes following processing. The controller executes a first processing for storing a plurality of data by the first unit in the first memory area, a second processing for storing data outputted from the first memory area by a first management unit in the second memory area, and a third processing for storing data outputted from the first memory area by a second management unit in the third memory area. | 02-11-2010 |
20100037010 | SEMICONDUCTOR STORAGE DEVICE, METHOD OF CONTROLLING THE SAME, CONTROLLER AND INFORMATION PROCESSING APPARATUS - A semiconductor storage device includes first, second, third, fourth and fifth memory areas and a controller which executes following processing. The controller executes a first processing for storing a plurality of data by the first unit in the first memory area, a second processing for storing data by a first management unit in the fourth memory area, a third processing for storing data by a second management unit in the fifth memory area, a fourth processing for moving an area of the third unit to the second memory area, a fifth processing for selecting and copying data to an empty area of the third unit in the second memory area, a sixth processing for moving an area of the third unit to the third memory area, and a seventh processing for selecting and copying data to an empty area of the third unit in the third memory area. | 02-11-2010 |
20100037011 | Semiconductor Storage Device, Method of Controlling The Same, Controller and Information Processing Apparatus - A semiconductor storage device includes a first memory area configured in a volatile semiconductor memory, second, third, and fourth memory areas configured in a nonvolatile semiconductor memory, and a controller which executes following processing. The controller executes a first processing for storing a plurality of data by the first unit in the first memory area, a second processing for storing data by a first management unit in the fourth memory area, a third processing for storing data by a second management unit in the third memory area, a fourth processing for moving an area of the third unit having the oldest allocation order in the fourth memory area to the second memory area, and a fifth processing for selecting data in the second memory area and copying the selected data to an empty area of the third unit in the second memory area. | 02-11-2010 |
20100037012 | Semiconductor Storage Device, Method of Controlling the Same, Controller and Information Processing Apparatus - A semiconductor storage device includes a first memory area configured in a volatile semiconductor memory, second, third and fourth memory areas configured in a nonvolatile semiconductor memory, and a controller which executes following processing. The controller executes a first processing for storing a plurality of data by the first unit in the first memory area, a second processing for storing data by a first management unit in the fourth memory area, a third processing for storing data by a second management unit in the third memory area, a fourth processing for moving an area of the third unit from the fourth memory area to the second memory area, a fifth processing for copying data to an area of the third unit and allocating the area to the second memory area, and a sixth processing for copying data to an empty area of the third unit in the second memory area. | 02-11-2010 |
20120033496 | SEMICONDUCTOR STORAGE DEVICE WITH VOLATILE AND NONVOLATILE MEMORIES - A semiconductor storage device includes a first memory area configured in a volatile semiconductor memory, second and third memory areas configured in a nonvolatile semiconductor memory, and a controller which executes following processing. The controller executes a first processing for storing a plurality of data by the first unit in the first memory area, a second processing for storing data outputted from the first memory area by a first management unit in the second memory area, and a third processing for storing data outputted from the first memory area by a second management unit in the third memory area. | 02-09-2012 |
20120079467 | PROGRAM PARALLELIZATION DEVICE AND PROGRAM PRODUCT - According to one embodiment, a parallelizing unit divides a loop into first and second processes based on a program to be converted and division information. The first and second processes respectively have termination control informationloop control information and change information indicating change of data to be referred to in a process subsequent to the loop. The parallelizing unit inserts a determination process into the first process, which determines whether the second process is terminated at execution of an (n−1)th iteration of the second process when the second process is subsequent to the first process, or determines whether the second process is terminated at execution of an nth iteration of the second process when the second process precedes the first process, and notifies the second process of a result of the determination, and inserts a control process into the second process, which controls execution of the second process based on the result of determination notified. | 03-29-2012 |
20120311245 | SEMICONDUCTOR STORAGE DEVICE WITH VOLATILE AND NONVOLATILE MEMORIES - A semiconductor storage device includes a first memory area configured in a volatile semiconductor memory, second and third memory areas configured in a nonvolatile semiconductor memory, and a controller which executes following processing. The controller executes a first processing for storing a plurality of data by the first unit in the first memory area, a second processing for storing data outputted from the first memory area by a first management unit in the second memory area, and a third processing for storing data outputted from the first memory area by a second management unit in the third memory area. | 12-06-2012 |
20140258602 | SEMICONDUCTOR STORAGE DEVICE WITH VOLATILE AND NONVOLATILE MEMORIES TO ALLOCATE BLOCKS TO A MEMORY AND RELEASE ALLOCATED BLOCKS - A semiconductor storage device includes a first memory area configured in a volatile semiconductor memory, second and third memory areas configured in a nonvolatile semiconductor memory, and a controller which executes following processing. The controller executes a first processing for storing a plurality of data by the first unit in the first memory area, a second processing for storing data outputted from the first memory area by a first management unit in the second memory area, and a third processing for storing data outputted from the first memory area by a second management unit in the third memory area. | 09-11-2014 |
20150022528 | PROGRAM INFORMATION DISPLAY SYSTEM, METHOD OF DISPLAYING PROGRAM INFORMATION AND COMPUTER-READABLE PROGRAM PRODUCT - In a system according to an embodiment, program structure information may include interval information. Each interval information may include source code position information indicating a successive region on a source code of a target program and parent-child information for specifying a parent-child relationship with respect to the interval information. The program structure information may include a reference interval without a parent. A processing unit may specify the number of parents existing between each interval information and the reference interval as a depth of each interval information from the reference interval, and create display information by arranging the interval information on a coordinate system defined by a first axis representing depth from the reference interval and a second axis representing the parent-child relationship based on the depth from the reference and the parent-child information. | 01-22-2015 |
20150026666 | ANALYSIS SYSTEM, ANALYSIS METHOD, AND COMPUTER PROGRAM PRODUCT - According to an embodiment, a system includes an analysis generator, a trace difference generator, a program difference generator, and an analyzer. The analysis generator is configured to generate program information required in executing a program, generate trace information providing a description of an execution at particular timing, based on the program information, and generate a trace correspondence between the trace and program information. The trace difference generator is configured to generate a trace difference between first and second trace information. The program difference generator is configured to generate a program difference between first and second program information. The analyzer is configured to analyze a correspondence relation between the differences and the program information based on the trace correspondence. | 01-22-2015 |
20150026702 | DATA PROCESSING SYSTEM, METHOD AND PROGRAM PRODUCT OF CREATING PROGRAM INFORMATION, AND PROGRAM INFORMATION DISPLAY SYSTEM - A system according to embodiments comprises first to third acquisition units and first and second creation units. The first acquisition unit may acquire event information including timeline information about an execution time or an execution order of at least one event. The second acquisition unit may acquire axis information including first axis information for deciding an first coordinate axis of a timeline about the execution time or the execution order of the event. The third acquisition unit may acquire event specific information for specifying the event information. The first creation unit may create a first axis object representing the first coordinate axis based on the axis information. The second creation unit may, for every event information specified by the event specific information, decide a coordinate of the event on the first coordinate axis based on the timeline information and the first axis information, decide a starting point coordinate and an ending point coordinate of an area corresponding to the event specified by the event information based on a decided coordinate of the event, and create an area object representing the area defined by the starting point coordinate and the ending point coordinate. | 01-22-2015 |
20150347020 | SEMICONDUCTOR STORAGE DEVICE WITH VOLATILE AND NONVOLATILE MEMORIES TO ALLOCATE BLOCKS TO A MEMORY AND RELEASE ALLOCATED BLOCKS - A semiconductor storage device includes a first memory area configured in a volatile semiconductor memory, second and third memory areas configured in a nonvolatile semiconductor memory, and a controller which executes following processing. The controller executes a first processing for storing a plurality of data by the first unit in the first memory area, a second processing for storing data outputted from the first memory area by a first management unit in the second memory area, and a third processing for storing data outputted from the first memory area by a second management unit in the third memory area. | 12-03-2015 |
Patent application number | Description | Published |
20090019450 | APPARATUS, METHOD, AND COMPUTER PROGRAM PRODUCT FOR TASK MANAGEMENT - A task management apparatus comprises a plurality of processors, and correspondingly stores, a plurality of tasks to be assigned to the processors within a predetermined period of time, and temporal groups each of which is assigned to the plurality of the tasks. The task management apparatus assigns one of the tasks to one of the processors. After having assigned the task, the task management apparatus assigns, to the one of the processors that has finished processing the assigned task, the other tasks that are in correspondence with the same temporal group as the temporal group with which the assigned task is in correspondence, before assigning the tasks that are not in correspondence with the temporal group. | 01-15-2009 |
20090019451 | ORDER-RELATION ANALYZING APPARATUS, METHOD, AND COMPUTER PROGRAM PRODUCT THEREOF - An order-relation analyzing apparatus collects assigned destination processor information, a synchronization process order and synchronization information, determines a corresponding element associated with a program among a plurality of elements indicating an ordinal value of the program based on the assigned destination processor information, when an execution of the program is started, and calculates the ordinal value indicated by the corresponding element for each segment based on the synchronization information, when the synchronization process occurs while executing the program. When a first corresponding element associated with a second program, of which the execution starts after the execution of a first program associated with the first corresponding element finishes, is determined, the ordinal value of the second program is calculated by calculating the ordinal value indicated by the first corresponding element. | 01-15-2009 |
20090055622 | Processor, virtual memory system, and virtual storing method - A processor includes an address specifying unit that specifies an address range on a virtual storage area; an instruction code setting unit that sets an instruction code for a process of deciding data corresponding to the specified address range; a calculating unit that calculates the data corresponding to the address range, according to the instruction code set for the address range; a load instruction obtaining unit that obtains a load instruction for the specified address range; and a data output unit that supplies the data calculated by the calculating unit corresponding to the address range indicated by the load instruction, as data for the load instruction. | 02-26-2009 |
20090119423 | Transfer control device, LSI, and LSI package - A transfer control device is arranged between a bus and a bus interface. The transfer control device includes a bus connecting unit that is connected to plural signal lines of the bus, an interface connecting unit that is connected to plural signal lines of the bus interface, and a connection control unit that connects, when a defective signal line exists in the plural signal lines of the bus, a signal line corresponding to the defective signal line out of the plural signal lines of the bus interface and a signal line other than the defective signal line out of the plural signal lines of the bus. | 05-07-2009 |
Patent application number | Description | Published |
20150242207 | PROGRAM INFORMATION GENERATION SYSTEM, METHOD OF GENERATING PROGRAM INFORMATION, COMPUTER-READABLE PROGRAM PRODUCT, AND PROGRAM INFORMATION DISPLAY SYSTEM - In a system according to any one of embodiments, program structure information may include interval information. Each interval information may include source code position information indicating a successive region on a source code of a target program and parent-child information for specifying a parent-child relationship with respect to the interval information. The program structure information may include a reference interval without a parent. A processing unit may specify the number of parents existing between each interval information and the reference interval as a depth of each interval information from the reference interval, and create display information by arranging the interval information on a coordinate system defined by a first axis representing depth from the reference interval and a second axis representing the parent-child relationship based on the depth from the reference and the parent-child information. | 08-27-2015 |
20150254115 | DISPLAY INFORMATION GENERATING DEVICE, PROGRAM-EXECUTION STATUS DISPLAY SYSTEM, PROGRAM-EXECUTION STATUS DISPLAY METHOD, AND COMPUTER PROGRAM PRODUCT - A system according to an embodiment is configured to display program execution results with respect to a common axis. The system includes a first unit that acquires event information about two or more events, acquires reference-event identification information to be used in identifying reference events, and generates event objects which represent the events, and a second unit that acquires axis information which represents information about the common axis. The event information contains timing information indicating positions of the events. The first unit sets the reference events as references for the program execution results based on the acquired reference-event identification information, determines display positions of the reference events with respect to the common axis to be same position based on timing information in event information about the reference events, and generates event objects representing the reference events based on the determined display positions with respect to the common axis. | 09-10-2015 |
20150254879 | PROGRAM INFORMATION GENERATION SYSTEM, METHOD FOR PROGRAM INFORMATION GENERATION, PROGRAM FOR PROGRAM INFORMATION GENERATION, AND PROGRAM INFORMATION DISPLAY SYSTEM - A system according to an embodiment may include: a generation unit that acquires axis information in a coordinate system drawing execution status of a program, and generates an axis object representing the coordinate system based on the axis information; a display event information generation unit that acquires event information related to each of the two or more events and program structure information related to a section of the program generating the two or more events, and generates display event information related to one or more display events representing the two or more events; and an object generation unit that acquires the display event information and display event unit information indicating a display unit of the display event, and generates one or more event objects based on the display event information and the display event unit information. | 09-10-2015 |
20150268953 | INFORMATION PROCESSING APPARATUS AND METHOD, AND COMPUTER PROGRAM PRODUCT - According to an embodiment, an information processing apparatus includes a storage, an accepting unit, an analyzer, a determination unit, and an output controller. The storage stores therein one or more pieces of first feature information respectively representing features of one or more source codes, and one or more pieces of assistance information representing update situations of the source codes, in a corresponding manner. The accepting unit accepts input of second feature information representing a feature of a source code to be analyzed. The analyzer calculates similarity between the first feature information and the second feature information. The determination unit selects, based on the similarity, assistance information to be output, from the pieces of assistance information stored in the storage. The output controller outputs the selected assistance information. | 09-24-2015 |
Patent application number | Description | Published |
20160062871 | PROGRAM INFORMATION GENERATING SYSTEM, METHOD, AND COMPUTER PROGRAM PRODUCT - A program information generating system includes an acquisition unit that acquires dependency information indicating dependency among a plurality of events generated by execution of a program and selection information identifying a selected event that is the event selected by a user; a generation unit that generates display information, on the basis of the dependency information and the selection information, such that a dependency path that is formed of the plurality of events having the dependency and includes the selected event is displayed in a distinguishable manner; and a display control unit that controls a display unit, on the basis of the display information, such that a display image indicating an execution state of the program is displayed. | 03-03-2016 |
20160085517 | PROGRAM INFORMATION GENERATING SYSTEM, PROGRAM INFORMATION GENERATING METHOD, AND COMPUTER PROGRAM PRODUCT - A program information generating system includes an acquisition unit, a generating unit, and display control unit. The acquiring unit acquires program information which represents structure of a computer program and operation information which represents structure of operations. The generating unit generates first display information for generating a first display image which visually represents the structure of the computer program and second display information for generating a second display image which visually represents the structure of the operations. The program information includes section information which identifies a position of sections included in the computer program. The operation information includes section identification information which identifies the section corresponding to the operations. The generating unit generates the first display information and the second display information on the basis of the section information and the section identification information so that correspondence relationship between the sections and the operations becomes identifiable. | 03-24-2016 |
20160093075 | GRAPH DISPLAY DEVICE, METHOD AND COMPUTER-READABLE MEDIUM - A graph display device includes a condition receiver, a time information display circuitry, an instruction receiver and a graph display circuitry. The condition receiver receives a condition for specifying at least one data item from graph data including a plurality of data items. The time information display circuitry displays time information relative to a time to display a graph based on the specified data item. The instruction receiver receives an instruction for starting display of the graph. The graph display circuitry displays the graph when the instruction is received. | 03-31-2016 |