Patent application number | Description | Published |
20140071785 | INTEGRITY CHECK OF MEASURED SIGNAL TRACE DATA - A method of monitoring signals is disclosed, wherein a plurality of command signals and address signals are consecutively expressed, as a measurement target. The method includes setting a strobe timing that has a predetermined initial value; calculating an error rate by monitoring the plurality of command signals, in accordance with the strobe timing; monitoring the plurality of address signals, and calculating a burst rate from a difference between the consecutive plurality of address signals, in accordance with the strobe timing; identifying timing where the calculated error rate and calculated burst rate are both optimized; and in the event the timing where both the calculated error rate and calculated burst rate are optimized cannot be identified, altering a predetermined value of the set strobe timing, and repeating the calculating, monitoring, and identifying. | 03-13-2014 |
20140075250 | INTEGRITY CHECK OF MEASURED SIGNAL TRACE DATA - A method of monitoring signals is disclosed, wherein a plurality of command signals and address signals are consecutively expressed, as a measurement target. The method includes setting a strobe timing that has a predetermined initial value; calculating an error rate by monitoring the plurality of command signals, in accordance with the strobe timing; monitoring the plurality of address signals, and calculating a burst rate from a difference between the consecutive plurality of address signals, in accordance with the strobe timing; identifying timing where the calculated error rate and calculated burst rate are both optimized; and in the event the timing where both the calculated error rate and calculated burst rate are optimized cannot be identified, altering a predetermined value of the set strobe timing, and repeating the calculating, monitoring, and identifying. | 03-13-2014 |
Patent application number | Description | Published |
20150046689 | ARITHMETIC PROCESSING UNIT AND METHOD FOR CONTROLLING ARITHMETIC PROCESSING UNIT - An arithmetic processing unit including a branch instruction execution management unit configured to accumulate a branch instruction waiting to be executed and to manage completion of a branch instruction, a completion processing waiting storage unit configured to accumulate an identifier of an instruction waiting for completion processing according to an execution sequence of a program, a completion processing unit configured to activate resource update processing due to execution of a branch instruction when the completion processing unit receives an execution completion report for the branch instruction from the branch instruction execution management unit and identified by the identifier, and a promotion unit configured to, when an identifier accumulated at the top of the completion processing waiting storage unit indicates a branch instruction, cause the completion processing unit to activate the resource update processing without waiting for the execution completion report for the branch instruction. | 02-12-2015 |
20150277905 | ARITHMETIC PROCESSING UNIT AND CONTROL METHOD FOR ARITHMETIC PROCESSING UNIT - An arithmetic processing unit includes, an instruction decoder; three or more operators to, when the instruction is a multi-data instruction, process in parallel the plural data, and when the instruction is a non-multi-data instruction, process the singular data individually; storage destination register groups corresponding to the operators to store operation results from the operators; renaming register groups corresponding respectively to the operators to store the operation results; and a register renaming unit to store an association between a specified storage destination register specified by an instruction and an allocated renaming register. A register set having the storage destination register group and the renaming register group includes a basic register set used to operate the multi-data and the non-multi-data instructions, a first extended register set used to operate the multi-data and the non-multi-data instruction, and a second extended register set used to operate the multi-data instruction but not the non-multi-data instruction. | 10-01-2015 |
Patent application number | Description | Published |
20090243626 | AMPLIFICATION APPARATUS AND AMPLIFIER FAILURE DETECTING METHOD - An amplification apparatus including a plurality of amplifiers includes a carrier amplifier, a peak amplifier including a gate bias circuit including a resistor for supplying a gate bias voltage, a comparator for outputting a resultant signal determined by comparison of a predetermined threshold voltage with a voltage across the resistor included within the gate bias circuit, and a failure detecting circuit for detecting whether a failure in the plurality of amplifiers is caused or not based on the resultant signal. | 10-01-2009 |
20100033243 | Amplifying Apparatus - The amplifying apparatus includes an amplifier having a circuit constant determined so as to satisfy a condition for E-class operation; power detecting unit which detects an output electricity from the amplifier; and controlling unit which controls the circuit constant in accordance with the output power detected by the power detecting unit. | 02-11-2010 |
20100240329 | AMPLIFYING DEVICE AND TRANSMITTER APPARATUS - An amplifying device includes an amplifier including a first amplifying element with a drain voltage thereof being controlled, and a second amplifying element, the amplifier amplifying a transmission signal with the first and second amplifying elements, synthesizing the transmission signals amplified by the first and second amplifying elements, and outputting the synthesized transmission signal; a distortion compensator part which performs distortion compensation on the input signal in accordance with a compensation coefficient derived from a difference between a input signal and a feedback signal generated from a portion of a signal output from the amplifier; and a controller part which controls the drain voltage of the first amplifying element in response to a result of a comparison between a power level of the input signal prior to the distortion compensation operation by the distortion compensator part and a threshold value. | 09-23-2010 |
20110068882 | FILTER AND AMPLIFYING CIRCUIT - There is provided a filter which includes a transmission line, a stub branched from the transmission line, the stub electrically coupled with the transmission line, and a resonator configured to electromagnetically couple with the stub and to resonate at an odd harmonic frequency of a fundamental wave, the fundamental wave propagating through the transmission line. | 03-24-2011 |
20120126898 | AMPLIFYING APPARATUS - An amplifying apparatus includes a first amplifier that amplifies an input signal on the basis of a value of a drain voltage and outputs a transmission signal, a distortion compensator that corrects a power amplitude of the input signal on the basis of a difference in power amplitude between the input signal and the transmission signal outputted from the first amplifier, a drain voltage controller that generates the drain voltage on the basis of the power amplitude of the input signal to be corrected, and a drain voltage corrector that corrects the drain voltage on the basis of the difference. | 05-24-2012 |
20120299648 | AMPLIFYING APPARATUS, TRANSMITTER, AND AMPLIFYING APPARATUS CONTROL METHOD - A power amplifying apparatus has a GaN device for RF amplification, a GaN device for monitoring, an Idq detecting circuit, and a gate bias control (GBC) circuit. The GaN device for RF amplification amplifies an input signal to output the resultant. The GaN device for monitoring is an amplification device for monitoring an input/output signal of the GaN device for RF amplification. The Idq detecting circuit detects an output signal output by the GaN device for monitoring, corresponding to an input signal, which is diverged from the input signal to be input to the GaN device for RF amplification, and is input to the GaN device for monitoring. The gate bias control circuit controls a gate voltage to be applied to the GaN device for RF amplification in accordance with the output signal detected by the Idq detecting circuit. | 11-29-2012 |
20140010330 | TRANSMISSION DEVICE AND TRANSMISSION METHOD - A transmission device includes a first amplifier, a second amplifier, and a digital signal processor configured to calculate first distortion compensation coefficients based on a first amplified signal obtained by amplifying an input signal by the first amplifier, set a first distortion compensation coefficient reference range used to perform distortion compensation on the input signal based on power of the input signal and the first distortion compensation coefficients, calculate second distortion compensation coefficients based on a second amplified signal obtained by amplifying the input signal by the second amplifier, set a second distortion compensation coefficient reference range used to perform distortion compensation on the input signal based on the power of the input signal and the second distortion compensation coefficients, and calculate a correction coefficient for correcting the second compensation coefficients based on the first distortion compensation coefficient reference range and the second distortion compensation coefficient reference range. | 01-09-2014 |
20140155122 | WIRELESS COMMUNICATION APPARATUS, DOHERTY AMPLIFIER, AND METHOD FOR CONTROLLING WIRELESS COMMUNICATION - A wireless communication apparatus includes: a first amplifier configured to amplify an input signal; a second amplifier configured to amplify the input signal when an input level of the input signal is equal to or larger than a given level; an impedance converter configure to switch an load impedance of the first amplifier and output a composite output of an output from the first amplifier and an output from the second amplifier; an impedance controller section configured to control a switching of the load impedance of the first amplifier based on a bandwidth of the input signal; a distortion compensation section configured to perform distortion compensation of the input signal and supply a compensated input signal to the first amplifier and the second amplifier; and a filter section configured to limit a band of a signal output from the impedance converter. | 06-05-2014 |
20150124904 | DISTORTION COMPENSATION APPARATUS, WIRELESS COMMUNICATION SYSTEM, AND DISTORTION COMPENSATION METHOD - A distortion compensation apparatus including: an amplifier configured to amplify an input signal including a transmission signal and an impulse signal, the transmission signal being converted to a radio frequency signal for transmission, the impulse signal being not converted to a radio signal for transmission, a memory configured to store a plurality of distortion compensation coefficients for compensating distortion to the input signal, each of the plurality of distortion compensation coefficients being associated with an amplitude of the input signal, and a processor configured to select a distortion compensation coefficient from the plurality of distortion compensation coefficients based on an amplitude of the impulse signal included in the input signal, and update the selected distortion compensation coefficient based on the amplified impulse signal include in the amplified input signal. | 05-07-2015 |
20150280756 | WIRELESS DEVICE AND WIRELESS ACCESS SYSTEM - A wireless device includes a digital-to-analog converter that converts a digital transmission signal within a digital signal processing band to an analog transmission signal, a modulator that performs quadrature modulation of an analog transmission signal obtained by the digital-to-analog converter using a first local signal having a first frequency outside a frequency range, the frequency range centered around a center frequency of a transmission signal and having a bandwidth of the digital signal processing band, and outputs a modulated signal, a frequency converter that performs a frequency shift of a modulated signal output from the modulator using a second local signal having a second frequency within the frequency range, and an inhibitor that performs carrier leakage inhibition processing on the digital transmission signal, based on a signal obtained by the frequency converter. | 10-01-2015 |