Patent application number | Description | Published |
20100165464 | COLOR DIVIDING OPTICAL DEVICE AND IMAGE APPARATUS WITH THE APPLICATION - A color dividing optical device has an integrated structure of dual surfaces, each has a micro/nano structure. The optical device can perform beam splitting and color dividing on an incident light source, which has a constitution from multiple different wavelengths. In a space, the original incident light source is equally split into multiple light beams in an array, according to light intensity. At the same time, the light beam constituted from different wavelengths is divided into multiple sub-light sources, according to the wavelength, so as to have the function to propagate a color array with color dividing. The optical device with capability of modulating the color wavelengths can transform the wide-band incident light source into sub-light beams in array with color dividing (wavelength dividing) and beam splitting. | 07-01-2010 |
20100232137 | COMPOSITE OPTICAL FILM AND FLAT LIGHT SOURCE MODULE - A composite optical film including a base and an optical-field-modulation microstructure layer is provided. The base has a light incident surface and a light emitting surface, wherein the light incident surface and the light emitting surface are correspondingly disposed. The optical-field-modulation microstructure layer disposed on the light emitting surface has a first prism column set and a second prism column set, wherein the first prism column set has a plurality of first prism columns arranged in parallel and extended along a first direction, and the second prism column set has a plurality of second prism columns arranged in parallel and extended along a second direction. The first prism column set and the second prism column set are disposed across each other, and at least one of the first prism column set and the second prism column set has a smooth curve top. | 09-16-2010 |
20110134648 | LIGHT UNIFORMIZATION STRUCTURE AND LIGHT EMITTING MODULE - A light uniformization structure and light emitting module is related to a light uniformization structure including a first material layer having a plurality of microstructures in a surface thereof, a second material layer having a plurality of microstructures in a surface thereof, and a spacer layer. The spacer layer is located between the first material layer and the second material layer, and a refractive index of the spacer layer is smaller than a refractive index of the first material layer and a refractive index of the second material layer. | 06-09-2011 |
20130160817 | SOLAR CELL MODULE - A solar cell module is provided, including a solar collector, a solar cell chip panel and a cooling pipeline system. The solar collector includes a first optical surface and a second optical surface, wherein light enters the solar collector from the first optical surface, and then exits from the second optical surface after collection. The solar cell chip panel has a light-receiving surface for receiving the light exited from the second optical surface. The solar cell chip panel includes a photovoltaic conversion material capable of absorbing a specific spectrum band in the light and converting that into electricity. The cooling pipeline system allows water to flow therein and includes a heat absorber, wherein the light exits to the light-receiving surface of the solar cell chip panel through the heat absorber, and the water flowing through the heat absorber absorbs light beyond the specific spectrum band. | 06-27-2013 |
20140332055 | SOLAR CELL MODULE - A solar cell module is provided, including following elements. The solar collector includes a first optical surface, a second optical surface, and a third optical surface, in which a light enters the solar collector from the first optical surface, and then exits from the second optical surface after collection. The solar cell chip panel has a light-receiving surface for receiving the light exited from the second optical surface. The solar cell chip panel absorbs a specific spectrum band in the light and converting that into electricity. The light filter interface is disposed on the third optical surface, allowing light beyond the specific spectrum band to transmit the third optical surface. The cooling pipeline system includes a heat absorber, in which the light filter interface is disposed between the third optical surface and the heat absorber, and the water flowing through the heat absorber absorbs light beyond the specific spectrum band. | 11-13-2014 |
Patent application number | Description | Published |
20080233722 | METHOD OF FORMING SELECTIVE AREA COMPOUND SEMICONDUCTOR EPITAXIAL LAYER - A method of forming a selective area semiconductor compound epitaxy layer is provided. The method includes the step of using two silicon-containing precursors as gas source for implementing a process of manufacturing the selective area semiconductor compound epitaxy layer, so as to form a semiconductor compound epitaxy layer on an exposed monocrystalline silicon region of a substrate. | 09-25-2008 |
20080293222 | METHOD FOR FORMING SILICON-GERMANIUM EPITAXIAL LAYER - A method for forming a SiGe epitaxial layer is described. A first SEG process is performed under a first condition, consuming about 1% to 20% of the total process time for forming the SiGe epitaxial layer. Then, a second SEG process is performed under a second condition, consuming about 99% to 80% of the total process time. The first condition and the second condition include different temperatures or pressures. The first and the second SEG processes each uses a reactant gas that includes at least a Si-containing gas and a Ge-containing gas. | 11-27-2008 |
20120292638 | PROCESS FOR MANUFACTURING STRESS-PROVIDING STRUCTURE AND SEMICONDUCTOR DEVICE WITH SUCH STRESS-PROVIDING STRUCTURE - A process for manufacturing a stress-providing structure is applied to the fabrication of a semiconductor device. Firstly, a substrate with a channel structure is provided. A silicon nitride layer is formed over the substrate by chemical vapor deposition in a halogen-containing environment. An etching process is performed to partially remove the silicon nitride layer to expose a portion of a surface of the substrate beside the channel structure. The exposed surface of the substrate is etched to form a recess in the substrate. Then, the substrate is thermally treated at a temperature between 750° C. and 820° C. After the substrate is thermally treated, a stress-providing material is filled in the recess to form a stress-providing structure within the recess. The semiconductor device includes a substrate, a recess and a stress-providing structure. The recess has a round inner surface. The stress-providing structure has a round outer surface. | 11-22-2012 |
20130026464 | TEST PATTERN FOR MEASURING SEMICONDUCTOR ALLOYS USING X-RAY DIFFRACTION - A test pattern for measuring semiconductor alloys using X-ray diffraction (XRD) includes a first region to an Nth region defined on a wafer, and a plurality of test structures positioned in the first region and so forth up to in the Nth region. The test structures in the same region have sizes identical to each other and the test structures in different regions have sizes different from each other. | 01-31-2013 |
20130026538 | SEMICONDUCTOR DEVICE HAVING EPITAXIAL STRUCTURES - A semiconductor device having epitaxial structures includes a gate structure positioned on a substrate, epitaxial structures formed in the substrate at two sides of the gate structure, and an undoped cap layer formed on the epitaxial structures. The epitaxial structures include a dopant, a first semiconductor material having a first lattice constant, and a second semiconductor material having a second lattice constant, and the second lattice constant is larger than the first lattice constant. The undoped cap layer also includes the first semiconductor material and the second semiconductor material. The second semiconductor material in the epitaxial structures includes a first concentration, the second semiconductor material in the undoped cap layer includes at least a first concentration, and the second concentration is lower than the first concentration. | 01-31-2013 |
20130052778 | SEMICONDUCTOR PROCESS - A semiconductor process includes the following steps. A substrate is provided. At least a fin-shaped structure is formed on the substrate. An oxide layer is formed on the substrate without the fin-shaped structure being formed thereon. A gate is formed to cover a part of the oxide layer and a part of the fin-shaped structure. An etching process is performed to etch a part of the fin-shaped structure beside the gate, therefore at least a recess is formed in the fin-shaped structure. An epitaxial process is performed to form an epitaxial layer in the recess, wherein the epitaxial layer has a hexagon-shaped profile structure. | 02-28-2013 |
20130069172 | SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME - A semiconductor device and a method for fabricating the same are provided. The semiconductor device includes a gate structure, a source region and a drain region. The gate structure is disposed on a substrate. The source and drain regions disposed at respective sides of the gate structure include a boron-doped silicon germanium (SiGeB) layer substantially without stress relaxation. The boron-doped silicon germanium (SiGeB) layer has a germanium concentration greater than 30 at % and an in-situ doping concentration of boron ranging between 2.65×10 | 03-21-2013 |
20130092954 | Strained Silicon Channel Semiconductor Structure and Method of Making the Same - A method for fabricating a strained channel semiconductor structure includes providing a substrate, forming at least one gate structure on said substrate, performing an etching process to form two recesses in said substrate at opposites sides of said gate structure, the sidewall of said recess being concaved in the direction to said gate structure and forming an included angle with respect to horizontal plane, and performing a pre-bake process to modify the recess such that said included angle between the sidewall of said recess and the horizontal plane is increased. | 04-18-2013 |
20130105861 | SEMICONDUCTOR DEVICE AND METHOD OF FORMING EPITAXIAL LAYER | 05-02-2013 |
20130122691 | METHOD FOR MAKING SEMICONDUCTOR STRUCTURE - A method for forming a semiconductor structure is provided. First, multiple recesses are formed in a substrate. Second, a precursor mixture is provided to form a non-doped epitaxial layer on the inner surface of the recesses. The precursor mixture includes a silicon precursor, an epitaxial material precursor and a hydrogen-halogen compound. The flow rate ratio of the silicon precursor to the epitaxial material precursor is greater than 1.7. Later, a doped epitaxial layer including Si, the epitaxial material and the dopant is formed and substantially fills up the recess. | 05-16-2013 |
20130122698 | METHOD FOR MANUFACTURING MULTI-GATE TRANSISTOR DEVICE - A method for manufacturing multi-gate transistor device includes providing a semiconductor substrate having a patterned semiconductor layer and a patterned hard mask sequentially formed thereon, removing the patterned hard mask, performing a thermal treatment to rounding the patterned semiconductor layer with a process temperature lower than 800° C., and sequentially forming a gate dielectric layer and a gate layer covering a portion of the patterned semiconductor layer on the semiconductor substrate. | 05-16-2013 |
20130126949 | MOS DEVICE AND METHOD FOR FABRICATING THE SAME - A method for fabricating a metal oxide semiconductor (MOS) device is described, including following steps. Two recesses are formed in a substrate. A first epitaxy growth process is performed, so as to form a first semiconductor compound layer in each of the recesses. A second epitaxy growth process is performed with an epitaxial temperature lower than 700° C., so as to form a cap layer on each of the first semiconductor compound layers. Each of the cap layers includes a second semiconductor compound layer protruding from a surface of the substrate. The first and the second semiconductor compound layers are composed of a first Group IV element and a second Group IV element, wherein the second Group IV element is a nonsilicon element. The content of the second Group IV element in the second semiconductor compound layers is less than that in the first semiconductor compound layers. | 05-23-2013 |
20130137243 | SEMICONDUCTOR PROCESS - First, a substrate with a recess is provided in a semiconductor process. Second, an embedded SiGe layer is formed in the substrate. The embedded SiGe layer includes an epitaxial SiGe material which fills up the recess. Then, a pre-amorphization implant (PAI) procedure is carried out on the embedded SiGe layer to form an amorphous region. Next, a source/drain implanting procedure is carried out on the embedded SiGe layer to form a source doping region and a drain doping region. Later, a source/drain annealing procedure is carried out to form a source and a drain in the substrate. At least one of the pre-amorphization implant procedure and the source/drain implanting procedure is carried out in a cryogenic procedure below −30° C. | 05-30-2013 |
20130256701 | STRAINED SILICON CHANNEL SEMICONDUCTOR STRUCTURE - A strained silicon channel semiconductor structure comprises a substrate having an upper surface, a gate structure formed on the upper surface, at least one recess formed in the substrate at lateral sides of the gate structure, wherein the recess has at least one sidewall which has an upper sidewall and a lower sidewall concaved in the direction to the gate structure, and the included angle between the upper sidewall and horizontal plane ranges between 54.5°-90°, and an epitaxial layer filled into the two recesses. | 10-03-2013 |
20130264585 | SEMICONDUCTOR DEVICE WITH STRESS-PROVIDING STRUCTURE - A semiconductor device is provided. The semiconductor device includes a substrate, a recess and a stress-providing structure. A channel structure is formed in the substrate. The recess is formed in the substrate and arranged beside the channel structure. The recess has a round inner surface. The stress-providing structure is formed within the recess. Corresponding to the profile of the round inner surface of the recess, the stress-providing structure has a round outer surface. | 10-10-2013 |
20130264613 | SEMICONDUCTOR STRUCTURE AND PROCESS THEREOF - A semiconductor structure includes agate structure, an epitaxial layer and a carbon-containing silicon germanium cap layer. The gate structure is located on a substrate. The epitaxial layer is located in the substrate beside the gate structure. The carbon-containing silicon germanium cap layer is located on the epitaxial layer. Otherwise, semiconductor processes for forming said semiconductor structure are also provided. | 10-10-2013 |
20130288448 | SEMICONDUCTOR PROCESS - A semiconductor process includes the following steps. A semiconductor substrate is provided. The semiconductor substrate has a patterned isolation layer and the patterned isolation layer has an opening exposing a silicon area of the semiconductor substrate. A silicon rich layer is formed on the sidewalls of the opening. An epitaxial process is performed to form an epitaxial structure on the silicon area in the opening. | 10-31-2013 |
20130330898 | MOS TRANSISTOR PROCESS - A MOS transistor process includes the following steps. A gate structure is formed on a substrate. A source/drain is formed in the substrate beside the gate structure. After the source/drain is formed, (1) at least a recess is formed in the substrate beside the gate structure. An epitaxial structure is formed in the recess. (2) A cleaning process may be performed to clean the surface of the substrate beside the gate structure. An epitaxial structure is formed in the substrate beside the gate structure. | 12-12-2013 |
20130341638 | MULTI-GATE FIELD-EFFECT TRANSISTOR AND PROCESS THEREOF - A Multi-Gate Field-Effect Transistor includes a fin-shaped structure, a gate structure, at least an epitaxial structure and a gradient cap layer. The fin-shaped structure is located on a substrate. The gate structure is disposed across a part of the fin-shaped structure and the substrate. The epitaxial structure is located on the fin-shaped structure beside the gate structure. The gradient cap layer is located on each of the epitaxial structures. The gradient cap layer is a compound semiconductor, and the concentration of one of the ingredients of the compound semiconductor has a gradient distribution decreasing from bottom to top. Moreover, the present invention also provides a Multi-Gate Field-Effect Transistor process forming said Multi-Gate Field-Effect Transistor. | 12-26-2013 |
20140124835 | SEMICONDUCTOR STRUCTURE - A semiconductor structure includes agate structure, an epitaxial layer and a carbon-containing silicon germanium cap layer. The gate structure is located on a substrate. The epitaxial layer is located in the substrate beside the gate structure. The carbon-containing silicon germanium cap layer is located on the epitaxial layer. Otherwise, semiconductor processes for forming said semiconductor structure are also provided. | 05-08-2014 |
20140124904 | EPITAXIAL LAYER AND METHOD OF FORMING THE SAME - A method of forming an epitaxial layer includes the following steps. At first, a first epitaxial growth process is performed to form a first epitaxial layer on a substrate, and a gas source of silicon, a gas source of carbon, a gas source of phosphorous and a gas source of germanium are introduced during the first epitaxial growth process to form the first epitaxial layer including silicon, carbon, phosphorous and germanium. Subsequently, a second epitaxial growth process is performed to form a second epitaxial layer, and a number of elements in the second epitaxial layer is smaller than a number of elements in the first epitaxial layer. | 05-08-2014 |
20140191285 | SEMICONDUCTOR DEVICE HAVING EPITAXIAL STRUCTURES - A semiconductor device having epitaxial structures includes a gate structure positioned on a substrate, epitaxial structures formed in the substrate at two sides of the gate structure, and an undoped cap layer formed on the epitaxial structures. The epitaxial structures include a dopant. The epitaxial structures and the undoped cap layer include a first semiconductor material having a first lattice constant and a second semiconductor material having a second lattice constant. The second lattice constant is larger than the first lattice constant. The second semiconductor material in the epitaxial structure includes a first concentration and the second semiconductor material in the undoped cap layer includes a second concentration. The second concentration is lower than the first concentration, and is upwardly decreased. | 07-10-2014 |
20140235038 | SEMICONDUCTOR DEVICE AND METHOD OF FORMING EPITAXIAL LAYER - A method for forming epitaxial layer is disclosed. The method includes the steps of providing a semiconductor substrate, and forming an undoped first epitaxial layer in the semiconductor substrate. Preferably, the semiconductor substrate includes at least a recess, the undoped first epitaxial layer has a lattice constant, a bottom thickness, and a side thickness, in which the lattice constant is different from a lattice constant of the semiconductor substrate and the bottom thickness is substantially larger than or equal to the side thickness. | 08-21-2014 |
20140295634 | MULTI-GATE FIELD-EFFECT TRANSISTOR PROCESS - A Multi-Gate Field-Effect Transistor includes a fin-shaped structure, a gate structure, at least an epitaxial structure and a gradient cap layer. The fin-shaped structure is located on a substrate. The gate structure is disposed across a part of the fin-shaped structure and the substrate. The epitaxial structure is located on the fin-shaped structure beside the gate structure. The gradient cap layer is located on each of the epitaxial structures. The gradient cap layer is a compound semiconductor, and the concentration of one of the ingredients of the compound semiconductor has a gradient distribution decreasing from inner to outer. Moreover, the present invention also provides a Multi-Gate Field-Effect Transistor process forming said Multi-Gate Field-Effect Transistor. | 10-02-2014 |
20140335674 | MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE - A manufacturing method of a semiconductor device is provided. The method includes at least the following steps. A gate structure is formed on a substrate. An epitaxial structure is formed on the substrate, wherein the epitaxial structure comprises SiGe, and the Ge concentration in the epitaxial structure is equal to or higher than | 11-13-2014 |
20150041855 | SEMICONDUCTOR DEVICE - A semiconductor device includes at least two fin-shaped structures, a gate structure, at least two epitaxial structures and a silicon cap. The fin-shaped structures are disposed on a substrate and are covered by the gate structure. The epitaxial structures are disposed at one side of the gate structure and respectively directly contact each fin-shaped structure, wherein the epitaxial structures are spaced apart from each other. The silicon cap simultaneously surrounds the epitaxial structures. | 02-12-2015 |
20150044831 | SEMICONDUCTOR PROCESS - A semiconductor process includes the following steps. A first gate and a second gate are formed on a substrate. A first stress layer is formed to cover the first gate and the second gate. The first stress layer covering the first gate is etched to form a first spacer beside the first gate, but reserves the first stress layer covering the second gate. A first epitaxial layer is formed beside the first spacer. The first stress layer and the first spacer are entirely removed. A second stress layer is formed to cover the first gate and the second gate. The second stress layer covering the second gate is etched to form a second spacer beside the second gate, but reserves the second stress layer covering the first gate. A second epitaxial layer is formed beside the second spacer. The second stress layer and the second spacer are entirely removed. | 02-12-2015 |
20150044879 | REMOVING METHOD - A removing method including the following steps. A substrate is transferred into an etching machine, wherein the substrate has a material layer formed thereon. A cycle process is performed. The cycle process includes performing an etching process to remove a portion of the material layer, and performing an annealing process to remove a by-product generated by the etching process. The cycle process is repeated at least one time. The substrate is transferred out of the etching machine. In the removing method of the invention, the cycle process is performed multiple times to effectively remove the undesired thickness of the material layer and reduce the loading effect. | 02-12-2015 |
20150123210 | EPITAXIAL STRUCTURE AND PROCESS THEREOF FOR NON-PLANAR TRANSISTOR - An epitaxial structure for a non-planar transistor is provided. A substrate has a fin-shaped structure. A gate is disposed across the fin-shaped structure. A silicon germanium epitaxial structure is disposed on the fin-shaped structure beside the gate, wherein the silicon germanium epitaxial structure has 4 <1,1,1> surfaces and its aspect ratio of width and thickness is at a range of 1:1˜1.3. A method for forming said epitaxial structure is also provided. | 05-07-2015 |
Patent application number | Description | Published |
20120247634 | Stuffed Tire For Lightweight Vehicles - The present invention provides a stuffed tire for lightweight vehicles, comprising: a wheel; a tire casing, mounted onto the wheel; a harder elastic structure, installed inside the tire casing, and having an end abutted against the wheel; and a softer elastic filler, filled into the tire casing, and having an end abutted against another end of the harder elastic structure, so as to enhance the supporting strength of the tire and the balance of the rotating tire. | 10-04-2012 |
20120261908 | Golf Bag Cart - The golf bag cart includes a central base, a bottom cart stand, an upper cart stand, a wheel support, a first linkage, a second linkage, and a lock mechanism. The bottom cart stand has a top end fastened to the central base, a bottom end coupled with a front wheel, and a slider. The upper cart stand has a bottom end pivotally connected with the central base. Two wheel supports, disposed respectively and inclinedly at two sides of the central base, are joined with a steel wire to form a structure similar to a triangle. The first linkage connects the upper cart stand and the slider. The second linkage connects the slider and the wheel support. The lock mechanism mounted on the top end of the slider enables the upper cart stand and the bottom cart stand to lock with each other. | 10-18-2012 |
20120306182 | Front Wheel Folding Device of Golf Bag Cart - The present invention provides a front wheel folding device of a golf bag cart, comprising: an upper frame; a lower frame; a support base; a pin coupled to the upper frame and fixed to the lower frame and a wheel axle of two rear wheels; a front wheel frame, with an end axially coupled to the lower frame and another end having the rear wheels; and a link rod, pivotally coupled between the upper frame and the front wheel frame; such that the link rod is linked to fold the upper frame and the lower frame together, and fold the front wheel and the rear wheels together, so as to achieve the effect of a simpler and quicker operation. | 12-06-2012 |
20130026738 | GOLF CART FOLDING DEVICE - A golf cart folding device comprises an upper frame having a handle tube at an upper end of the upper frame; a rear wheel stand coupled to the upper frame by a connecting plate, and having a rear wheel at a lower end of the rear wheel stand; a pull rod coupled to the upper frame and the rear wheel stand; a lower frame, coupled to the upper frame, and having a front wheel at a lower end of the lower frame; and a link rod mechanism between the upper and lower frames for drawing the lower frame and the front wheel together towards the rear wheel by the linking of the link rod mechanism when a golf cart is folded, so as to achieve the effects of skipping a step of folding the front wheel, preventing making a user's body or cloth dirty, and providing a simple and easy operation. | 01-31-2013 |
20130026739 | Golf Cart Folding Device - A golf cart folding device comprises an upper frame having a handle tube at an upper end of the upper frame; a rear wheel stand coupled to the upper frame by a connecting plate, and having a rear wheel at a lower end of the rear wheel stand; a pull rod coupled to the upper frame and the rear wheel stand; a lower frame, coupled to the upper frame, and having a front wheel at a lower end of the lower frame; and a link rod mechanism between the upper and lower frames for drawing the lower frame and the front wheel together towards the rear wheel by the linking of the link rod mechanism when a golf cart is folded, so as to achieve the effects of skipping a step of folding the front wheel, preventing making a user's body or cloth dirty, and providing a simple and easy operation. | 01-31-2013 |
20130062865 | Golf Bag Cart - A golf bag cart comprises a lower frame including a connecting plate pivotally coupled to a rear wheel stand, a slide element installed at the top of the connecting plate, and an upper carrying base and a lower carrying base for placing and fixing a golf bag; an upper frame coupled to a lower frame and pivotally coupled to the upper carrying base; two front wheel stands coupled to the lower frame and pivotally coupled to the lower carrying base; a link rod module composed of link rod modules and coupled between the upper frame, a slide element and front and rear wheel stands for driving the front and the rear wheel stands or the front and rear wheels to fold or unfold; and a lift switch installed between the upper and lower frames and latched for fixing at a position when the golf bag cart is unfolded. | 03-14-2013 |
20130093165 | Folding Joint of Golf Bag Cart - A folding joint of a golf bag cart comprises: a main body, fixed onto a cart frame, and having a chamber formed inside the main body and a long slot formed on both sides of the chamber separately; a driving block, installed in the chamber of the main body, and having a spring installed at an upper end of the driving block, and a latch rod disposed on both sides of the driving block separately; and two rotating members, each having an upper end coupled to the cart frame, a lower end coupled to the main body, and a slide slot with a latch slot formed on the slide slot, so that the folding joint can be folded or unfolded to secure the cart frame automatically, so as to provide a simple and convenient operation. | 04-18-2013 |
20130113188 | Baby Stroller - A baby stroller is formed by a stroller frame and a chair, and the stroller frame includes a rotatable base. When the baby stroller is unfolded, the base is provided for abutting the stroller frame and positioned automatically, and when the baby stroller is folded, the chair and the stroller frame are folded and positioned directly together with the rotation of the base. The chair includes a folding joint, such that the chair can be folded directly onto the stroller frame to provide a simple, easy and quick operation and to achieve the effect of reducing the storage volume of the baby stroller. | 05-09-2013 |
20130229001 | Two-Fold Four-Wheel Golf Bag Cart Folding Device - A two-fold four-wheel golf bag cart folding device comprises: a lower cart frame; an upper cart frame; a rear wheel stand; a pull rod; a front wheel set; a locking mechanism, installed between an upper end of the upper cart frame and a lower end of the handle module, and having a function of fixing an angle between the upper cart frame and the handle module; and a four-link-rod mechanism, installed among the handle module, the rear wheel stand and the pull rod. The front wheels can be closed in synchronously while rear wheels are being folded, and the four wheels touch the ground simultaneously. | 09-05-2013 |
20140060246 | Power assisting Transmission System of Power Assisting Bike - A power assisting transmission system of a power assisting bike is provided for driving a gear of the transmission system to produce a lateral force in forward and backward pedaling and detect an axial displacement of a sliding gear in the transmission system to output a voltage signal to control motive power for driving a motor, so as to achieve forward and backward transmissions or a back pedaling brake effect. | 03-06-2014 |
Patent application number | Description | Published |
20110254142 | STACKED STRUCTURE - A stacked structure for patterning a material layer to form an opening pattern with a predetermined opening width in the layer is provided. The stacked structure includes an underlayer, a silicon rich organic layer, and a photoresist layer. The underlayer is on the material layer. The silicon rich organic layer is between the underlayer and the photoresist layer. The thickness of the photoresist layer is smaller than that of the underlayer and larger than two times of the thickness of the silicon rich organic layer. The thickness of the underlayer is smaller than three times of the predetermined opening width. | 10-20-2011 |
20120001338 | OPENING STRUCTURE - An opening structure is disclosed. The opening structure includes: a semiconductor substrate; at least one dielectric layer disposed on the semiconductor substrate, wherein the dielectric layer has a plurality of openings exposing the semiconductor substrate, and each of the openings has a sidewall; a dielectric thin film covering at least a portion of the sidewall of each of the openings; an etch stop layer disposed between the semiconductor substrate and the dielectric layer and extending partially into the openings to isolate the dielectric thin film from the semiconductor substrate; and a metal layer filled in the openings. | 01-05-2012 |
20120061840 | DAMASCENE INTERCONNECTION STRUCTURE AND DUAL DAMASCENE PROCESS THEREOF - A dual damascene structure is disclosed. The dual damascene structure includes: a substrate comprising thereon a base dielectric layer and a lower wiring layer inlaid in the base dielectric layer; a dielectric layer on the substrate; a via opening in the dielectric layer, wherein the via opening misaligns with the lower wiring layer thus exposing a portion of the lower wiring layer and a portion of the base dielectric layer, wherein the via opening comprises a bottom including a recessed area; a barrier layer lining interior surface of the via opening and covers the exposed lower wiring layer and the base dielectric layer, wherein only the barrier layer fills the recessed area; and a copper layer filling the via opening on the barrier layer. | 03-15-2012 |
20120184105 | METHOD OF FORMING OPENINGS - A method for forming openings is provided. First, a substrate with a silicon-containing photo resist layer thereon is provided. Second, a first photo resist pattern is formed on the silicon-containing photo resist layer. Later, a first etching procedure is carried out on the silicon-containing photo resist layer to form a plurality of first openings by using the first photo resist pattern as an etching mask. Next, a second photo resist pattern is formed on the silicon-containing photo resist layer. Then, a second etching procedure is carried out on the silicon-containing photo resist layer to form a plurality of second openings by using the second photo resist pattern as an etching mask. | 07-19-2012 |
20120220113 | Method of Manufacturing Semiconductor Device Having Metal Gate - The present invention provides a method of manufacturing semiconductor device having metal gate. First, a substrate is provided. A first conductive type transistor having a first sacrifice gate and a second conductive type transistor having a second sacrifice gate are disposed on the substrate. The first sacrifice gate is removed to form a first trench and then a first metal layer and a first material layer are formed in the first trench. Next, the first metal layer and the first material layer are flattened. The second sacrifice gate is removed to form a second trench and then a second metal layer and a second material layer are formed in the second trench. Lastly, the second metal layer and the second material layer are flattened. | 08-30-2012 |
20120256276 | Metal Gate and Fabricating Method Thereof - A method of manufacturing a metal gate is provided. The method includes providing a substrate. Then, a gate dielectric layer is formed on the substrate. A multi-layered stack structure having a work function metal layer is formed on the gate dielectric layer. An O | 10-11-2012 |
20120270403 | METHOD OF FABRICATING OPENINGS - A method of fabricating openings is disclosed. First, a semiconductor substrate having a salicide region thereon is provided. An etch stop layer and at least a dielectric layer are disposed on the semiconductor substrate from bottom to top. Second, the dielectric layer and the etching stop layer are patterned to form a plurality of openings in the dielectric layer and in the etching stop layer so that the openings expose the salicide region. Then, a dielectric thin film covering the dielectric layer, sidewalls of the openings and the salicide region is formed. Later, the dielectric thin film disposed on the dielectric layer and on the salicide region is removed. | 10-25-2012 |
20120302056 | PATTERN FORMING METHOD - A pattern forming method is disclosed. The method includes the steps of: forming a dielectric layer on a substrate; forming a first patterned mask on the dielectric layer, wherein the first patterned mask comprises an opening; forming a material layer on the dielectric layer and covering the first patterned mask; forming a second patterned mask on the material layer, wherein the second patterned mask comprises a first aperture; forming a second aperture in the second patterned mask after forming the first aperture, wherein the second aperture and the first aperture comprise a gap therebetween and overlap the opening; and utilizing the second patterned mask as an etching mask for partially removing the material layer and the dielectric layer through the first aperture and the second aperture. | 11-29-2012 |
20120313178 | SEMICONDUCTOR DEVICE HAVING METAL GATE AND MANUFACTURING METHOD THEREOF - A method of manufacturing a semiconductor device having metal gate includes providing a substrate having a first transistor and a second transistor formed thereon, the first transistor having a first gate trench formed therein, forming a first work function metal layer in the first gate trench, forming a sacrificial masking layer in the first gate trench, removing a portion of the sacrificial masking layer to expose a portion of the first work function metal layer, removing the exposed first function metal layer to form a U-shaped work function metal layer in the first gate trench, and removing the sacrificial masking layer. The first transistor includes a first conductivity type and the second transistor includes a second conductivity type. The first conductivity type and the second conductivity type are complementary. | 12-13-2012 |
20120315748 | METHOD FOR FABRICATING AN APERTURE - A method for fabricating an aperture is disclosed. The method includes the steps of: forming a hard mask containing carbon on a surface of a semiconductor substrate; and using a non-oxygen element containing gas to perform a first etching process for forming a first aperture in the hard mask. | 12-13-2012 |
20130087861 | SEMICONDUCTOR DEVICE AND FABRICATION METHOD THEREOF - A semiconductor device comprises a metal gate electrode, a passive device and a hard mask layer. The passive device has a poly-silicon element layer. The hard mask layer is disposed on the metal gate electrode and the passive electrode and has a first opening and a second opening substantially coplanar with each other, wherein the metal gate electrode and the poly-silicon element layer are respectively exposed via the first opening and the second opening; and there is a distance between the first opening and the metal gate electrode substantially less than the distance between the second opening and the poly-silicon element layer. | 04-11-2013 |
20130093062 | SEMICONDUCTOR STRUCTURE AND PROCESS THEREOF - A semiconductor structure includes a substrate, a recess and a material. The recess is located in the substrate, wherein the recess has an upper part and a lower part. The minimum width of the upper part is larger than the maximum width of the lower part. The material is located in the recess. | 04-18-2013 |
20130109151 | METHOD FOR FORMING VOID-FREE DIELECTRIC LAYER | 05-02-2013 |
20130200393 | SEMICONDUCTOR STRUCTURE AND PROCESS THEREOF - A semiconductor structure includes a substrate, a resist layer, a dielectric material, two U-shaped metal layers and two metals. The substrate has an isolation structure. The resist layer is located on the isolation structure. The dielectric material is located on the resist layer. Two U-shaped metal layers are located at the two sides of the dielectric material and on the resist layer. Two metals are respectively located on the two U-shaped metal layers. This way a semiconductor process for forming said semiconductor structure is provided. | 08-08-2013 |
20130292775 | STRAINED SILICON STRUCTURE - A strained silicon substrate structure includes a first transistor and a second transistor disposed on a substrate. The first transistor includes a first gate structure and two first source/drain regions disposed at two sides of the first gate structure. A first source/drain to gate distance is between each first source/drain region and the first gate structure. The second transistor includes a second gate structure and two source/drain doped regions disposed at two side of the second gate structure. A second source/drain to gate distance is between each second source/drain region and the second gate structure. The first source/drain to gate distance is smaller than the second source/drain to gate distance. | 11-07-2013 |
20130295738 | SEMICONDUCTOR PROCESS - A semiconductor process includes the following steps. A fin-shaped structure is formed on a substrate. A gate structure and a cap layer are formed, wherein the gate structure is disposed across parts of the fin-shaped structure and parts of the substrate, the cap layer is on the gate structure, and the cap layer includes a first cap layer on the gate structure and a second cap layer on the first cap layer. A spacer material is formed to entirely cover the second cap layer, the fin-shaped structure and the substrate. The spacer material is etched, so that the sidewalls of the second cap layer are exposed and a spacer is formed beside the gate structure. The second cap layer is removed. | 11-07-2013 |
20130337650 | METHOD OF MANUFACTURING DUAL DAMASCENE STRUCTURE - A method for fabricating a dual damascene structure includes the following steps. At first, a dielectric layer, a dielectric mask layer and a metal mask layer are sequentially formed on a substrate. A plurality of trench openings is formed in the metal mask layer, and a part of the metal mask layer is exposed in the bottom of each of the trench openings. Subsequently, a plurality of via openings are formed in the dielectric mask layer, and a part of the dielectric mask layer is exposed in a bottom of each of the via openings. Furthermore, the trench openings and the via openings are transferred to the dielectric layer to form a plurality of dual damascene openings. | 12-19-2013 |
20140038399 | METHOD FOR FABRICATING AN APERTURE - A method for fabricating an aperture is disclosed. The method includes the steps of: forming a hard mask containing carbon on a surface of a semiconductor substrate; and using a non-oxygen element containing gas to perform a first etching process for forming a first aperture in the hard mask. Before forming the hard mask, a gate which includes a contact etch stop layer and a dielectric layer is formed on the semiconductor substrate. | 02-06-2014 |
20140038417 | SEMICONDUCTOR STRUCTURE AND PROCESS THEREOF - A semiconductor structure includes a substrate, a recess and a material. The recess is located in the substrate, wherein the recess has an upper part and a lower part. The minimum width of the upper part is larger than the maximum width of the lower part. The material is located in the recess. | 02-06-2014 |
20140073104 | MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE - A manufacturing method of a semiconductor device is disclosed in the present invention. First, at least one gate structure and plurality of source/drain regions on a substrate are formed, a dielectric layer is then formed on the substrate, a first contact hole and a second contact hole are formed in the dielectric layer, respectively on the gate structure and the source/drain region, and a third contact hole is formed in the dielectric layer, wherein the third contact hole overlaps the first contact hole and the second contact hole. | 03-13-2014 |
20140099760 | METHOD FOR FABRICATING SEMICONDUCTOR DEVICE - A method for fabricating a semiconductor device, wherein the method comprises steps as follows: A dummy gate with a poly-silicon gate electrode and a passive device having a poly-silicon element layer are firstly provided. A hard mask layer is then formed on the dummy gate and the passive device. Next, a first etching process is performed to remove a portion of the hard mask layer to expose a portion of the poly-silicon element layer. Subsequently, an inner layer dielectric (ILD) is formed on the dummy gate and the poly-silicon element layer, and the ILD is flattened by using the hard mask layer as a polishing stop layer. Thereafter, a second etching process is performed to remove the poly-silicon gate electrode, and a metal gate electrode is formed on the location where the poly-silicon gate electrode was initially disposed. | 04-10-2014 |
20140103443 | SEMICONDUCTOR DEVICE HAVING METAL GATE AND MANUFACTURING METHOD THEREOF - A semiconductor device having a metal gate includes a substrate having a first gate trench and a second gate trench formed thereon, a gate dielectric layer respectively formed in the first gate trench and the second gate trench, a first work function metal layer formed on the gate dielectric layer in the first gate trench and the second gate trench, a second work function metal layer respectively formed in the first gate trench and the second gate trench, and a filling metal layer formed on the second work function metal layer. An opening width of the second gate trench is larger than an opening width of the first gate trench. An upper area of the second work function metal layer in the first gate trench is wider than a lower area of the second work function metal layer in the first gate trench. | 04-17-2014 |
20140127892 | SEMICONDUCTOR DEVICE HAVING METAL GATE AND MANUFACTURING METHOD THEREOF - A method of manufacturing a semiconductor device having metal gate includes providing a substrate having a first transistor and a second transistor formed thereon, the first transistor having a first gate trench formed therein, forming a first work function metal layer in the first gate trench, forming a sacrificial masking layer in the first gate trench, removing a portion of the sacrificial masking layer to expose a portion of the first work function metal layer, removing the exposed first function metal layer to form a U-shaped work function metal layer in the first gate trench, and removing the sacrificial masking layer. The first transistor includes a first conductivity type and the second transistor includes a second conductivity type. The first conductivity type and the second conductivity type are complementary. | 05-08-2014 |
20140315365 | METHOD OF FORMING SEMICONDUCTOR DEVICE - A method of forming a semiconductor device is provided. At least one gate structure including a dummy gate is formed on a substrate. A contact etch stop layer and a dielectric layer are formed to cover the gate structure. A portion of the contact etch stop layer and a portion of the dielectric layer are removed to expose the top of the gate structure. A dry etching process is performed to remove a portion of the dummy gate of the gate structure. A hydrogenation treatment is performed to the surface of the remaining dummy gate. A wet etching process is performed to remove the remaining dummy gate and thereby form a gate trench. | 10-23-2014 |
20140339652 | SEMICONDUCTOR DEVICE WITH OXYGEN-CONTAINING METAL GATES - A semiconductor device with oxygen-containing metal gates includes a substrate, a gate dielectric layer and a multi-layered stack structure. The multi-layered stack structure is disposed on the substrate. At least one layer of the multi-layered stack structure includes a work function metal layer. The concentration of oxygen in the side of one layer of the multi-layered stack structure closer to the gate dielectric layer is less than that in the side of one layer of the multi-layered stack structure opposite to the gate dielectric layer. | 11-20-2014 |
20150126015 | SEMICONDUCTOR PROCESS - A semiconductor structure includes a substrate, a resist layer, a dielectric material, two U-shaped metal layers and two metals. The substrate has an isolation structure. The resist layer is located on the isolation structure. The dielectric material is located on the resist layer. Two U-shaped metal layers are located at the two sides of the dielectric material and on the resist layer. Two metals are respectively located on the two U-shaped metal layers. This way a semiconductor process for forming said semiconductor structure is provided. | 05-07-2015 |