Patent application number | Description | Published |
20080233680 | Semiconductor Die Collet and Method - Semiconductor device assembly die attach apparatus and methods are disclosed for improvements in attaching a semiconductor die to a die pad. Preferred methods of the invention include steps for positioning a semiconductor die on a bearing surface of a collet and retaining the die on the bearing surface of the collet using a vacuum force. A pushing force is also exerted on the die adjacent to the applied vacuum force. The pushing force opposes flexion of the die in the direction of the vacuum force. In further steps, the die is placed on a die pad, and die attach adhesive is interposed between the die and the die pad. A preferred method includes applying a pushing force to bow the central region of the die toward the die pad. In a preferred apparatus of the invention, a collet has a body including a bearing surface for receiving a die and a vacuum for holding it. A chamber encompassed by the bearing surface is adapted for applying the force of expelled gas against a die borne on the bearing surface. The collet is configured for holding a die surface against the bearing surface and for simultaneously pushing outward on the center region of the die so held. | 09-25-2008 |
20100289159 | Semiconductor Die Collet and Method - Semiconductor device assembly die attach apparatus and methods are disclosed for improvements in attaching a semiconductor die to a die pad. Preferred methods of the invention include steps for positioning a semiconductor die on a bearing surface of a collet and retaining the die on the bearing surface of the collet using a vacuum force. A pushing force is also exerted on the die adjacent to the applied vacuum force. The pushing force opposes flexion of the die in the direction of the vacuum force. In further steps, the die is placed on a die pad, and die attach adhesive is interposed between the die and the die pad. A preferred method includes applying a pushing force to bow the central region of the die toward the die pad. In a preferred apparatus of the invention, a collet has a body including a bearing surface for receiving a die and a vacuum for holding it. A chamber encompassed by the bearing surface is adapted for applying the force of expelled gas against a die borne on the bearing surface. The collet is configured for holding a die surface against the bearing surface and for simultaneously pushing outward on the center region of the die so held. | 11-18-2010 |
20130264836 | Semiconductor Die Collet and Method - A system comprises a collet is configured for holding a die surface against the bearing surface and for simultaneously pushing outward on the center region of the die so held. | 10-10-2013 |
20150340324 | Integrated Circuit Die And Package - A semiconductor package assembly includes a substrate having an upper surface with a die attachment region thereon. A layer of die attachment material is positioned on top of the die attachment region. The semiconductor package assembly also includes an integrated circuit (“IC”) die. The die has a top portion including a laterally extending top wall surface and a plurality of generally vertically extending wall surfaces extending downwardly from the top wall surface. The die has a metallized bottom portion. The bottom portion has at least two metallized laterally extending wall surfaces and a plurality of metallized generally vertically extending connecting surfaces that connect the metallized laterally extending surfaces of the bottom portion. The layer of die attachment material interfaces with one or both of the metallized laterally extending surfaces and the plurality of metallized generally vertically extending connecting wall surfaces. | 11-26-2015 |
20150348881 | Solder Coated Clip And Integrated Circuit Packaging Method - A method of making a QFD package including providing a clip and coating at least a first end portion of the clip with solder paste. | 12-03-2015 |
20150364373 | Quad Flat No Lead Package And Method Of Making - A quad flat no lead (“QFN”) package that includes a die having an active side positioned substantially in a first plane and a backside positioned substantially in a second plane parallel to the first plane; a plurality of separate conductive pads each having a first side positioned substantially in the first plane and a second side positioned substantially in the second plane; and mold compound positioned between the first and second planes in voids between the conductive pads and the dies. Also a method of producing a plurality of QFN packages includes forming a strip of plastic material having embedded therein a plurality of dies and a plurality of conductive pads that are wire bonded to the dies and singulating the strip into a plurality of QFN packages by cutting through only the plastic material. | 12-17-2015 |
20160099226 | CIRCUIT SUBSTRATE INTERCONNECT - A packaged integrated circuit (IC) includes a substrate including a first substrate pad disposed on a first side of the substrate, an IC die disposed on the first side of the substrate, and a first insulating layer molded over the IC die and the substrate. The IC die includes a first die pad on a side of the die opposite from a side of the die adjacent to the first side of the substrate. The first insulating layer includes a first channel extending through the first insulating layer to the first substrate pad, a second channel extending through the first insulating layer to the first die pad, conductive paste filling the first channel and in contact with the first substrate pad, and conductive paste filling the second channel and in contact with the die pad. | 04-07-2016 |
20160133599 | QFN Package - A method of making a flat no lead package including attaching a first plurality of leads in spaced apart relationship in a predetermined pattern on a tape and attaching a first die to the tape at a predetermined position within the predetermined lead pattern. | 05-12-2016 |