Patent application number | Description | Published |
20120223735 | DETECTION OF SINGLE BIT UPSET AT DYNAMIC LOGIC DUE TO SOFT ERROR IN REAL TIME - A circuit for detecting a single bit upset in a dynamic logic circuit includes a latch circuit having an input for receiving a reset signal, and an output for providing a flag output signal, the latch circuit being clocked by a first clock signal, a first transistor having a drain coupled to the output of the latch circuit, a gate for receiving a second clock signal, and a source, and a second transistor having a drain coupled to the source of the first transistor, a gate for receiving a third clock signal, and a source coupled to ground. | 09-06-2012 |
20150058686 | RECONFIGURABLE MEMORY INTERFACE CIRCUIT TO SUPPORT A BUILT-IN MEMORY SCAN CHAIN - A method of operating an apparatus in a functional mode and an ATPG scan mode and an apparatus for use in a functional mode and an ATPG scan mode are provided. The apparatus includes a set of latches including a first latch and a second latch. The first latch is operated as a master latch and the second latch is operated as a master latch in the functional mode. The first latch is operated as a master latch of a flip-flop and the second latch is operated as a slave latch of the flip-flop in the ATPG scan mode. In one configuration, the apparatus includes a plurality of latches including at least the first and second latches, an output of each of the latches is coupled to a digital circuit, the apparatus includes a plurality of functional inputs, and each of the functional inputs is input to the digital circuit. | 02-26-2015 |
20150063046 | MEMORY TIMING CIRCUIT - Disclosed are various apparatuses and methods for a memory with a multiple word line design. A memory timing circuit may include a dummy word line including a first portion and a second portion and further including capacitative loading that is lumped in the second portion of the dummy word line, a first transistor connected to the first portion of the dummy word line and configured to charge the dummy word line, and a second transistor connected to the second portion of the dummy word line and configured to discharge the dummy word line. A method may include charging a dummy word line using a first transistor, and discharging the dummy word line using a second transistor, wherein the dummy word line includes a first portion and a second portion and further includes capacitative loading that is lumped in the second portion of the dummy word line. | 03-05-2015 |
20150085568 | READ/WRITE ASSIST FOR MEMORIES - An integrated circuit includes one or more bit cells, a word line coupled to the one or more bit cells, and a dummy word line arranged with the word line to have a capacitance therebetween. The capacitance provides a voltage boost or reduction of the word line to assist read and write operations. | 03-26-2015 |
20150109865 | HIGH FREQUENCY PSEUDO DUAL PORT MEMORY - A pseudo dual port (PDP) memory is disclosed having a write driver that selectively precharges only one of a bit line and a complement bit line in a bit line pair responsive to a bit value to be written into an accessed bitcell while discharging a remaining one of the bit line and the complement bit line. In this fashion, the cleanup time between a read operation and a write operation during a read/write clock cycle is advantageously reduced. | 04-23-2015 |
Patent application number | Description | Published |
20150227421 | Package On Package Memory Interface and Configuration With Error Code Correction - Information communication circuitry, including a first integrated circuit for coupling to a second integrated circuit in a package on package configuration. The first integrated circuit comprises processing circuitry for communicating information bits, and the information bits comprise data bits and error correction bits, where the error correction bits are for indicating whether data bits are received correctly. The second integrated circuit comprises a memory for receiving and storing at least some of the information bits. The information communication circuitry also includes interfacing circuitry for selectively communicating, along a number of conductors, between the package on package configuration. In a first instance, the interfacing circuitry selectively communicates only data bits along the number of conductors. In a second instance, the interfacing circuitry selectively communicates data bits along a first set of the number of conductors and error correction bits along a second set of the number of conductors. | 08-13-2015 |
20150304648 | Ensuring Imaging Subsystem Integrity in Camera Based Safety Systems - A method for testing an imaging subsystem of a system-on-a-chip (SOC) is provided that includes executing imaging subsystem test software instructions periodically on a processor of the SOC, receiving reference image data in the imaging subsystem responsive to the executing of the test software instructions, performing image signal processing on the reference image data by the imaging subsystem to generate processed reference image data, and using the processed reference image data by the test software instructions to verify whether or not the imaging subsystem is operating correctly. | 10-22-2015 |
20150339234 | SYSTEM AND METHOD FOR MANAGING CACHE - A system includes first and second processing components, a qualified based splitter component, a first and second configurable cache element and an arbiter component. The first data processing component generates a first request for a first portion of data at a first location within a memory. The second data processing component generates a second request for a second portion of data at a second location within the memory. The qualifier based splitter component routes the first request and the second request based on a qualifier. The first configurable cache element enables or disables prefetching data within a first region of the memory. The second configurable cache element enables or disables prefetching data within a second region of the memory. The arbiter component routes the first request and the second request to the memory. | 11-26-2015 |
Patent application number | Description | Published |
20080310313 | PROTOCOL DATA UNIT RECOVERY - Information can transfer from a transmitter to a receiver; however, the transmission can consume valuable resources. Therefore, a number of times a transmission is attempted can be tracked and compared against a threshold value. If the transmission occurs too many times—based upon the comparison—then a reset can occur. Tracking can occur for a protocol data unit and/or a control protocol data unit to determine if a reset should occur. | 12-18-2008 |
20140335862 | METHODS AND APPARATUS FOR ENHANCED CELL DETECTION - Methods and apparatus of cell detection include determining whether communication between a user equipment and a serving cell satisfies a serving cell unsuitability condition. The methods and apparatus further include performing one or more autonomous search procedures based on whether the serving cell unsuitability condition has been satisfied. Moreover, the methods and apparatus include conducting cell reselection based on one or more results from the one or more autonomous search procedures, wherein the one or more results indicate at least one suitable cell for reselection. | 11-13-2014 |
20140376393 | APPARATUS AND METHODS FOR DYNAMICALLY REPORTING INTER-SYSTEM MEASUREMENT CAPABILITY IN A WIRELESS COMMUNICATION NETWORK - Aspects of the disclosure provide apparatus and methods of inter-system measurements operable at a user equipment (UE) in a wireless communication network. The UE establishes a connection with a network node in a first wireless communication network utilizing a first radio access technology (RAT), wherein the UE is capable of measuring a plurality of frequency bands of a second RAT greater in number than a measurement capability report limit of the first RAT. The UE further selects a subset of the plurality of frequency bands of the second RAT to be included in a measurement capability information element (IE) based on information provided by the network node and information stored at the UE. The UE further transmits the measurement capability IE to the network node. | 12-25-2014 |
20150195755 | HANDLING CELL RESELECTION TO INTRA-FREQUENCY, INTER-FREQUENCY, AND INTER-RAT CELLS OF HOME PLMN - A method and apparatus for wireless communications are provided. A first cell on which a user equipment (UE) is camped may be identified as a visited Public Land Mobile Network (VPLMN) of the UE. Information of a second cell among neighboring cells of the first cell may be received via a broadcast message from the first cell. The second cell may be part of a home PLMN (HPLMN) and the HPLMN may not be an equivalent PLMN (EPLMN) to the VPLMN associated with the first cell. Alternatively, the second cell may belong to an Equivalent HPLMN (EPLMN). When the second cell is determined to be a best cell according to absolute priority reselection rules or a highest ranked cell among the neighboring cells of the first cell, the second cell may not be barred for a period of time from being considered or identified as a candidate for reselection. | 07-09-2015 |
20150208327 | OPTIMIZING BACKGROUND PUBLIC LAND MOBILE NETWORK SEARCHES - In various aspects, the disclosure provides user equipment (UE) capable of conducting a public land mobile network (PLMN) search by determining a paging schedule for a serving cell of the UE, the serving cell being associated with a first PLMN and the paging schedule defining one or more paging occasions. The UE may initiate a search for a second PLMN between consecutive paging occasions, and may read information blocks on a broadcast channel of a cell of the second PLMN. The UE may discontinue reading a partially-read information block when the partially-read information block is scheduled for transmission at least partially concurrently with a paging occasion on the serving cell if the partially-read information block does not include information for identifying the second PLMN. The UE may ignore the first paging occasion when the partially-read information block includes the information for identifying the second PLMN. | 07-23-2015 |