Patent application number | Description | Published |
20100013832 | Model-Based Object Image Processing - Aspects of the present invention include systems and methods for forming generative models, for utilizing those models, or both. In embodiments, an object model fitting system can be developed comprising a 3D active appearance model (AAM) model. The 3D AAM comprises an appearance model comprising a set of subcomponent appearance models that is constrained by a 3D shape model. In embodiments, the 3D AAM may be generated using a balanced set of training images. The object model fitting system may further comprise one or more manifold constraints, one or more weighting factors, or both. Applications of the present invention include, but are not limited to, modeling and/or fitting face images, although the teachings of the present invention can be applied to modeling/fitting other objects. | 01-21-2010 |
20100214288 | Combining Subcomponent Models for Object Image Modeling - Aspects of the present invention include systems and methods for forming generative models, for utilizing those models, or both. In embodiments, an object model fitting system can be developed comprising a 3D active appearance model (AAM) model. The 3D AAM comprises an appearance model comprising a set of subcomponent appearance models that is constrained by a 3D shape model. In embodiments, the 3D AAM may be generated using a balanced set of training images. The object model fitting system may further comprise one or more manifold constraints, one or more weighting factors, or both. Applications of the present invention include, but are not limited to, modeling and/or fitting face images, although the teachings of the present invention can be applied to modeling/fitting other objects. | 08-26-2010 |
20100214289 | Subdivision Weighting for Robust Object Model Fitting - Aspects of the present invention include systems and methods for forming generative models, for utilizing those models, or both. In embodiments, an object model fitting system can be developed comprising a 3D active appearance model (AAM) model. The 3D AAM comprises an appearance model comprising a set of subcomponent appearance models that is constrained by a 3D shape model. In embodiments, the 3D AAM may be generated using a balanced set of training images. The object model fitting system may further comprise one or more manifold constraints, one or more weighting factors, or both. Applications of the present invention include, but are not limited to, modeling and/or fitting face images, although the teachings of the present invention can be applied to modeling/fitting other objects. | 08-26-2010 |
20100215255 | Iterative Data Reweighting for Balanced Model Learning - Aspects of the present invention include systems and methods for forming generative models, for utilizing those models, or both. In embodiments, an object model fitting system can be developed comprising a 3D active appearance model (AAM) model. The 3D AAM comprises an appearance model comprising a set of subcomponent appearance models that is constrained by a 3D shape model. In embodiments, the 3D AAM may be generated using a balanced set of training images. The object model fitting system may further comprise one or more manifold constraints, one or more weighting factors, or both. Applications of the present invention include, but are not limited to, modeling and/or fitting face images, although the teachings of the present invention can be applied to modeling/fitting other objects. | 08-26-2010 |
Patent application number | Description | Published |
20120141018 | L1-Optimized AAM Alignment - An Active Appearance Model, AAM, uses an L | 06-07-2012 |
20120195495 | Hierarchical Tree AAM - An active appearance model is built by arranging the training images in its training library into a hierarchical tree with the training images at each parent node being divided into two child nodes according to similarities in characteristic features. The number of node levels is such that the number of training images associated with each leaf node is smaller than a predefined maximum. A separate AAM, one per leaf node, is constructed using each leaf node's corresponding training images. In operation, starting at the root node, a test image is compared with each parent node's two child nodes and follows a node-path of model images that most closely matches the test image. The test image is submitted to an AAM selected for being associated with the leaf node at which the test image rests. The selected AAM's output aligned image may be resubmitted to the hierarchical tree if sufficient alignment is not achieved. | 08-02-2012 |
20120299906 | Model-Based Face Image Super-Resolution - An output image of higher resolution than an input image is constructed by using a low resolution (LR) dictionary of triangle data entries, each having a one-to-one correlation with a high resolution (HR) data entry in an HR dictionary of triangle data entries. The input image is triangularized, and the closest matching LR data entry in the LR dictionary for each triangle in the triangularized input image is identified. The HR data entry correlated to each identified matching LR data entry is then used to construct the output image by wrapping the correlated HR data entry onto the corresponding triangle on the triangularized input image. | 11-29-2012 |
20130127827 | Multiview Face Content Creation - New views of a 2D image are generated by identifying an object class within the image, such as through a face detector. The face is then fitted to a model face by means of an AAM, and the results extended to a fitted 3D polygon mesh face. A boundary perimeter with predefined anchor points and a predefined triangulation with the 3D polygon mesh is defined a predefined depth distance from the depth center of known landmarks within the 3D polygon mesh face. By rotating the 3D polygon mesh face relative to the boundary perimeter, which may follow the perimeter of the input image, new views of the input image are generated. | 05-23-2013 |
20130266195 | Hash-Based Face Recognition System - In a face recognition system, overlapping patches are defined on a canonical face. Random clusters of pixel pairs are defined within each patch, and binary features are determined for each pixel pair by comparing their respective feature values. An inverted index hash table is constructed of the binary features. Similar binary features are then determined on a library of registrable samples of identified faces. A log probability of each registrable sample generating a binary feature from a corresponding cluster of pixel pairs at each specific patch location is determined and stored in the hash table. In a search phase, similar binary features are determined, and a hash key is determined for each binary feature. The log probabilities for each identity found in the hash table are summed for all clusters of pixel pairs and locations and sorted to find the high probability match. | 10-10-2013 |
20130268563 | Fast and Robust Classification Algorithm for Vein Recognition Using Infrared Images - A specific item within an item class is identified by defining sets of descriptor data from a training library. The collected descriptor data is grouped and organized into a hierarchical tree, where each leaf node is defined by relations between corresponding parts of the descriptor data. Registrable sets of descriptor data are then identified from a collection of registrable samples. The registrable sets of descriptors are sorted into the hierarchical tree. When an input sample to be identified is received, a test set of descriptor data is generated from the input sample. The test set is then sorted into the hierarchical tree. Each leaf node that receives a part of the test set provides a vote for the registered samples it contains. The registered sample with the most votes is deemed a match for the input sample. | 10-10-2013 |
20150088964 | INSTANTANEOUS NON-BLOCKING CONTENT PURGING IN A DISTRIBUTED PLATFORM - Some embodiments provide instantaneous and non-blocking content purging across storage servers of a distributed platform. When a server receives a purge operation, it extracts an identifier from the purge operation. The server then generates a content purge pattern from the identifier and injects the pattern to its configuration. Instantaneous purging is then realized as the server averts access to any cached content identified by the pattern. The purging also occurs in a non-blocking fashion as the physical purge of the content occurs in-line with the server's cache miss operation. The content purge pattern causes the server to respond to a subsequently received content request with a cache miss, whereby the server retrieves the requested content from an origin source, serves the retrieved content to the requesting user, and replaces a previously cached copy of the content that is to be purged with the newly retrieved copy. | 03-26-2015 |
Patent application number | Description | Published |
20080276105 | POWER MANAGERS FOR AN INTEGRATED CIRCUIT - A system for an integrated circuit comprising a plurality of power islands includes a first power manager and a second power manager. The first power manager manages a first power consumption for the integrated circuit based on needs and operation of the integrated circuit. The second power manager communicates with the first power manager and manages a second power consumption for one of the power islands. | 11-06-2008 |
20090152948 | POWER MANAGERS FOR AN INTEGRATED CIRCUIT - A system for an integrated circuit comprising a plurality of power islands includes a first power manager and a second power manager. The first power manager manages a first power consumption for the integrated circuit based on needs and operation of the integrated circuit. The second power manager communicates with the first power manager and manages a second power consumption for one of the power islands. | 06-18-2009 |
20120001926 | Intermediate Language Accelerator Chip - An accelerator chip can be positioned between a processor chip and a memory. The accelerator chip enhances the operation of a Java program by running portions of the Java program for the processor chip. In a preferred embodiment, the accelerator chip includes a hardware translator unit and a dedicated execution engine. | 01-05-2012 |
20120019549 | Intermediate Language Accelerator Chip - An accelerator chip can be positioned between a processor chip and a memory. The accelerator chip enhances the operation of a Java program by running portions of the Java program for the processor chip. In a preferred embodiment, the accelerator chip includes a hardware translator unit and a dedicated execution engine. | 01-26-2012 |
20120023310 | Intermediate Language Accelerator Chip - An accelerator chip can be positioned between a processor chip and a memory. The accelerator chip enhances the operation of a Java program by running portions of the Java program for the processor chip. In a preferred embodiment, the accelerator chip includes a hardware translator unit and a dedicated execution engine. | 01-26-2012 |
20120032965 | Intermediate language accelerator chip - An accelerator chip can be positioned between a processor chip and a memory: The accelerator chip enhances the operation of a Java program by running portions of the Java program for the processor chip. In a preferred embodiment, the accelerator chip includes a hardware translator unit and a dedicated execution engine. | 02-09-2012 |
20120043812 | Power Managers for an Integrated Circuit - A system for an integrated circuit comprising a plurality of power islands includes a first power manager and a second power manager. The first power manager manages a first power consumption for the integrated circuit based on needs and operation of the integrated circuit. The second power manager communicates with the first power manager and manages a second power consumption for one of the power islands. | 02-23-2012 |
20120256485 | Power Managers for an Integrated Circuit - A system for an integrated circuit comprising a plurality of power islands includes a first power manager and a second power manager. The first power manager manages a first power consumption for the integrated circuit based on needs and operation of the integrated circuit. The second power manager communicates with the first power manager and manages a second power consumption for one of the power islands. | 10-11-2012 |
20140333134 | POWER MANAGERS FOR AN INTEGRATED CIRCUIT - A system for an integrated circuit comprising a plurality of power islands includes a first power manager and a second power manager. The first power manager manages a first power consumption for the integrated circuit based on needs and operation of the integrated circuit. The second power manager communicates with the first power manager and manages a second power consumption for one of the power islands. | 11-13-2014 |