Salcido
Jaime N. Salcido, Chihuahua MX
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20100004879 | Fluid level measuring system - A total capacitance is measured between an inner electrode disposed in a dielectric sleeve and an outer electrode surrounding the sleeve, with a fluid chamber being established between the sleeve and outer electrode. The total capacitance is correlated to a level (l) of fluid in the chamber using an electrode length, a unit length capacitance associated with the sleeve, and a unit length capacitance associated with the fluid chamber when no fluid is in the chamber. | 01-07-2010 |
Jason A. Salcido, Flower Mound, TX US
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20090113310 | ROLE TAILORED PORTAL SOLUTION INTEGRATING NEAR REAL-TIME METRICS, BUSINESS LOGIC, ONLINE COLLABORATION, AND WEB 2.0 CONTENT - The disclosed solution provides a tailored user experience available through a Web portal that addresses the multiple-view, multiple-data needs of operations, supervisory, policy making, and executive personnel of an organization. These various roles can all be concerned with measurement/assessment of an organization's compliance with performance targets, for which real-time, near real-time or other metrics are gathered. The metrics can be presented in a role tailored fashion to the portal users in near real-time along with federation of analysis and trend calculation output. Business logic can be applied to the federated data and near real-time metrics to automatically effectuate actions and/or to suggest responses when received metrics exceed previously established boundaries. Collaboration tools and Web 2.0 information sharing technologies can be integrated in the portal to facilitate rapid coordinated responses and to share information across the organization. | 04-30-2009 |
Manuel Salcido, Fort Collins, CO US
Patent application number | Description | Published |
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20080265986 | High-Speed Receiver Assembly - A high-speed receiver suitable for applications that desire a common-mode voltage range from approximately 0.7V to approximately 0.9V is arranged by coupling first and second differential pair circuit architectures based on first and second current-steering schemes into the same path to generate an output signal. The high-speed receiver includes first and second differential pair circuits. The first differential pair circuit is coupled to a first current-steering path via a first port and a second current-steering path via a second port. The second differential pair circuit is coupled to the first current-steering path via a third port and the second current-steering path via a fourth port. A bridge circuit is interposed between the first and second differential pair circuits. The bridge circuit integrates the first and second current-steering paths in a single-stage of the high-speed receiver assembly. | 10-30-2008 |
20080268804 | Bias Circuit for Common-Mode and Semiconductor Process Voltage and Temperature Optimization for a Receiver Assembly - A receiver suitable for applications that desire a common-mode voltage range from approximately 0.7V to approximately 0.9V is arranged by coupling first and second differential pair circuit architectures based on first and second current-steering schemes into the same path to generate an output signal. The receiver includes first and second differential pair circuits. The first differential pair circuit is coupled to a first current-steering path via a first port and a second current-steering path via a second port. The second differential pair circuit is coupled to the first current-steering path via a third port and the second current-steering path via a fourth port. A bridge circuit is interposed between the first and second differential pair circuits. The bridge circuit integrates the first and second current-steering paths in a single-stage of the receiver assembly. A bias signal directs the bridge circuit over a set of worst case conditions. | 10-30-2008 |
20090257481 | IDENTIFICATION OF BOARD CONNECTIONS FOR DIFFERENTIAL RECEIVERS - Embodiments of the invention include testing arrangements for detecting proper DC-coupled board connections on the input legs of a differential receiver. The testing implementation includes a first test receiver AC-coupled to the connection between the first input/output (I/O) pad and the differential receiver positive input and/or a second test receiver coupled to the connection between the second I/O pad and the differential receiver negative input. The test receiver protects the test receiver input from DC voltages applied to the differential receiver via the differential receiver input. Also, the test receiver includes a high-pass filter arrangement that generates data capable of detecting whether the I/O pad connected to the test receiver has a proper DC-coupled connection or an improper connection when presented with a stimulus pulse. The test receiver is less susceptible to noise because than conventional arrangements that use a low-pass RC filter. | 10-15-2009 |
Scott L. Salcido, White City, OR US
Patent application number | Description | Published |
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20080245477 | CARTRIDGE ADHESIVE FORMULATION - A resealable adhesive formulation comprises a paraffinic hydrocarbon, an aliphatic ester, an aliphatic alcohol, an acrylate adhesive, a surfactant free of perfluoroalkylsulfonyl groups and optionally a tackifying resin. The adhesive is capable of multiple open/close cycles and is particularly useful for resealable cassettes and cartridges for medical imaging films. | 10-09-2008 |